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source: vbox/trunk/include/VBox/hwacc_vmx.mac@ 1650

最後變更 在這個檔案從1650是 1,由 vboxsync 提交於 55 年 前

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  • 屬性 svn:keywords 設為 Author Date Id Revision
檔案大小: 8.8 KB
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1%define VMX_VMCS_GUEST_FIELD_ES 0800h
2%define VMX_VMCS_GUEST_FIELD_CS 0802h
3%define VMX_VMCS_GUEST_FIELD_SS 0804h
4%define VMX_VMCS_GUEST_FIELD_DS 0806h
5%define VMX_VMCS_GUEST_FIELD_FS 0808h
6%define VMX_VMCS_GUEST_FIELD_GS 080Ah
7%define VMX_VMCS_GUEST_FIELD_LDTR 080Ch
8%define VMX_VMCS_GUEST_FIELD_TR 080Eh
9%define VMX_VMCS_HOST_FIELD_ES 0C00h
10%define VMX_VMCS_HOST_FIELD_CS 0C02h
11%define VMX_VMCS_HOST_FIELD_SS 0C04h
12%define VMX_VMCS_HOST_FIELD_DS 0C06h
13%define VMX_VMCS_HOST_FIELD_FS 0C08h
14%define VMX_VMCS_HOST_FIELD_GS 0C0Ah
15%define VMX_VMCS_HOST_FIELD_TR 0C0Ch
16%define VMX_VMCS_CTRL_IO_BITMAP_A_FULL 02000h
17%define VMX_VMCS_CTRL_IO_BITMAP_A_HIGH 02001h
18%define VMX_VMCS_CTRL_IO_BITMAP_B_FULL 02002h
19%define VMX_VMCS_CTRL_IO_BITMAP_B_HIGH 02003h
20%define VMX_VMCS_CTRL_MSR_BITMAP_FULL 02004h
21%define VMX_VMCS_CTRL_MSR_BITMAP_HIGH 02005h
22%define VMX_VMCS_CTRL_VMEXIT_MSR_STORE_FULL 02006h
23%define VMX_VMCS_CTRL_VMEXIT_MSR_STORE_HIGH 02007h
24%define VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_FULL 02008h
25%define VMX_VMCS_CTRL_VMEXIT_MSR_LOAD_HIGH 02009h
26%define VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_FULL 0200Ah
27%define VMX_VMCS_CTRL_VMENTRY_MSR_LOAD_HIGH 0200Bh
28%define VMX_VMCS_CTRL_EXEC_VMCS_PTR_FULL 0200Ch
29%define VMX_VMCS_CTRL_EXEC_VMCS_PTR_HIGH 0200Dh
30%define VMX_VMCS_CTRL_TSC_OFFSET_FULL 02010h
31%define VMX_VMCS_CTRL_TSC_OFFSET_HIGH 02011h
32%define VMX_VMCS_CTRL_VAPIC_PAGEADDR_FULL 02012h
33%define VMX_VMCS_CTRL_VAPIC_PAGEADDR_HIGH 02013h
34%define VMX_VMCS_GUEST_LINK_PTR_FULL 02800h
35%define VMX_VMCS_GUEST_LINK_PTR_HIGH 02801h
36%define VMX_VMCS_GUEST_DEBUGCTL_FULL 02802h
37%define VMX_VMCS_GUEST_DEBUGCTL_HIGH 02803h
38%define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS 04000h
39%define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS 04002h
40%define VMX_VMCS_CTRL_EXCEPTION_BITMAP 04004h
41%define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MASK 04006h
42%define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MATCH 04008h
43%define VMX_VMCS_CTRL_CR3_TARGET_COUNT 0400Ah
44%define VMX_VMCS_CTRL_EXIT_CONTROLS 0400Ch
45%define VMX_VMCS_CTRL_EXIT_MSR_STORE_COUNT 0400Eh
46%define VMX_VMCS_CTRL_EXIT_MSR_LOAD_COUNT 04010h
47%define VMX_VMCS_CTRL_ENTRY_CONTROLS 04012h
48%define VMX_VMCS_CTRL_ENTRY_MSR_LOAD_COUNT 04014h
49%define VMX_VMCS_CTRL_ENTRY_IRQ_INFO 04016h
50%define VMX_VMCS_CTRL_ENTRY_EXCEPTION_ERRCODE 04018h
51%define VMX_VMCS_CTRL_ENTRY_INSTR_LENGTH 0401Ah
52%define VMX_VMCS_CTRL_TRP_TRESHOLD 0401Ch
53%define VMX_VMCS_RO_VM_INSTR_ERROR 04400h
54%define VMX_VMCS_RO_EXIT_REASON 04402h
55%define VMX_VMCS_RO_EXIT_INTERRUPTION_INFO 04404h
56%define VMX_VMCS_RO_EXIT_INTERRUPTION_ERRCODE 04406h
57%define VMX_VMCS_RO_IDT_INFO 04408h
58%define VMX_VMCS_RO_IDT_ERRCODE 0440Ah
59%define VMX_VMCS_RO_EXIT_INSTR_LENGTH 0440Ch
60%define VMX_VMCS_RO_EXIT_INSTR_INFO 0440Eh
61%define VMX_VMCS_GUEST_ES_LIMIT 04800h
62%define VMX_VMCS_GUEST_CS_LIMIT 04802h
63%define VMX_VMCS_GUEST_SS_LIMIT 04804h
64%define VMX_VMCS_GUEST_DS_LIMIT 04806h
65%define VMX_VMCS_GUEST_FS_LIMIT 04808h
66%define VMX_VMCS_GUEST_GS_LIMIT 0480Ah
67%define VMX_VMCS_GUEST_LDTR_LIMIT 0480Ch
68%define VMX_VMCS_GUEST_TR_LIMIT 0480Eh
69%define VMX_VMCS_GUEST_GDTR_LIMIT 04810h
70%define VMX_VMCS_GUEST_IDTR_LIMIT 04812h
71%define VMX_VMCS_GUEST_ES_ACCESS_RIGHTS 04814h
72%define VMX_VMCS_GUEST_CS_ACCESS_RIGHTS 04816h
73%define VMX_VMCS_GUEST_SS_ACCESS_RIGHTS 04818h
74%define VMX_VMCS_GUEST_DS_ACCESS_RIGHTS 0481Ah
75%define VMX_VMCS_GUEST_FS_ACCESS_RIGHTS 0481Ch
76%define VMX_VMCS_GUEST_GS_ACCESS_RIGHTS 0481Eh
77%define VMX_VMCS_GUEST_LDTR_ACCESS_RIGHTS 04820h
78%define VMX_VMCS_GUEST_TR_ACCESS_RIGHTS 04822h
79%define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE 04824h
80%define VMX_VMCS_GUEST_ACTIVITY_STATE 04826h
81%define VMX_VMCS_GUEST_SYSENTER_CS 0482Ah
82%define VMX_VMCS_CTRL_CR0_MASK 06000h
83%define VMX_VMCS_CTRL_CR4_MASK 06002h
84%define VMX_VMCS_CTRL_CR0_READ_SHADOW 06004h
85%define VMX_VMCS_CTRL_CR4_READ_SHADOW 06006h
86%define VMX_VMCS_CTRL_CR3_TARGET_VAL0 06008h
87%define VMX_VMCS_CTRL_CR3_TARGET_VAL1 0600Ah
88%define VMX_VMCS_CTRL_CR3_TARGET_VAL2 0600Ch
89%define VMX_VMCS_CTRL_CR3_TARGET_VAL31 0600Eh
90%define VMX_VMCS_RO_EXIT_QUALIFICATION 06400h
91%define VMX_VMCS_RO_IO_RCX 06402h
92%define VMX_VMCS_RO_IO_RSX 06404h
93%define VMX_VMCS_RO_IO_RDI 06406h
94%define VMX_VMCS_RO_IO_RIP 06408h
95%define VMX_VMCS_GUEST_LINEAR_ADDR 0640Ah
96%define VMX_VMCS_GUEST_CR0 06800h
97%define VMX_VMCS_GUEST_CR3 06802h
98%define VMX_VMCS_GUEST_CR4 06804h
99%define VMX_VMCS_GUEST_ES_BASE 06806h
100%define VMX_VMCS_GUEST_CS_BASE 06808h
101%define VMX_VMCS_GUEST_SS_BASE 0680Ah
102%define VMX_VMCS_GUEST_DS_BASE 0680Ch
103%define VMX_VMCS_GUEST_FS_BASE 0680Eh
104%define VMX_VMCS_GUEST_GS_BASE 06810h
105%define VMX_VMCS_GUEST_LDTR_BASE 06812h
106%define VMX_VMCS_GUEST_TR_BASE 06814h
107%define VMX_VMCS_GUEST_GDTR_BASE 06816h
108%define VMX_VMCS_GUEST_IDTR_BASE 06818h
109%define VMX_VMCS_GUEST_DR7 0681Ah
110%define VMX_VMCS_GUEST_RSP 0681Ch
111%define VMX_VMCS_GUEST_RIP 0681Eh
112%define VMX_VMCS_GUEST_RFLAGS 06820h
113%define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS 06822h
114%define VMX_VMCS_GUEST_SYSENTER_ESP 06824h
115%define VMX_VMCS_GUEST_SYSENTER_EIP 06826h
116%define VMX_VMCS_HOST_CR0 06C00h
117%define VMX_VMCS_HOST_CR3 06C02h
118%define VMX_VMCS_HOST_CR4 06C04h
119%define VMX_VMCS_HOST_FS_BASE 06C06h
120%define VMX_VMCS_HOST_GS_BASE 06C08h
121%define VMX_VMCS_HOST_TR_BASE 06C0Ah
122%define VMX_VMCS_HOST_GDTR_BASE 06C0Ch
123%define VMX_VMCS_HOST_IDTR_BASE 06C0Eh
124%define VMX_VMCS_HOST_SYSENTER_ESP 06C10h
125%define VMX_VMCS_HOST_SYSENTER_EIP 06C12h
126%define VMX_VMCS_HOST_RSP 06C14h
127%define VMX_VMCS_HOST_RIP 06C16h
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