drm.h@ 17233

最後變更在這個檔案從17233是 17232,由 vboxsync 提交於 16 年前
Additions/x11/x11include: added header files needed for DRI support in vboxvideo
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1	/**
2	* \file drm.h
3	* Header for the Direct Rendering Manager
4	*
5	* \author Rickard E. (Rik) Faith <[email protected]>
6	*
7	* \par Acknowledgments:
8	* Dec 1999, Richard Henderson <[email protected]>, move to generic \c cmpxchg.
9	*/
10
11	/*
12	* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
13	* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
14	* All rights reserved.
15	*
16	* Permission is hereby granted, free of charge, to any person obtaining a
17	* copy of this software and associated documentation files (the "Software"),
18	* to deal in the Software without restriction, including without limitation
19	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
20	* and/or sell copies of the Software, and to permit persons to whom the
21	* Software is furnished to do so, subject to the following conditions:
22	*
23	* The above copyright notice and this permission notice (including the next
24	* paragraph) shall be included in all copies or substantial portions of the
25	* Software.
26	*
27	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
28	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
31	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
32	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
33	* OTHER DEALINGS IN THE SOFTWARE.
34	*/
35
36	/**
37	* \mainpage
38	*
39	* The Direct Rendering Manager (DRM) is a device-independent kernel-level
40	* device driver that provides support for the XFree86 Direct Rendering
41	* Infrastructure (DRI).
42	*
43	* The DRM supports the Direct Rendering Infrastructure (DRI) in four major
44	* ways:
45	* -# The DRM provides synchronized access to the graphics hardware via
46	* the use of an optimized two-tiered lock.
47	* -# The DRM enforces the DRI security policy for access to the graphics
48	* hardware by only allowing authenticated X11 clients access to
49	* restricted regions of memory.
50	* -# The DRM provides a generic DMA engine, complete with multiple
51	* queues and the ability to detect the need for an OpenGL context
52	* switch.
53	* -# The DRM is extensible via the use of small device-specific modules
54	* that rely extensively on the API exported by the DRM module.
55	*
56	*/
57
58	#ifndef _DRM_H_
59	#define _DRM_H_
60
61	#ifndef __user
62	#define __user
63	#endif
64
65	#ifdef __GNUC__
66	# define DEPRECATED __attribute__ ((deprecated))
67	#else
68	# define DEPRECATED
69	#endif
70
71	#if defined(__linux__)
72	#if defined(__KERNEL__)
73	#include <linux/config.h>
74	#endif
75	#include <asm/ioctl.h> /* For _IO* macros */
76	#define DRM_IOCTL_NR(n) _IOC_NR(n)
77	#define DRM_IOC_VOID _IOC_NONE
78	#define DRM_IOC_READ _IOC_READ
79	#define DRM_IOC_WRITE _IOC_WRITE
80	#define DRM_IOC_READWRITE _IOC_READ\|_IOC_WRITE
81	#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
82	#elif defined(__FreeBSD__) \|\| defined(__NetBSD__) \|\| defined(__OpenBSD__) \|\| defined(__DragonFly__)
83	#if defined(__FreeBSD__) && defined(IN_MODULE)
84	/* Prevent name collision when including sys/ioccom.h */
85	#undef ioctl
86	#include <sys/ioccom.h>
87	#define ioctl(a,b,c) xf86ioctl(a,b,c)
88	#else
89	#include <sys/ioccom.h>
90	#endif /* __FreeBSD__ && xf86ioctl */
91	#define DRM_IOCTL_NR(n) ((n) & 0xff)
92	#define DRM_IOC_VOID IOC_VOID
93	#define DRM_IOC_READ IOC_OUT
94	#define DRM_IOC_WRITE IOC_IN
95	#define DRM_IOC_READWRITE IOC_INOUT
96	#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
97	#endif
98
99	#define XFREE86_VERSION(major,minor,patch,snap) \
100	((major << 16) \| (minor << 8) \| patch)
101
102	#ifndef CONFIG_XFREE86_VERSION
103	#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
104	#endif
105
106	#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
107	#define DRM_PROC_DEVICES "/proc/devices"
108	#define DRM_PROC_MISC "/proc/misc"
109	#define DRM_PROC_DRM "/proc/drm"
110	#define DRM_DEV_DRM "/dev/drm"
111	#define DRM_DEV_MODE (S_IRUSR\|S_IWUSR\|S_IRGRP\|S_IWGRP)
112	#define DRM_DEV_UID 0
113	#define DRM_DEV_GID 0
114	#endif
115
116	#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
117	#ifdef __OpenBSD__
118	#define DRM_MAJOR 81
119	#endif
120	#if defined(__linux__) \|\| defined(__NetBSD__)
121	#define DRM_MAJOR 226
122	#endif
123	#define DRM_MAX_MINOR 15
124	#endif
125	#define DRM_NAME "drm" /*< Name in kernel, /dev, and /proc /
126	#define DRM_MIN_ORDER 5 /*< At least 2^5 bytes = 32 bytes /
127	#define DRM_MAX_ORDER 22 /*< Up to 2^22 bytes = 4MB /
128	#define DRM_RAM_PERCENT 10 /*< How much system ram can we lock? /
129
130	#define _DRM_LOCK_HELD 0x80000000U /*< Hardware lock is held /
131	#define _DRM_LOCK_CONT 0x40000000U /*< Hardware lock is contended /
132	#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
133	#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
134	#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD\|_DRM_LOCK_CONT))
135
136	#if defined(__linux__)
137	typedef unsigned int drm_handle_t;
138	#else
139	typedef unsigned long drm_handle_t; /*< To mapped regions /
140	#endif
141	typedef unsigned int drm_context_t; /*< GLXContext handle /
142	typedef unsigned int drm_drawable_t;
143	typedef unsigned int drm_magic_t; /*< Magic for authentication /
144
145	/**
146	* Cliprect.
147	*
148	* \warning If you change this structure, make sure you change
149	* XF86DRIClipRectRec in the server as well
150	*
151	* \note KW: Actually it's illegal to change either for
152	* backwards-compatibility reasons.
153	*/
154	typedef struct drm_clip_rect {
155	unsigned short x1;
156	unsigned short y1;
157	unsigned short x2;
158	unsigned short y2;
159	} drm_clip_rect_t;
160
161	/**
162	* Texture region,
163	*/
164	typedef struct drm_tex_region {
165	unsigned char next;
166	unsigned char prev;
167	unsigned char in_use;
168	unsigned char padding;
169	unsigned int age;
170	} drm_tex_region_t;
171
172	/**
173	* Hardware lock.
174	*
175	* The lock structure is a simple cache-line aligned integer. To avoid
176	* processor bus contention on a multiprocessor system, there should not be any
177	* other data stored in the same cache line.
178	*/
179	typedef struct drm_hw_lock {
180	__volatile__ unsigned int lock; /*< lock variable /
181	char padding[60]; /*< Pad to cache line /
182	} drm_hw_lock_t;
183
184	/* This is beyond ugly, and only works on GCC. However, it allows me to use
185	* drm.h in places (i.e., in the X-server) where I can't use size_t. The real
186	* fix is to use uint32_t instead of size_t, but that fix will break existing
187	* LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That will
188	* eventually happen, though. I chose 'unsigned long' to be the fallback type
189	* because that works on all the platforms I know about. Hopefully, the
190	* real fix will happen before that bites us.
191	*/
192
193	#ifdef __SIZE_TYPE__
194	# define DRM_SIZE_T __SIZE_TYPE__
195	#else
196	# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!"
197	# define DRM_SIZE_T unsigned long
198	#endif
199
200	/**
201	* DRM_IOCTL_VERSION ioctl argument type.
202	*
203	* \sa drmGetVersion().
204	*/
205	typedef struct drm_version {
206	int version_major; /*< Major version /
207	int version_minor; /*< Minor version /
208	int version_patchlevel; /*< Patch level /
209	DRM_SIZE_T name_len; /*< Length of name buffer /
210	char __user name; /< Name of driver /
211	DRM_SIZE_T date_len; /*< Length of date buffer /
212	char __user date; /< User-space buffer to hold date /
213	DRM_SIZE_T desc_len; /*< Length of desc buffer /
214	char __user desc; /< User-space buffer to hold desc /
215	} drm_version_t;
216
217	/**
218	* DRM_IOCTL_GET_UNIQUE ioctl argument type.
219	*
220	* \sa drmGetBusid() and drmSetBusId().
221	*/
222	typedef struct drm_unique {
223	DRM_SIZE_T unique_len; /*< Length of unique /
224	char __user unique; /< Unique name for driver instantiation /
225	} drm_unique_t;
226
227	#undef DRM_SIZE_T
228
229	typedef struct drm_list {
230	int count; /*< Length of user-space structures /
231	drm_version_t __user *version;
232	} drm_list_t;
233
234	typedef struct drm_block {
235	int unused;
236	} drm_block_t;
237
238	/**
239	* DRM_IOCTL_CONTROL ioctl argument type.
240	*
241	* \sa drmCtlInstHandler() and drmCtlUninstHandler().
242	*/
243	typedef struct drm_control {
244	enum {
245	DRM_ADD_COMMAND,
246	DRM_RM_COMMAND,
247	DRM_INST_HANDLER,
248	DRM_UNINST_HANDLER
249	} func;
250	int irq;
251	} drm_control_t;
252
253	/**
254	* Type of memory to map.
255	*/
256	typedef enum drm_map_type {
257	_DRM_FRAME_BUFFER = 0, /*< WC (no caching), no core dump /
258	_DRM_REGISTERS = 1, /*< no caching, no core dump /
259	_DRM_SHM = 2, /*< shared, cached /
260	_DRM_AGP = 3, /*< AGP/GART /
261	_DRM_SCATTER_GATHER = 4, /*< Scatter/gather memory for PCI DMA /
262	_DRM_CONSISTENT = 5 /*< Consistent memory for PCI DMA /
263	} drm_map_type_t;
264
265	/**
266	* Memory mapping flags.
267	*/
268	typedef enum drm_map_flags {
269	_DRM_RESTRICTED = 0x01, /*< Cannot be mapped to user-virtual /
270	_DRM_READ_ONLY = 0x02,
271	_DRM_LOCKED = 0x04, /*< shared, cached, locked /
272	_DRM_KERNEL = 0x08, /*< kernel requires access /
273	_DRM_WRITE_COMBINING = 0x10, /*< use write-combining if available /
274	_DRM_CONTAINS_LOCK = 0x20, /*< SHM page that contains lock /
275	_DRM_REMOVABLE = 0x40 /*< Removable mapping /
276	} drm_map_flags_t;
277
278	typedef struct drm_ctx_priv_map {
279	unsigned int ctx_id; /*< Context requesting private mapping /
280	void handle; /< Handle of map /
281	} drm_ctx_priv_map_t;
282
283	/**
284	* DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
285	* argument type.
286	*
287	* \sa drmAddMap().
288	*/
289	typedef struct drm_map {
290	unsigned long offset; /*< Requested physical address (0 for SAREA)/
291	unsigned long size; /*< Requested physical size (bytes) /
292	drm_map_type_t type; /*< Type of memory to map /
293	drm_map_flags_t flags; /*< Flags /
294	void handle; /< User-space: "Handle" to pass to mmap() /
295	/*< Kernel-space: kernel-virtual address /
296	int mtrr; /*< MTRR slot used /
297	/* Private data */
298	} drm_map_t;
299
300	/**
301	* DRM_IOCTL_GET_CLIENT ioctl argument type.
302	*/
303	typedef struct drm_client {
304	int idx; /*< Which client desired? /
305	int auth; /*< Is client authenticated? /
306	unsigned long pid; /*< Process ID /
307	unsigned long uid; /*< User ID /
308	unsigned long magic; /*< Magic /
309	unsigned long iocs; /*< Ioctl count /
310	} drm_client_t;
311
312	typedef enum {
313	_DRM_STAT_LOCK,
314	_DRM_STAT_OPENS,
315	_DRM_STAT_CLOSES,
316	_DRM_STAT_IOCTLS,
317	_DRM_STAT_LOCKS,
318	_DRM_STAT_UNLOCKS,
319	_DRM_STAT_VALUE, /*< Generic value /
320	_DRM_STAT_BYTE, /*< Generic byte counter (1024bytes/K) /
321	_DRM_STAT_COUNT, /*< Generic non-byte counter (1000/k) /
322
323	_DRM_STAT_IRQ, /*< IRQ /
324	_DRM_STAT_PRIMARY, /*< Primary DMA bytes /
325	_DRM_STAT_SECONDARY, /*< Secondary DMA bytes /
326	_DRM_STAT_DMA, /*< DMA /
327	_DRM_STAT_SPECIAL, /*< Special DMA (e.g., priority or polled) /
328	_DRM_STAT_MISSED /*< Missed DMA opportunity /
329	/* Add to the END of the list */
330	} drm_stat_type_t;
331
332	/**
333	* DRM_IOCTL_GET_STATS ioctl argument type.
334	*/
335	typedef struct drm_stats {
336	unsigned long count;
337	struct {
338	unsigned long value;
339	drm_stat_type_t type;
340	} data[15];
341	} drm_stats_t;
342
343	/**
344	* Hardware locking flags.
345	*/
346	typedef enum drm_lock_flags {
347	_DRM_LOCK_READY = 0x01, /*< Wait until hardware is ready for DMA /
348	_DRM_LOCK_QUIESCENT = 0x02, /*< Wait until hardware quiescent /
349	_DRM_LOCK_FLUSH = 0x04, /*< Flush this context's DMA queue first /
350	_DRM_LOCK_FLUSH_ALL = 0x08, /*< Flush all DMA queues first /
351	/* These HALT flags aren't supported yet
352	-- they will be used to support the
353	full-screen DGA-like mode. */
354	_DRM_HALT_ALL_QUEUES = 0x10, /*< Halt all current and future queues /
355	_DRM_HALT_CUR_QUEUES = 0x20 /*< Halt all current queues /
356	} drm_lock_flags_t;
357
358	/**
359	* DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
360	*
361	* \sa drmGetLock() and drmUnlock().
362	*/
363	typedef struct drm_lock {
364	int context;
365	drm_lock_flags_t flags;
366	} drm_lock_t;
367
368	/**
369	* DMA flags
370	*
371	* \warning
372	* These values \e must match xf86drm.h.
373	*
374	* \sa drm_dma.
375	*/
376	typedef enum drm_dma_flags {
377	/* Flags for DMA buffer dispatch */
378	_DRM_DMA_BLOCK = 0x01, /**<
379	* Block until buffer dispatched.
380	*
381	* \note The buffer may not yet have
382	* been processed by the hardware --
383	* getting a hardware lock with the
384	* hardware quiescent will ensure
385	* that the buffer has been
386	* processed.
387	*/
388	_DRM_DMA_WHILE_LOCKED = 0x02, /*< Dispatch while lock held /
389	_DRM_DMA_PRIORITY = 0x04, /*< High priority dispatch /
390
391	/* Flags for DMA buffer request */
392	_DRM_DMA_WAIT = 0x10, /*< Wait for free buffers /
393	_DRM_DMA_SMALLER_OK = 0x20, /*< Smaller-than-requested buffers OK /
394	_DRM_DMA_LARGER_OK = 0x40 /*< Larger-than-requested buffers OK /
395	} drm_dma_flags_t;
396
397	/**
398	* DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
399	*
400	* \sa drmAddBufs().
401	*/
402	typedef struct drm_buf_desc {
403	int count; /*< Number of buffers of this size /
404	int size; /*< Size in bytes /
405	int low_mark; /*< Low water mark /
406	int high_mark; /*< High water mark /
407	enum {
408	_DRM_PAGE_ALIGN = 0x01, /*< Align on page boundaries for DMA /
409	_DRM_AGP_BUFFER = 0x02, /*< Buffer is in AGP space /
410	_DRM_SG_BUFFER = 0x04, /*< Scatter/gather memory buffer /
411	_DRM_FB_BUFFER = 0x08 /*< Buffer is in frame buffer /
412	} flags;
413	unsigned long agp_start; /**<
414	* Start address of where the AGP buffers are
415	* in the AGP aperture
416	*/
417	} drm_buf_desc_t;
418
419	/**
420	* DRM_IOCTL_INFO_BUFS ioctl argument type.
421	*/
422	typedef struct drm_buf_info {
423	int count; /*< Number of buffers described in list /
424	drm_buf_desc_t __user list; /< List of buffer descriptions /
425	} drm_buf_info_t;
426
427	/**
428	* DRM_IOCTL_FREE_BUFS ioctl argument type.
429	*/
430	typedef struct drm_buf_free {
431	int count;
432	int __user *list;
433	} drm_buf_free_t;
434
435	/**
436	* Buffer information
437	*
438	* \sa drm_buf_map.
439	*/
440	typedef struct drm_buf_pub {
441	int idx; /*< Index into the master buffer list /
442	int total; /*< Buffer size /
443	int used; /*< Amount of buffer in use (for DMA) /
444	void __user address; /< Address of buffer /
445	} drm_buf_pub_t;
446
447	/**
448	* DRM_IOCTL_MAP_BUFS ioctl argument type.
449	*/
450	typedef struct drm_buf_map {
451	int count; /*< Length of the buffer list /
452	#if defined(__cplusplus)
453	void __user *c_virtual;
454	#else
455	void __user virtual; /< Mmap'd area in user-virtual /
456	#endif
457	drm_buf_pub_t __user list; /< Buffer information /
458	} drm_buf_map_t;
459
460	/**
461	* DRM_IOCTL_DMA ioctl argument type.
462	*
463	* Indices here refer to the offset into the buffer list in drm_buf_get.
464	*
465	* \sa drmDMA().
466	*/
467	typedef struct drm_dma {
468	int context; /*< Context handle /
469	int send_count; /*< Number of buffers to send /
470	int __user send_indices; /< List of handles to buffers /
471	int __user send_sizes; /< Lengths of data to send /
472	drm_dma_flags_t flags; /*< Flags /
473	int request_count; /*< Number of buffers requested /
474	int request_size; /*< Desired size for buffers /
475	int __user request_indices; /< Buffer information /
476	int __user *request_sizes;
477	int granted_count; /*< Number of buffers granted /
478	} drm_dma_t;
479
480	typedef enum {
481	_DRM_CONTEXT_PRESERVED = 0x01,
482	_DRM_CONTEXT_2DONLY = 0x02
483	} drm_ctx_flags_t;
484
485	/**
486	* DRM_IOCTL_ADD_CTX ioctl argument type.
487	*
488	* \sa drmCreateContext() and drmDestroyContext().
489	*/
490	typedef struct drm_ctx {
491	drm_context_t handle;
492	drm_ctx_flags_t flags;
493	} drm_ctx_t;
494
495	/**
496	* DRM_IOCTL_RES_CTX ioctl argument type.
497	*/
498	typedef struct drm_ctx_res {
499	int count;
500	drm_ctx_t __user *contexts;
501	} drm_ctx_res_t;
502
503	/**
504	* DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
505	*/
506	typedef struct drm_draw {
507	drm_drawable_t handle;
508	} drm_draw_t;
509
510	/**
511	* DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
512	*/
513	typedef struct drm_auth {
514	drm_magic_t magic;
515	} drm_auth_t;
516
517	/**
518	* DRM_IOCTL_IRQ_BUSID ioctl argument type.
519	*
520	* \sa drmGetInterruptFromBusID().
521	*/
522	typedef struct drm_irq_busid {
523	int irq; /*< IRQ number /
524	int busnum; /*< bus number /
525	int devnum; /*< device number /
526	int funcnum; /*< function number /
527	} drm_irq_busid_t;
528
529	typedef enum {
530	_DRM_VBLANK_ABSOLUTE = 0x0, /*< Wait for specific vblank sequence number /
531	_DRM_VBLANK_RELATIVE = 0x1, /*< Wait for given number of vblanks /
532	_DRM_VBLANK_SIGNAL = 0x40000000 /*< Send signal instead of blocking /
533	} drm_vblank_seq_type_t;
534
535	#define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
536
537	struct drm_wait_vblank_request {
538	drm_vblank_seq_type_t type;
539	unsigned int sequence;
540	unsigned long signal;
541	};
542
543	struct drm_wait_vblank_reply {
544	drm_vblank_seq_type_t type;
545	unsigned int sequence;
546	long tval_sec;
547	long tval_usec;
548	};
549
550	/**
551	* DRM_IOCTL_WAIT_VBLANK ioctl argument type.
552	*
553	* \sa drmWaitVBlank().
554	*/
555	typedef union drm_wait_vblank {
556	struct drm_wait_vblank_request request;
557	struct drm_wait_vblank_reply reply;
558	} drm_wait_vblank_t;
559
560	/**
561	* DRM_IOCTL_AGP_ENABLE ioctl argument type.
562	*
563	* \sa drmAgpEnable().
564	*/
565	typedef struct drm_agp_mode {
566	unsigned long mode; /*< AGP mode /
567	} drm_agp_mode_t;
568
569	/**
570	* DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
571	*
572	* \sa drmAgpAlloc() and drmAgpFree().
573	*/
574	typedef struct drm_agp_buffer {
575	unsigned long size; /*< In bytes -- will round to page boundary /
576	unsigned long handle; /*< Used for binding / unbinding /
577	unsigned long type; /*< Type of memory to allocate /
578	unsigned long physical; /*< Physical used by i810 /
579	} drm_agp_buffer_t;
580
581	/**
582	* DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
583	*
584	* \sa drmAgpBind() and drmAgpUnbind().
585	*/
586	typedef struct drm_agp_binding {
587	unsigned long handle; /*< From drm_agp_buffer /
588	unsigned long offset; /*< In bytes -- will round to page boundary /
589	} drm_agp_binding_t;
590
591	/**
592	* DRM_IOCTL_AGP_INFO ioctl argument type.
593	*
594	* \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
595	* drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
596	* drmAgpVendorId() and drmAgpDeviceId().
597	*/
598	typedef struct drm_agp_info {
599	int agp_version_major;
600	int agp_version_minor;
601	unsigned long mode;
602	unsigned long aperture_base; /*< physical address /
603	unsigned long aperture_size; /*< bytes /
604	unsigned long memory_allowed; /*< bytes /
605	unsigned long memory_used;
606
607	/** \name PCI information */
608	/@{ /
609	unsigned short id_vendor;
610	unsigned short id_device;
611	/@} /
612	} drm_agp_info_t;
613
614	/**
615	* DRM_IOCTL_SG_ALLOC ioctl argument type.
616	*/
617	typedef struct drm_scatter_gather {
618	unsigned long size; /*< In bytes -- will round to page boundary /
619	unsigned long handle; /*< Used for mapping / unmapping /
620	} drm_scatter_gather_t;
621
622	/**
623	* DRM_IOCTL_SET_VERSION ioctl argument type.
624	*/
625	typedef struct drm_set_version {
626	int drm_di_major;
627	int drm_di_minor;
628	int drm_dd_major;
629	int drm_dd_minor;
630	} drm_set_version_t;
631
632	/**
633	* \name Ioctls Definitions
634	*/
635	/@{/
636
637	#define DRM_IOCTL_BASE 'd'
638	#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
639	#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
640	#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
641	#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
642
643	#define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t)
644	#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
645	#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
646	#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
647	#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t)
648	#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t)
649	#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t)
650	#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t)
651
652	#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
653	#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
654	#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t)
655	#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t)
656	#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t)
657	#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t)
658	#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t)
659	#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t)
660	#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t)
661	#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
662	#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
663
664	#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t)
665
666	#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t)
667	#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t)
668
669	#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
670	#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
671	#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
672	#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t)
673	#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
674	#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t)
675	#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t)
676	#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t)
677	#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t)
678	#define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t)
679	#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t)
680	#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t)
681	#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t)
682
683	#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
684	#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
685	#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t)
686	#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t)
687	#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t)
688	#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t)
689	#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
690	#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
691
692	#define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t)
693	#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t)
694
695	#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t)
696
697	/@}/
698
699	/**
700	* Device specific ioctls should only be in their respective headers
701	* The device specific ioctl range is from 0x40 to 0x79.
702	*
703	* \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
704	* drmCommandReadWrite().
705	*/
706	#define DRM_COMMAND_BASE 0x40
707
708	#endif

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source: vbox/trunk/src/VBox/Additions/x11/x11include/libdrm-2.0.1/drm.h@ 17233

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