| 1 | /* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*-
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| 2 | * Created: Thu Nov 30 20:04:32 2000 by [email protected]
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| 3 | */
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| 4 | /*
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| 5 | * Copyright 2000 Gareth Hughes
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| 6 | * Copyright 2002 Frank C. Earl
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| 7 | * Copyright 2002-2003 Leif Delgass
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| 8 | * All Rights Reserved.
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| 9 | *
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| 10 | * Permission is hereby granted, free of charge, to any person obtaining a
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| 11 | * copy of this software and associated documentation files (the "Software"),
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| 12 | * to deal in the Software without restriction, including without limitation
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| 13 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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| 14 | * and/or sell copies of the Software, and to permit persons to whom the
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| 15 | * Software is furnished to do so, subject to the following conditions:
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| 16 | *
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| 17 | * The above copyright notice and this permission notice (including the next
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| 18 | * paragraph) shall be included in all copies or substantial portions of the
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| 19 | * Software.
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| 20 | *
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| 21 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 22 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 23 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 24 | * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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| 25 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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| 26 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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| 27 | *
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| 28 | * Authors:
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| 29 | * Gareth Hughes <[email protected]>
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| 30 | * Frank C. Earl <[email protected]>
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| 31 | * Leif Delgass <[email protected]>
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| 32 | */
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| 33 |
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| 34 | #ifndef __MACH64_DRM_H__
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| 35 | #define __MACH64_DRM_H__
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| 36 |
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| 37 | /* WARNING: If you change any of these defines, make sure to change the
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| 38 | * defines in the Xserver file (mach64_sarea.h)
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| 39 | */
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| 40 | #ifndef __MACH64_SAREA_DEFINES__
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| 41 | #define __MACH64_SAREA_DEFINES__
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| 42 |
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| 43 | /* What needs to be changed for the current vertex buffer?
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| 44 | * GH: We're going to be pedantic about this. We want the card to do as
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| 45 | * little as possible, so let's avoid having it fetch a whole bunch of
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| 46 | * register values that don't change all that often, if at all.
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| 47 | */
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| 48 | #define MACH64_UPLOAD_DST_OFF_PITCH 0x0001
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| 49 | #define MACH64_UPLOAD_Z_OFF_PITCH 0x0002
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| 50 | #define MACH64_UPLOAD_Z_ALPHA_CNTL 0x0004
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| 51 | #define MACH64_UPLOAD_SCALE_3D_CNTL 0x0008
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| 52 | #define MACH64_UPLOAD_DP_FOG_CLR 0x0010
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| 53 | #define MACH64_UPLOAD_DP_WRITE_MASK 0x0020
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| 54 | #define MACH64_UPLOAD_DP_PIX_WIDTH 0x0040
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| 55 | #define MACH64_UPLOAD_SETUP_CNTL 0x0080
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| 56 | #define MACH64_UPLOAD_MISC 0x0100
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| 57 | #define MACH64_UPLOAD_TEXTURE 0x0200
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| 58 | #define MACH64_UPLOAD_TEX0IMAGE 0x0400
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| 59 | #define MACH64_UPLOAD_TEX1IMAGE 0x0800
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| 60 | #define MACH64_UPLOAD_CLIPRECTS 0x1000 /* handled client-side */
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| 61 | #define MACH64_UPLOAD_CONTEXT 0x00ff
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| 62 | #define MACH64_UPLOAD_ALL 0x1fff
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| 63 |
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| 64 | /* DMA buffer size
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| 65 | */
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| 66 | #define MACH64_BUFFER_SIZE 16384
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| 67 |
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| 68 | /* Max number of swaps allowed on the ring
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| 69 | * before the client must wait
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| 70 | */
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| 71 | #define MACH64_MAX_QUEUED_FRAMES 3
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| 72 |
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| 73 | /* Byte offsets for host blit buffer data
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| 74 | */
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| 75 | #define MACH64_HOSTDATA_BLIT_OFFSET 104
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| 76 |
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| 77 | /* Keep these small for testing.
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| 78 | */
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| 79 | #define MACH64_NR_SAREA_CLIPRECTS 8
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| 80 |
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| 81 | #define MACH64_CARD_HEAP 0
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| 82 | #define MACH64_AGP_HEAP 1
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| 83 | #define MACH64_NR_TEX_HEAPS 2
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| 84 | #define MACH64_NR_TEX_REGIONS 64
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| 85 | #define MACH64_LOG_TEX_GRANULARITY 16
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| 86 |
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| 87 | #define MACH64_TEX_MAXLEVELS 1
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| 88 |
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| 89 | #define MACH64_NR_CONTEXT_REGS 15
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| 90 | #define MACH64_NR_TEXTURE_REGS 4
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| 91 |
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| 92 | #endif /* __MACH64_SAREA_DEFINES__ */
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| 93 |
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| 94 | typedef struct {
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| 95 | unsigned int dst_off_pitch;
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| 96 |
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| 97 | unsigned int z_off_pitch;
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| 98 | unsigned int z_cntl;
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| 99 | unsigned int alpha_tst_cntl;
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| 100 |
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| 101 | unsigned int scale_3d_cntl;
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| 102 |
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| 103 | unsigned int sc_left_right;
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| 104 | unsigned int sc_top_bottom;
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| 105 |
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| 106 | unsigned int dp_fog_clr;
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| 107 | unsigned int dp_write_mask;
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| 108 | unsigned int dp_pix_width;
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| 109 | unsigned int dp_mix;
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| 110 | unsigned int dp_src;
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| 111 |
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| 112 | unsigned int clr_cmp_cntl;
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| 113 | unsigned int gui_traj_cntl;
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| 114 |
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| 115 | unsigned int setup_cntl;
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| 116 |
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| 117 | unsigned int tex_size_pitch;
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| 118 | unsigned int tex_cntl;
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| 119 | unsigned int secondary_tex_off;
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| 120 | unsigned int tex_offset;
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| 121 | } drm_mach64_context_regs_t;
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| 122 |
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| 123 | typedef struct drm_mach64_sarea {
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| 124 | /* The channel for communication of state information to the kernel
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| 125 | * on firing a vertex dma buffer.
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| 126 | */
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| 127 | drm_mach64_context_regs_t context_state;
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| 128 | unsigned int dirty;
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| 129 | unsigned int vertsize;
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| 130 |
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| 131 | /* The current cliprects, or a subset thereof.
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| 132 | */
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| 133 | drm_clip_rect_t boxes[MACH64_NR_SAREA_CLIPRECTS];
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| 134 | unsigned int nbox;
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| 135 |
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| 136 | /* Counters for client-side throttling of rendering clients.
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| 137 | */
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| 138 | unsigned int frames_queued;
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| 139 |
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| 140 | /* Texture memory LRU.
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| 141 | */
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| 142 | drm_tex_region_t tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS +
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| 143 | 1];
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| 144 | unsigned int tex_age[MACH64_NR_TEX_HEAPS];
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| 145 | int ctx_owner;
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| 146 | } drm_mach64_sarea_t;
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| 147 |
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| 148 | /* WARNING: If you change any of these defines, make sure to change the
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| 149 | * defines in the Xserver file (mach64_common.h)
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| 150 | */
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| 151 |
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| 152 | /* Mach64 specific ioctls
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| 153 | * The device specific ioctl range is 0x40 to 0x79.
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| 154 | */
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| 155 |
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| 156 | #define DRM_MACH64_INIT 0x00
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| 157 | #define DRM_MACH64_IDLE 0x01
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| 158 | #define DRM_MACH64_RESET 0x02
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| 159 | #define DRM_MACH64_SWAP 0x03
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| 160 | #define DRM_MACH64_CLEAR 0x04
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| 161 | #define DRM_MACH64_VERTEX 0x05
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| 162 | #define DRM_MACH64_BLIT 0x06
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| 163 | #define DRM_MACH64_FLUSH 0x07
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| 164 | #define DRM_MACH64_GETPARAM 0x08
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| 165 |
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| 166 | #define DRM_IOCTL_MACH64_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t)
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| 167 | #define DRM_IOCTL_MACH64_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_IDLE )
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| 168 | #define DRM_IOCTL_MACH64_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_RESET )
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| 169 | #define DRM_IOCTL_MACH64_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_SWAP )
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| 170 | #define DRM_IOCTL_MACH64_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t)
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| 171 | #define DRM_IOCTL_MACH64_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t)
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| 172 | #define DRM_IOCTL_MACH64_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t)
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| 173 | #define DRM_IOCTL_MACH64_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_FLUSH )
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| 174 | #define DRM_IOCTL_MACH64_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t)
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| 175 |
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| 176 | /* Buffer flags for clears
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| 177 | */
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| 178 | #define MACH64_FRONT 0x1
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| 179 | #define MACH64_BACK 0x2
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| 180 | #define MACH64_DEPTH 0x4
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| 181 |
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| 182 | /* Primitive types for vertex buffers
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| 183 | */
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| 184 | #define MACH64_PRIM_POINTS 0x00000000
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| 185 | #define MACH64_PRIM_LINES 0x00000001
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| 186 | #define MACH64_PRIM_LINE_LOOP 0x00000002
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| 187 | #define MACH64_PRIM_LINE_STRIP 0x00000003
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| 188 | #define MACH64_PRIM_TRIANGLES 0x00000004
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| 189 | #define MACH64_PRIM_TRIANGLE_STRIP 0x00000005
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| 190 | #define MACH64_PRIM_TRIANGLE_FAN 0x00000006
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| 191 | #define MACH64_PRIM_QUADS 0x00000007
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| 192 | #define MACH64_PRIM_QUAD_STRIP 0x00000008
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| 193 | #define MACH64_PRIM_POLYGON 0x00000009
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| 194 |
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| 195 | typedef enum _drm_mach64_dma_mode_t {
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| 196 | MACH64_MODE_DMA_ASYNC,
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| 197 | MACH64_MODE_DMA_SYNC,
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| 198 | MACH64_MODE_MMIO
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| 199 | } drm_mach64_dma_mode_t;
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| 200 |
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| 201 | typedef struct drm_mach64_init {
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| 202 | enum {
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| 203 | DRM_MACH64_INIT_DMA = 0x01,
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| 204 | DRM_MACH64_CLEANUP_DMA = 0x02
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| 205 | } func;
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| 206 |
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| 207 | unsigned long sarea_priv_offset;
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| 208 | int is_pci;
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| 209 | drm_mach64_dma_mode_t dma_mode;
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| 210 |
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| 211 | unsigned int fb_bpp;
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| 212 | unsigned int front_offset, front_pitch;
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| 213 | unsigned int back_offset, back_pitch;
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| 214 |
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| 215 | unsigned int depth_bpp;
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| 216 | unsigned int depth_offset, depth_pitch;
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| 217 |
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| 218 | unsigned long fb_offset;
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| 219 | unsigned long mmio_offset;
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| 220 | unsigned long ring_offset;
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| 221 | unsigned long buffers_offset;
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| 222 | unsigned long agp_textures_offset;
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| 223 | } drm_mach64_init_t;
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| 224 |
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| 225 | typedef struct drm_mach64_clear {
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| 226 | unsigned int flags;
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| 227 | int x, y, w, h;
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| 228 | unsigned int clear_color;
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| 229 | unsigned int clear_depth;
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| 230 | } drm_mach64_clear_t;
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| 231 |
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| 232 | typedef struct drm_mach64_vertex {
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| 233 | int prim;
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| 234 | void *buf; /* Address of vertex buffer */
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| 235 | unsigned long used; /* Number of bytes in buffer */
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| 236 | int discard; /* Client finished with buffer? */
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| 237 | } drm_mach64_vertex_t;
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| 238 |
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| 239 | typedef struct drm_mach64_blit {
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| 240 | int idx;
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| 241 | int pitch;
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| 242 | int offset;
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| 243 | int format;
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| 244 | unsigned short x, y;
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| 245 | unsigned short width, height;
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| 246 | } drm_mach64_blit_t;
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| 247 |
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| 248 | typedef struct drm_mach64_getparam {
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| 249 | enum {
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| 250 | MACH64_PARAM_FRAMES_QUEUED = 0x01,
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| 251 | MACH64_PARAM_IRQ_NR = 0x02
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| 252 | } param;
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| 253 | void *value;
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| 254 | } drm_mach64_getparam_t;
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| 255 |
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| 256 | #endif
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