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source: vbox/trunk/src/VBox/Additions/x11/x11include/libdrm-2.3.1/drm.h@ 19287

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1/**
2 * \file drm.h
3 * Header for the Direct Rendering Manager
4 *
5 * \author Rickard E. (Rik) Faith <[email protected]>
6 *
7 * \par Acknowledgments:
8 * Dec 1999, Richard Henderson <[email protected]>, move to generic \c cmpxchg.
9 */
10
11/*
12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
14 * All rights reserved.
15 *
16 * Permission is hereby granted, free of charge, to any person obtaining a
17 * copy of this software and associated documentation files (the "Software"),
18 * to deal in the Software without restriction, including without limitation
19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
20 * and/or sell copies of the Software, and to permit persons to whom the
21 * Software is furnished to do so, subject to the following conditions:
22 *
23 * The above copyright notice and this permission notice (including the next
24 * paragraph) shall be included in all copies or substantial portions of the
25 * Software.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
28 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
31 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
33 * OTHER DEALINGS IN THE SOFTWARE.
34 */
35
36/**
37 * \mainpage
38 *
39 * The Direct Rendering Manager (DRM) is a device-independent kernel-level
40 * device driver that provides support for the XFree86 Direct Rendering
41 * Infrastructure (DRI).
42 *
43 * The DRM supports the Direct Rendering Infrastructure (DRI) in four major
44 * ways:
45 * -# The DRM provides synchronized access to the graphics hardware via
46 * the use of an optimized two-tiered lock.
47 * -# The DRM enforces the DRI security policy for access to the graphics
48 * hardware by only allowing authenticated X11 clients access to
49 * restricted regions of memory.
50 * -# The DRM provides a generic DMA engine, complete with multiple
51 * queues and the ability to detect the need for an OpenGL context
52 * switch.
53 * -# The DRM is extensible via the use of small device-specific modules
54 * that rely extensively on the API exported by the DRM module.
55 *
56 */
57
58#ifndef _DRM_H_
59#define _DRM_H_
60
61#ifndef __user
62#define __user
63#endif
64#ifndef __iomem
65#define __iomem
66#endif
67
68#ifdef __GNUC__
69# define DEPRECATED __attribute__ ((deprecated))
70#else
71# define DEPRECATED
72#endif
73
74#if defined(__linux__)
75#include <asm/ioctl.h> /* For _IO* macros */
76#define DRM_IOCTL_NR(n) _IOC_NR(n)
77#define DRM_IOC_VOID _IOC_NONE
78#define DRM_IOC_READ _IOC_READ
79#define DRM_IOC_WRITE _IOC_WRITE
80#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
81#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
82#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__)
83#include <sys/ioccom.h>
84#define DRM_IOCTL_NR(n) ((n) & 0xff)
85#define DRM_IOC_VOID IOC_VOID
86#define DRM_IOC_READ IOC_OUT
87#define DRM_IOC_WRITE IOC_IN
88#define DRM_IOC_READWRITE IOC_INOUT
89#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
90#endif
91
92#ifdef __OpenBSD__
93#define DRM_MAJOR 81
94#endif
95#if defined(__linux__) || defined(__NetBSD__)
96#define DRM_MAJOR 226
97#endif
98#define DRM_MAX_MINOR 15
99
100#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
101#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
102#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
103#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
104
105#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
106#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
107#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
108#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
109#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
110
111#if defined(__linux__)
112typedef unsigned int drm_handle_t;
113#else
114#include <sys/types.h>
115typedef unsigned long drm_handle_t; /**< To mapped regions */
116#endif
117typedef unsigned int drm_context_t; /**< GLXContext handle */
118typedef unsigned int drm_drawable_t;
119typedef unsigned int drm_magic_t; /**< Magic for authentication */
120
121/**
122 * Cliprect.
123 *
124 * \warning If you change this structure, make sure you change
125 * XF86DRIClipRectRec in the server as well
126 *
127 * \note KW: Actually it's illegal to change either for
128 * backwards-compatibility reasons.
129 */
130struct drm_clip_rect {
131 unsigned short x1;
132 unsigned short y1;
133 unsigned short x2;
134 unsigned short y2;
135};
136
137/**
138 * Texture region,
139 */
140struct drm_tex_region {
141 unsigned char next;
142 unsigned char prev;
143 unsigned char in_use;
144 unsigned char padding;
145 unsigned int age;
146};
147
148/**
149 * Hardware lock.
150 *
151 * The lock structure is a simple cache-line aligned integer. To avoid
152 * processor bus contention on a multiprocessor system, there should not be any
153 * other data stored in the same cache line.
154 */
155struct drm_hw_lock {
156 __volatile__ unsigned int lock; /**< lock variable */
157 char padding[60]; /**< Pad to cache line */
158};
159
160/* This is beyond ugly, and only works on GCC. However, it allows me to use
161 * drm.h in places (i.e., in the X-server) where I can't use size_t. The real
162 * fix is to use uint32_t instead of size_t, but that fix will break existing
163 * LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That *will*
164 * eventually happen, though. I chose 'unsigned long' to be the fallback type
165 * because that works on all the platforms I know about. Hopefully, the
166 * real fix will happen before that bites us.
167 */
168
169#ifdef __SIZE_TYPE__
170# define DRM_SIZE_T __SIZE_TYPE__
171#else
172# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!"
173# define DRM_SIZE_T unsigned long
174#endif
175
176/**
177 * DRM_IOCTL_VERSION ioctl argument type.
178 *
179 * \sa drmGetVersion().
180 */
181struct drm_version {
182 int version_major; /**< Major version */
183 int version_minor; /**< Minor version */
184 int version_patchlevel; /**< Patch level */
185 DRM_SIZE_T name_len; /**< Length of name buffer */
186 char __user *name; /**< Name of driver */
187 DRM_SIZE_T date_len; /**< Length of date buffer */
188 char __user *date; /**< User-space buffer to hold date */
189 DRM_SIZE_T desc_len; /**< Length of desc buffer */
190 char __user *desc; /**< User-space buffer to hold desc */
191};
192
193/**
194 * DRM_IOCTL_GET_UNIQUE ioctl argument type.
195 *
196 * \sa drmGetBusid() and drmSetBusId().
197 */
198struct drm_unique {
199 DRM_SIZE_T unique_len; /**< Length of unique */
200 char __user *unique; /**< Unique name for driver instantiation */
201};
202
203#undef DRM_SIZE_T
204
205struct drm_list {
206 int count; /**< Length of user-space structures */
207 struct drm_version __user *version;
208};
209
210struct drm_block {
211 int unused;
212};
213
214/**
215 * DRM_IOCTL_CONTROL ioctl argument type.
216 *
217 * \sa drmCtlInstHandler() and drmCtlUninstHandler().
218 */
219struct drm_control {
220 enum {
221 DRM_ADD_COMMAND,
222 DRM_RM_COMMAND,
223 DRM_INST_HANDLER,
224 DRM_UNINST_HANDLER
225 } func;
226 int irq;
227};
228
229/**
230 * Type of memory to map.
231 */
232enum drm_map_type {
233 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
234 _DRM_REGISTERS = 1, /**< no caching, no core dump */
235 _DRM_SHM = 2, /**< shared, cached */
236 _DRM_AGP = 3, /**< AGP/GART */
237 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
238 _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
239};
240
241/**
242 * Memory mapping flags.
243 */
244enum drm_map_flags {
245 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
246 _DRM_READ_ONLY = 0x02,
247 _DRM_LOCKED = 0x04, /**< shared, cached, locked */
248 _DRM_KERNEL = 0x08, /**< kernel requires access */
249 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
250 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
251 _DRM_REMOVABLE = 0x40, /**< Removable mapping */
252 _DRM_DRIVER = 0x80 /**< Managed by driver */
253};
254
255struct drm_ctx_priv_map {
256 unsigned int ctx_id; /**< Context requesting private mapping */
257 void *handle; /**< Handle of map */
258};
259
260/**
261 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
262 * argument type.
263 *
264 * \sa drmAddMap().
265 */
266struct drm_map {
267 unsigned long offset; /**< Requested physical address (0 for SAREA)*/
268 unsigned long size; /**< Requested physical size (bytes) */
269 enum drm_map_type type; /**< Type of memory to map */
270 enum drm_map_flags flags; /**< Flags */
271 void *handle; /**< User-space: "Handle" to pass to mmap() */
272 /**< Kernel-space: kernel-virtual address */
273 int mtrr; /**< MTRR slot used */
274 /* Private data */
275};
276
277/**
278 * DRM_IOCTL_GET_CLIENT ioctl argument type.
279 */
280struct drm_client {
281 int idx; /**< Which client desired? */
282 int auth; /**< Is client authenticated? */
283 unsigned long pid; /**< Process ID */
284 unsigned long uid; /**< User ID */
285 unsigned long magic; /**< Magic */
286 unsigned long iocs; /**< Ioctl count */
287};
288
289enum drm_stat_type {
290 _DRM_STAT_LOCK,
291 _DRM_STAT_OPENS,
292 _DRM_STAT_CLOSES,
293 _DRM_STAT_IOCTLS,
294 _DRM_STAT_LOCKS,
295 _DRM_STAT_UNLOCKS,
296 _DRM_STAT_VALUE, /**< Generic value */
297 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
298 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
299
300 _DRM_STAT_IRQ, /**< IRQ */
301 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
302 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
303 _DRM_STAT_DMA, /**< DMA */
304 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
305 _DRM_STAT_MISSED /**< Missed DMA opportunity */
306 /* Add to the *END* of the list */
307};
308
309/**
310 * DRM_IOCTL_GET_STATS ioctl argument type.
311 */
312struct drm_stats {
313 unsigned long count;
314 struct {
315 unsigned long value;
316 enum drm_stat_type type;
317 } data[15];
318};
319
320/**
321 * Hardware locking flags.
322 */
323enum drm_lock_flags {
324 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
325 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
326 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
327 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
328 /* These *HALT* flags aren't supported yet
329 -- they will be used to support the
330 full-screen DGA-like mode. */
331 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
332 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
333};
334
335/**
336 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
337 *
338 * \sa drmGetLock() and drmUnlock().
339 */
340struct drm_lock {
341 int context;
342 enum drm_lock_flags flags;
343};
344
345/**
346 * DMA flags
347 *
348 * \warning
349 * These values \e must match xf86drm.h.
350 *
351 * \sa drm_dma.
352 */
353enum drm_dma_flags {
354 /* Flags for DMA buffer dispatch */
355 _DRM_DMA_BLOCK = 0x01, /**<
356 * Block until buffer dispatched.
357 *
358 * \note The buffer may not yet have
359 * been processed by the hardware --
360 * getting a hardware lock with the
361 * hardware quiescent will ensure
362 * that the buffer has been
363 * processed.
364 */
365 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
366 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
367
368 /* Flags for DMA buffer request */
369 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
370 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
371 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
372};
373
374/**
375 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
376 *
377 * \sa drmAddBufs().
378 */
379struct drm_buf_desc {
380 int count; /**< Number of buffers of this size */
381 int size; /**< Size in bytes */
382 int low_mark; /**< Low water mark */
383 int high_mark; /**< High water mark */
384 enum {
385 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
386 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
387 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
388 _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
389 _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
390 } flags;
391 unsigned long agp_start; /**<
392 * Start address of where the AGP buffers are
393 * in the AGP aperture
394 */
395};
396
397/**
398 * DRM_IOCTL_INFO_BUFS ioctl argument type.
399 */
400struct drm_buf_info {
401 int count; /**< Number of buffers described in list */
402 struct drm_buf_desc __user *list; /**< List of buffer descriptions */
403};
404
405/**
406 * DRM_IOCTL_FREE_BUFS ioctl argument type.
407 */
408struct drm_buf_free {
409 int count;
410 int __user *list;
411};
412
413/**
414 * Buffer information
415 *
416 * \sa drm_buf_map.
417 */
418struct drm_buf_pub {
419 int idx; /**< Index into the master buffer list */
420 int total; /**< Buffer size */
421 int used; /**< Amount of buffer in use (for DMA) */
422 void __user *address; /**< Address of buffer */
423};
424
425/**
426 * DRM_IOCTL_MAP_BUFS ioctl argument type.
427 */
428struct drm_buf_map {
429 int count; /**< Length of the buffer list */
430#if defined(__cplusplus)
431 void __user *c_virtual;
432#else
433 void __user *virtual; /**< Mmap'd area in user-virtual */
434#endif
435 struct drm_buf_pub __user *list; /**< Buffer information */
436};
437
438/**
439 * DRM_IOCTL_DMA ioctl argument type.
440 *
441 * Indices here refer to the offset into the buffer list in drm_buf_get.
442 *
443 * \sa drmDMA().
444 */
445struct drm_dma {
446 int context; /**< Context handle */
447 int send_count; /**< Number of buffers to send */
448 int __user *send_indices; /**< List of handles to buffers */
449 int __user *send_sizes; /**< Lengths of data to send */
450 enum drm_dma_flags flags; /**< Flags */
451 int request_count; /**< Number of buffers requested */
452 int request_size; /**< Desired size for buffers */
453 int __user *request_indices; /**< Buffer information */
454 int __user *request_sizes;
455 int granted_count; /**< Number of buffers granted */
456};
457
458enum drm_ctx_flags {
459 _DRM_CONTEXT_PRESERVED = 0x01,
460 _DRM_CONTEXT_2DONLY = 0x02
461};
462
463/**
464 * DRM_IOCTL_ADD_CTX ioctl argument type.
465 *
466 * \sa drmCreateContext() and drmDestroyContext().
467 */
468struct drm_ctx {
469 drm_context_t handle;
470 enum drm_ctx_flags flags;
471};
472
473/**
474 * DRM_IOCTL_RES_CTX ioctl argument type.
475 */
476struct drm_ctx_res {
477 int count;
478 struct drm_ctx __user *contexts;
479};
480
481/**
482 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
483 */
484struct drm_draw {
485 drm_drawable_t handle;
486};
487
488/**
489 * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
490 */
491typedef enum {
492 DRM_DRAWABLE_CLIPRECTS,
493} drm_drawable_info_type_t;
494
495struct drm_update_draw {
496 drm_drawable_t handle;
497 unsigned int type;
498 unsigned int num;
499 unsigned long long data;
500};
501
502/**
503 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
504 */
505struct drm_auth {
506 drm_magic_t magic;
507};
508
509/**
510 * DRM_IOCTL_IRQ_BUSID ioctl argument type.
511 *
512 * \sa drmGetInterruptFromBusID().
513 */
514struct drm_irq_busid {
515 int irq; /**< IRQ number */
516 int busnum; /**< bus number */
517 int devnum; /**< device number */
518 int funcnum; /**< function number */
519};
520
521enum drm_vblank_seq_type {
522 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
523 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
524 _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
525 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
526 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
527 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
528};
529
530#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
531#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \
532 _DRM_VBLANK_NEXTONMISS)
533
534struct drm_wait_vblank_request {
535 enum drm_vblank_seq_type type;
536 unsigned int sequence;
537 unsigned long signal;
538};
539
540struct drm_wait_vblank_reply {
541 enum drm_vblank_seq_type type;
542 unsigned int sequence;
543 long tval_sec;
544 long tval_usec;
545};
546
547/**
548 * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
549 *
550 * \sa drmWaitVBlank().
551 */
552union drm_wait_vblank {
553 struct drm_wait_vblank_request request;
554 struct drm_wait_vblank_reply reply;
555};
556
557
558#define _DRM_PRE_MODESET 1
559#define _DRM_POST_MODESET 2
560
561/**
562 * DRM_IOCTL_MODESET_CTL ioctl argument type
563 *
564 * \sa drmModesetCtl().
565 */
566struct drm_modeset_ctl {
567 uint32_t crtc;
568 uint32_t cmd;
569};
570
571/**
572 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
573 *
574 * \sa drmAgpEnable().
575 */
576struct drm_agp_mode {
577 unsigned long mode; /**< AGP mode */
578};
579
580/**
581 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
582 *
583 * \sa drmAgpAlloc() and drmAgpFree().
584 */
585struct drm_agp_buffer {
586 unsigned long size; /**< In bytes -- will round to page boundary */
587 unsigned long handle; /**< Used for binding / unbinding */
588 unsigned long type; /**< Type of memory to allocate */
589 unsigned long physical; /**< Physical used by i810 */
590};
591
592/**
593 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
594 *
595 * \sa drmAgpBind() and drmAgpUnbind().
596 */
597struct drm_agp_binding {
598 unsigned long handle; /**< From drm_agp_buffer */
599 unsigned long offset; /**< In bytes -- will round to page boundary */
600};
601
602/**
603 * DRM_IOCTL_AGP_INFO ioctl argument type.
604 *
605 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
606 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
607 * drmAgpVendorId() and drmAgpDeviceId().
608 */
609struct drm_agp_info {
610 int agp_version_major;
611 int agp_version_minor;
612 unsigned long mode;
613 unsigned long aperture_base; /**< physical address */
614 unsigned long aperture_size; /**< bytes */
615 unsigned long memory_allowed; /**< bytes */
616 unsigned long memory_used;
617
618 /** \name PCI information */
619 /*@{ */
620 unsigned short id_vendor;
621 unsigned short id_device;
622 /*@} */
623};
624
625/**
626 * DRM_IOCTL_SG_ALLOC ioctl argument type.
627 */
628struct drm_scatter_gather {
629 unsigned long size; /**< In bytes -- will round to page boundary */
630 unsigned long handle; /**< Used for mapping / unmapping */
631};
632
633/**
634 * DRM_IOCTL_SET_VERSION ioctl argument type.
635 */
636struct drm_set_version {
637 int drm_di_major;
638 int drm_di_minor;
639 int drm_dd_major;
640 int drm_dd_minor;
641};
642
643/**
644 * \name Ioctls Definitions
645 */
646/*@{*/
647
648#define DRM_IOCTL_BASE 'd'
649#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
650#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
651#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
652#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
653
654#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
655#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
656#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
657#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
658#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
659#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
660#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
661#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
662#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
663
664#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
665#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
666#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
667#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
668#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
669#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
670#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
671#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
672#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
673#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
674#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
675
676#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
677
678#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
679#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
680
681#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
682#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
683#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
684#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
685#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
686#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
687#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
688#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
689#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
690#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
691#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
692#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
693#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
694
695#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
696#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
697#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
698#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
699#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
700#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
701#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
702#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
703
704#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
705#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
706
707#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
708
709#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
710
711/*@}*/
712
713/**
714 * Device specific ioctls should only be in their respective headers
715 * The device specific ioctl range is from 0x40 to 0x99.
716 * Generic IOCTLS restart at 0xA0.
717 *
718 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
719 * drmCommandReadWrite().
720 */
721#define DRM_COMMAND_BASE 0x40
722#define DRM_COMMAND_END 0xA0
723
724/* typedef area */
725#if !defined(__KERNEL__) || defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__)
726typedef struct drm_clip_rect drm_clip_rect_t;
727typedef struct drm_tex_region drm_tex_region_t;
728typedef struct drm_hw_lock drm_hw_lock_t;
729typedef struct drm_version drm_version_t;
730typedef struct drm_unique drm_unique_t;
731typedef struct drm_list drm_list_t;
732typedef struct drm_block drm_block_t;
733typedef struct drm_control drm_control_t;
734typedef enum drm_map_type drm_map_type_t;
735typedef enum drm_map_flags drm_map_flags_t;
736typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
737typedef struct drm_map drm_map_t;
738typedef struct drm_client drm_client_t;
739typedef enum drm_stat_type drm_stat_type_t;
740typedef struct drm_stats drm_stats_t;
741typedef enum drm_lock_flags drm_lock_flags_t;
742typedef struct drm_lock drm_lock_t;
743typedef enum drm_dma_flags drm_dma_flags_t;
744typedef struct drm_buf_desc drm_buf_desc_t;
745typedef struct drm_buf_info drm_buf_info_t;
746typedef struct drm_buf_free drm_buf_free_t;
747typedef struct drm_buf_pub drm_buf_pub_t;
748typedef struct drm_buf_map drm_buf_map_t;
749typedef struct drm_dma drm_dma_t;
750typedef union drm_wait_vblank drm_wait_vblank_t;
751typedef struct drm_agp_mode drm_agp_mode_t;
752typedef enum drm_ctx_flags drm_ctx_flags_t;
753typedef struct drm_ctx drm_ctx_t;
754typedef struct drm_ctx_res drm_ctx_res_t;
755typedef struct drm_draw drm_draw_t;
756typedef struct drm_update_draw drm_update_draw_t;
757typedef struct drm_auth drm_auth_t;
758typedef struct drm_irq_busid drm_irq_busid_t;
759typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
760typedef struct drm_agp_buffer drm_agp_buffer_t;
761typedef struct drm_agp_binding drm_agp_binding_t;
762typedef struct drm_agp_info drm_agp_info_t;
763typedef struct drm_scatter_gather drm_scatter_gather_t;
764typedef struct drm_set_version drm_set_version_t;
765
766#endif
767
768#endif
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