1 | /*
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2 | * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
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3 | *
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4 | * Permission to use, copy, modify, distribute, and sell this software and its
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5 | * documentation for any purpose is hereby granted without fee, provided that
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6 | * the above copyright notice appear in all copies and that both that
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7 | * copyright notice and this permission notice appear in supporting
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8 | * documentation, and that the name of Thomas Roell not be used in
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9 | * advertising or publicity pertaining to distribution of the software without
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10 | * specific, written prior permission. Thomas Roell makes no representations
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11 | * about the suitability of this software for any purpose. It is provided
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12 | * "as is" without express or implied warranty.
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13 | *
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14 | * THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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15 | * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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16 | * EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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17 | * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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18 | * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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19 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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20 | * PERFORMANCE OF THIS SOFTWARE.
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21 | *
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22 | */
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23 | /*
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24 | * Copyright (c) 1994-2003 by The XFree86 Project, Inc.
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25 | *
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26 | * Permission is hereby granted, free of charge, to any person obtaining a
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27 | * copy of this software and associated documentation files (the "Software"),
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28 | * to deal in the Software without restriction, including without limitation
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29 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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30 | * and/or sell copies of the Software, and to permit persons to whom the
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31 | * Software is furnished to do so, subject to the following conditions:
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32 | *
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33 | * The above copyright notice and this permission notice shall be included in
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34 | * all copies or substantial portions of the Software.
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35 | *
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36 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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37 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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38 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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39 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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40 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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41 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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42 | * OTHER DEALINGS IN THE SOFTWARE.
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43 | *
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44 | * Except as contained in this notice, the name of the copyright holder(s)
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45 | * and author(s) shall not be used in advertising or otherwise to promote
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46 | * the sale, use or other dealings in this Software without prior written
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47 | * authorization from the copyright holder(s) and author(s).
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48 | */
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49 |
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50 | #ifndef _COMPILER_H
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51 |
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52 | # define _COMPILER_H
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53 |
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54 | #if defined(__SUNPRO_C)
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55 | # define DO_PROTOTYPES
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56 | #endif
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57 |
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58 | /* Map Sun compiler platform defines to gcc-style used in the code */
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59 | #if defined(__amd64) && !defined(__amd64__)
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60 | # define __amd64__
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61 | #endif
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62 | #if defined(__i386) && !defined(__i386__)
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63 | # define __i386__
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64 | #endif
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65 | #if defined(__sparc) && !defined(__sparc__)
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66 | # define __sparc__
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67 | #endif
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68 | #if defined(__sparcv9) && !defined(__sparc64__)
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69 | # define __sparc64__
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70 | #endif
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71 |
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72 | #ifndef _X_EXPORT
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73 | # include <X11/Xfuncproto.h>
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74 | #endif
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75 |
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76 | # include <pixman.h> /* for uint*_t types */
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77 |
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78 | /* Allow drivers to use the GCC-supported __inline__ and/or __inline. */
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79 | # ifndef __inline__
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80 | # if defined(__GNUC__)
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81 | /* gcc has __inline__ */
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82 | # elif defined(__HIGHC__)
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83 | # define __inline__ _Inline
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84 | # else
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85 | # define __inline__ /**/
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86 | # endif
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87 | # endif /* __inline__ */
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88 | # ifndef __inline
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89 | # if defined(__GNUC__)
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90 | /* gcc has __inline */
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91 | # elif defined(__HIGHC__)
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92 | # define __inline _Inline
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93 | # else
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94 | # define __inline /**/
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95 | # endif
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96 | # endif /* __inline */
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97 |
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98 | /* Support gcc's __FUNCTION__ for people using other compilers */
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99 | #if !defined(__GNUC__) && !defined(__FUNCTION__)
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100 | # define __FUNCTION__ __func__ /* C99 */
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101 | #endif
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102 |
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103 | # if defined(NO_INLINE) || defined(DO_PROTOTYPES)
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104 |
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105 | # if !defined(__arm__)
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106 | # if !defined(__sparc__) && !defined(__sparc) && !defined(__arm32__) && !defined(__nds32__) \
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107 | && !(defined(__alpha__) && defined(linux)) \
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108 | && !(defined(__ia64__) && defined(linux)) \
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109 |
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110 | extern _X_EXPORT void outb(unsigned short, unsigned char);
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111 | extern _X_EXPORT void outw(unsigned short, unsigned short);
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112 | extern _X_EXPORT void outl(unsigned short, unsigned int);
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113 | extern _X_EXPORT unsigned int inb(unsigned short);
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114 | extern _X_EXPORT unsigned int inw(unsigned short);
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115 | extern _X_EXPORT unsigned int inl(unsigned short);
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116 |
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117 | # else /* __sparc__, __arm32__, __alpha__, __nds32__ */
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118 |
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119 | extern _X_EXPORT void outb(unsigned long, unsigned char);
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120 | extern _X_EXPORT void outw(unsigned long, unsigned short);
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121 | extern _X_EXPORT void outl(unsigned long, unsigned int);
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122 | extern _X_EXPORT unsigned int inb(unsigned long);
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123 | extern _X_EXPORT unsigned int inw(unsigned long);
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124 | extern _X_EXPORT unsigned int inl(unsigned long);
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125 |
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126 | # endif /* __sparc__, __arm32__, __alpha__, __nds32__ */
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127 | # endif /* __arm__ */
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128 |
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129 | # if defined(__powerpc__) && !defined(__OpenBSD__)
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130 | extern unsigned long ldq_u(unsigned long *);
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131 | extern unsigned long ldl_u(unsigned int *);
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132 | extern unsigned long ldw_u(unsigned short *);
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133 | extern void stq_u(unsigned long, unsigned long *);
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134 | extern void stl_u(unsigned long, unsigned int *);
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135 | extern void stw_u(unsigned long, unsigned short *);
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136 | extern void mem_barrier(void);
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137 | extern void write_mem_barrier(void);
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138 | extern void stl_brx(unsigned long, volatile unsigned char *, int);
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139 | extern void stw_brx(unsigned short, volatile unsigned char *, int);
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140 | extern unsigned long ldl_brx(volatile unsigned char *, int);
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141 | extern unsigned short ldw_brx(volatile unsigned char *, int);
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142 | # endif /* __powerpc__ && !__OpenBSD */
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143 |
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144 | # endif /* NO_INLINE || DO_PROTOTYPES */
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145 |
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146 | # ifndef NO_INLINE
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147 | # ifdef __GNUC__
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148 | # ifdef __i386__
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149 |
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150 | # ifdef __SSE__
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151 | # define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
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152 | # else
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153 | # define write_mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
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154 | # endif
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155 |
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156 | # ifdef __SSE2__
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157 | # define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
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158 | # else
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159 | # define mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
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160 | # endif
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161 |
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162 | # elif defined __alpha__
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163 |
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164 | # define mem_barrier() __asm__ __volatile__ ("mb" : : : "memory")
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165 | # define write_mem_barrier() __asm__ __volatile__ ("wmb" : : : "memory")
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166 |
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167 | # elif defined __amd64__
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168 |
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169 | # define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
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170 | # define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
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171 |
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172 | # elif defined __ia64__
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173 |
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174 | # ifndef __INTEL_COMPILER
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175 | # define mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
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176 | # define write_mem_barrier() __asm__ __volatile__ ("mf" : : : "memory")
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177 | # else
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178 | # include "ia64intrin.h"
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179 | # define mem_barrier() __mf()
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180 | # define write_mem_barrier() __mf()
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181 | # endif
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182 |
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183 | # elif defined __mips__
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184 | /* Note: sync instruction requires MIPS II instruction set */
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185 | # define mem_barrier() \
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186 | __asm__ __volatile__( \
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187 | ".set push\n\t" \
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188 | ".set noreorder\n\t" \
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189 | ".set mips2\n\t" \
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190 | "sync\n\t" \
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191 | ".set pop" \
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192 | : /* no output */ \
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193 | : /* no input */ \
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194 | : "memory")
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195 | # define write_mem_barrier() mem_barrier()
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196 |
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197 | # elif defined __powerpc__
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198 |
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199 | # if defined(linux) && defined(__powerpc64__)
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200 | # include <linux/version.h>
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201 | # if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
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202 | # include <asm/memory.h>
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203 | # endif
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204 | # endif /* defined(linux) && defined(__powerpc64__) */
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205 |
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206 | # ifndef eieio /* We deal with arch-specific eieio() routines above... */
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207 | # define eieio() __asm__ __volatile__ ("eieio" ::: "memory")
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208 | # endif /* eieio */
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209 | # define mem_barrier() eieio()
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210 | # define write_mem_barrier() eieio()
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211 |
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212 | # elif defined __sparc__
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213 |
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214 | # define barrier() __asm__ __volatile__ (".word 0x8143e00a" : : : "memory")
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215 | # define mem_barrier() /* XXX: nop for now */
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216 | # define write_mem_barrier() /* XXX: nop for now */
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217 | # endif
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218 | # endif /* __GNUC__ */
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219 | # endif /* NO_INLINE */
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220 |
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221 | # ifndef mem_barrier
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222 | # define mem_barrier() /* NOP */
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223 | # endif
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224 |
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225 | # ifndef write_mem_barrier
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226 | # define write_mem_barrier() /* NOP */
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227 | # endif
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228 |
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229 |
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230 | # ifndef NO_INLINE
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231 | # ifdef __GNUC__
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232 |
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233 | /* Define some packed structures to use with unaligned accesses */
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234 |
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235 | struct __una_u64 { uint64_t x __attribute__((packed)); };
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236 | struct __una_u32 { uint32_t x __attribute__((packed)); };
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237 | struct __una_u16 { uint16_t x __attribute__((packed)); };
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238 |
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239 | /* Elemental unaligned loads */
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240 |
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241 | static __inline__ uint64_t ldq_u(uint64_t *p)
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242 | {
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243 | const struct __una_u64 *ptr = (const struct __una_u64 *) p;
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244 | return ptr->x;
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245 | }
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246 |
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247 | static __inline__ uint32_t ldl_u(uint32_t *p)
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248 | {
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249 | const struct __una_u32 *ptr = (const struct __una_u32 *) p;
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250 | return ptr->x;
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251 | }
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252 |
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253 | static __inline__ uint16_t ldw_u(uint16_t *p)
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254 | {
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255 | const struct __una_u16 *ptr = (const struct __una_u16 *) p;
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256 | return ptr->x;
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257 | }
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258 |
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259 | /* Elemental unaligned stores */
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260 |
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261 | static __inline__ void stq_u(uint64_t val, uint64_t *p)
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262 | {
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263 | struct __una_u64 *ptr = (struct __una_u64 *) p;
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264 | ptr->x = val;
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265 | }
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266 |
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267 | static __inline__ void stl_u(uint32_t val, uint32_t *p)
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268 | {
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269 | struct __una_u32 *ptr = (struct __una_u32 *) p;
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270 | ptr->x = val;
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271 | }
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272 |
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273 | static __inline__ void stw_u(uint16_t val, uint16_t *p)
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274 | {
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275 | struct __una_u16 *ptr = (struct __una_u16 *) p;
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276 | ptr->x = val;
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277 | }
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278 | # else /* !__GNUC__ */
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279 |
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280 | #include <string.h> /* needed for memmove */
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281 |
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282 | static __inline__ uint64_t ldq_u(uint64_t *p)
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283 | {
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284 | uint64_t ret;
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285 | memmove(&ret, p, sizeof(*p));
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286 | return ret;
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287 | }
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288 |
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289 | static __inline__ uint32_t ldl_u(uint32_t *p)
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290 | {
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291 | uint32_t ret;
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292 | memmove(&ret, p, sizeof(*p));
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293 | return ret;
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294 | }
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295 |
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296 | static __inline__ uint16_t ldw_u(uint16_t *p)
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297 | {
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298 | uint16_t ret;
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299 | memmove(&ret, p, sizeof(*p));
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300 | return ret;
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301 | }
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302 |
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303 | static __inline__ void stq_u(uint64_t val, uint64_t *p)
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304 | {
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305 | uint64_t tmp = val;
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306 | memmove(p, &tmp, sizeof(*p));
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307 | }
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308 |
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309 | static __inline__ void stl_u(uint32_t val, uint32_t *p)
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310 | {
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311 | uint32_t tmp = val;
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312 | memmove(p, &tmp, sizeof(*p));
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313 | }
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314 |
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315 | static __inline__ void stw_u(uint16_t val, uint16_t *p)
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316 | {
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317 | uint16_t tmp = val;
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318 | memmove(p, &tmp, sizeof(*p));
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319 | }
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320 |
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321 | # endif /* __GNUC__ */
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322 | # endif /* NO_INLINE */
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323 |
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324 | # ifndef NO_INLINE
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325 | # ifdef __GNUC__
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326 | # if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && (defined(__alpha__))
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327 |
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328 | # ifdef linux
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329 | /* for Linux on Alpha, we use the LIBC _inx/_outx routines */
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330 | /* note that the appropriate setup via "ioperm" needs to be done */
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331 | /* *before* any inx/outx is done. */
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332 |
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333 | extern _X_EXPORT void _outb(unsigned char val, unsigned long port);
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334 | extern _X_EXPORT void _outw(unsigned short val, unsigned long port);
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335 | extern _X_EXPORT void _outl(unsigned int val, unsigned long port);
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336 | extern _X_EXPORT unsigned int _inb(unsigned long port);
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337 | extern _X_EXPORT unsigned int _inw(unsigned long port);
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338 | extern _X_EXPORT unsigned int _inl(unsigned long port);
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339 |
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340 | static __inline__ void
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341 | outb(unsigned long port, unsigned char val)
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342 | {
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343 | _outb(val, port);
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344 | }
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345 |
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346 | static __inline__ void
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347 | outw(unsigned long port, unsigned short val)
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348 | {
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349 | _outw(val, port);
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350 | }
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351 |
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352 | static __inline__ void
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353 | outl(unsigned long port, unsigned int val)
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354 | {
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355 | _outl(val, port);
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356 | }
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357 |
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358 | static __inline__ unsigned int
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359 | inb(unsigned long port)
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360 | {
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361 | return _inb(port);
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362 | }
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363 |
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364 | static __inline__ unsigned int
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365 | inw(unsigned long port)
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366 | {
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367 | return _inw(port);
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368 | }
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369 |
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370 | static __inline__ unsigned int
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371 | inl(unsigned long port)
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372 | {
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373 | return _inl(port);
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374 | }
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375 |
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376 | # endif /* linux */
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377 |
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378 | # if (defined(__FreeBSD__) || defined(__OpenBSD__)) \
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379 | && !defined(DO_PROTOTYPES)
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380 |
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381 | /* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */
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382 | /* inx/outx routines */
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383 | /* note that the appropriate setup via "ioperm" needs to be done */
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384 | /* *before* any inx/outx is done. */
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385 |
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386 | extern _X_EXPORT void outb(unsigned int port, unsigned char val);
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387 | extern _X_EXPORT void outw(unsigned int port, unsigned short val);
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388 | extern _X_EXPORT void outl(unsigned int port, unsigned int val);
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389 | extern _X_EXPORT unsigned char inb(unsigned int port);
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390 | extern _X_EXPORT unsigned short inw(unsigned int port);
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391 | extern _X_EXPORT unsigned int inl(unsigned int port);
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392 |
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393 | # endif /* (__FreeBSD__ || __OpenBSD__ ) && !DO_PROTOTYPES */
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394 |
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395 |
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396 | #if defined(__NetBSD__)
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397 | #include <machine/pio.h>
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398 | #endif /* __NetBSD__ */
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399 |
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400 | # elif (defined(linux) || defined(__FreeBSD__)) && defined(__amd64__)
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401 |
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402 | # include <inttypes.h>
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403 |
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404 | static __inline__ void
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405 | outb(unsigned short port, unsigned char val)
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406 | {
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407 | __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
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408 | }
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409 |
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410 |
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411 | static __inline__ void
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412 | outw(unsigned short port, unsigned short val)
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413 | {
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414 | __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
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415 | }
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416 |
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417 | static __inline__ void
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418 | outl(unsigned short port, unsigned int val)
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419 | {
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420 | __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
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421 | }
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422 |
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423 | static __inline__ unsigned int
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424 | inb(unsigned short port)
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425 | {
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426 | unsigned char ret;
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427 | __asm__ __volatile__("inb %1,%0" :
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428 | "=a" (ret) :
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429 | "d" (port));
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430 | return ret;
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431 | }
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432 |
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433 | static __inline__ unsigned int
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434 | inw(unsigned short port)
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435 | {
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436 | unsigned short ret;
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437 | __asm__ __volatile__("inw %1,%0" :
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438 | "=a" (ret) :
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439 | "d" (port));
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440 | return ret;
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441 | }
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442 |
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443 | static __inline__ unsigned int
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444 | inl(unsigned short port)
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445 | {
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446 | unsigned int ret;
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447 | __asm__ __volatile__("inl %1,%0" :
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448 | "=a" (ret) :
|
---|
449 | "d" (port));
|
---|
450 | return ret;
|
---|
451 | }
|
---|
452 |
|
---|
453 | # elif (defined(linux) || defined(sun) || defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc__)
|
---|
454 |
|
---|
455 | # ifndef ASI_PL
|
---|
456 | # define ASI_PL 0x88
|
---|
457 | # endif
|
---|
458 |
|
---|
459 | static __inline__ void
|
---|
460 | outb(unsigned long port, unsigned char val)
|
---|
461 | {
|
---|
462 | __asm__ __volatile__("stba %0, [%1] %2"
|
---|
463 | : /* No outputs */
|
---|
464 | : "r" (val), "r" (port), "i" (ASI_PL));
|
---|
465 | barrier();
|
---|
466 | }
|
---|
467 |
|
---|
468 | static __inline__ void
|
---|
469 | outw(unsigned long port, unsigned short val)
|
---|
470 | {
|
---|
471 | __asm__ __volatile__("stha %0, [%1] %2"
|
---|
472 | : /* No outputs */
|
---|
473 | : "r" (val), "r" (port), "i" (ASI_PL));
|
---|
474 | barrier();
|
---|
475 | }
|
---|
476 |
|
---|
477 | static __inline__ void
|
---|
478 | outl(unsigned long port, unsigned int val)
|
---|
479 | {
|
---|
480 | __asm__ __volatile__("sta %0, [%1] %2"
|
---|
481 | : /* No outputs */
|
---|
482 | : "r" (val), "r" (port), "i" (ASI_PL));
|
---|
483 | barrier();
|
---|
484 | }
|
---|
485 |
|
---|
486 | static __inline__ unsigned int
|
---|
487 | inb(unsigned long port)
|
---|
488 | {
|
---|
489 | unsigned int ret;
|
---|
490 | __asm__ __volatile__("lduba [%1] %2, %0"
|
---|
491 | : "=r" (ret)
|
---|
492 | : "r" (port), "i" (ASI_PL));
|
---|
493 | return ret;
|
---|
494 | }
|
---|
495 |
|
---|
496 | static __inline__ unsigned int
|
---|
497 | inw(unsigned long port)
|
---|
498 | {
|
---|
499 | unsigned int ret;
|
---|
500 | __asm__ __volatile__("lduha [%1] %2, %0"
|
---|
501 | : "=r" (ret)
|
---|
502 | : "r" (port), "i" (ASI_PL));
|
---|
503 | return ret;
|
---|
504 | }
|
---|
505 |
|
---|
506 | static __inline__ unsigned int
|
---|
507 | inl(unsigned long port)
|
---|
508 | {
|
---|
509 | unsigned int ret;
|
---|
510 | __asm__ __volatile__("lda [%1] %2, %0"
|
---|
511 | : "=r" (ret)
|
---|
512 | : "r" (port), "i" (ASI_PL));
|
---|
513 | return ret;
|
---|
514 | }
|
---|
515 |
|
---|
516 | static __inline__ unsigned char
|
---|
517 | xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
|
---|
518 | {
|
---|
519 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
520 | unsigned char ret;
|
---|
521 |
|
---|
522 | __asm__ __volatile__("lduba [%1] %2, %0"
|
---|
523 | : "=r" (ret)
|
---|
524 | : "r" (addr), "i" (ASI_PL));
|
---|
525 | return ret;
|
---|
526 | }
|
---|
527 |
|
---|
528 | static __inline__ unsigned short
|
---|
529 | xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
|
---|
530 | {
|
---|
531 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
532 | unsigned short ret;
|
---|
533 |
|
---|
534 | __asm__ __volatile__("lduh [%1], %0"
|
---|
535 | : "=r" (ret)
|
---|
536 | : "r" (addr));
|
---|
537 | return ret;
|
---|
538 | }
|
---|
539 |
|
---|
540 | static __inline__ unsigned short
|
---|
541 | xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
|
---|
542 | {
|
---|
543 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
544 | unsigned short ret;
|
---|
545 |
|
---|
546 | __asm__ __volatile__("lduha [%1] %2, %0"
|
---|
547 | : "=r" (ret)
|
---|
548 | : "r" (addr), "i" (ASI_PL));
|
---|
549 | return ret;
|
---|
550 | }
|
---|
551 |
|
---|
552 | static __inline__ unsigned int
|
---|
553 | xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
|
---|
554 | {
|
---|
555 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
556 | unsigned int ret;
|
---|
557 |
|
---|
558 | __asm__ __volatile__("ld [%1], %0"
|
---|
559 | : "=r" (ret)
|
---|
560 | : "r" (addr));
|
---|
561 | return ret;
|
---|
562 | }
|
---|
563 |
|
---|
564 | static __inline__ unsigned int
|
---|
565 | xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
|
---|
566 | {
|
---|
567 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
568 | unsigned int ret;
|
---|
569 |
|
---|
570 | __asm__ __volatile__("lda [%1] %2, %0"
|
---|
571 | : "=r" (ret)
|
---|
572 | : "r" (addr), "i" (ASI_PL));
|
---|
573 | return ret;
|
---|
574 | }
|
---|
575 |
|
---|
576 | static __inline__ void
|
---|
577 | xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
|
---|
578 | const unsigned int val)
|
---|
579 | {
|
---|
580 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
581 |
|
---|
582 | __asm__ __volatile__("stba %0, [%1] %2"
|
---|
583 | : /* No outputs */
|
---|
584 | : "r" (val), "r" (addr), "i" (ASI_PL));
|
---|
585 | barrier();
|
---|
586 | }
|
---|
587 |
|
---|
588 | static __inline__ void
|
---|
589 | xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
|
---|
590 | const unsigned int val)
|
---|
591 | {
|
---|
592 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
593 |
|
---|
594 | __asm__ __volatile__("sth %0, [%1]"
|
---|
595 | : /* No outputs */
|
---|
596 | : "r" (val), "r" (addr));
|
---|
597 | barrier();
|
---|
598 | }
|
---|
599 |
|
---|
600 | static __inline__ void
|
---|
601 | xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
|
---|
602 | const unsigned int val)
|
---|
603 | {
|
---|
604 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
605 |
|
---|
606 | __asm__ __volatile__("stha %0, [%1] %2"
|
---|
607 | : /* No outputs */
|
---|
608 | : "r" (val), "r" (addr), "i" (ASI_PL));
|
---|
609 | barrier();
|
---|
610 | }
|
---|
611 |
|
---|
612 | static __inline__ void
|
---|
613 | xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
|
---|
614 | const unsigned int val)
|
---|
615 | {
|
---|
616 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
617 |
|
---|
618 | __asm__ __volatile__("st %0, [%1]"
|
---|
619 | : /* No outputs */
|
---|
620 | : "r" (val), "r" (addr));
|
---|
621 | barrier();
|
---|
622 | }
|
---|
623 |
|
---|
624 | static __inline__ void
|
---|
625 | xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
|
---|
626 | const unsigned int val)
|
---|
627 | {
|
---|
628 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
629 |
|
---|
630 | __asm__ __volatile__("sta %0, [%1] %2"
|
---|
631 | : /* No outputs */
|
---|
632 | : "r" (val), "r" (addr), "i" (ASI_PL));
|
---|
633 | barrier();
|
---|
634 | }
|
---|
635 |
|
---|
636 | static __inline__ void
|
---|
637 | xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
|
---|
638 | const unsigned int val)
|
---|
639 | {
|
---|
640 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
641 |
|
---|
642 | __asm__ __volatile__("stba %0, [%1] %2"
|
---|
643 | : /* No outputs */
|
---|
644 | : "r" (val), "r" (addr), "i" (ASI_PL));
|
---|
645 | }
|
---|
646 |
|
---|
647 | static __inline__ void
|
---|
648 | xf86WriteMmio16BeNB(__volatile__ void *base, const unsigned long offset,
|
---|
649 | const unsigned int val)
|
---|
650 | {
|
---|
651 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
652 |
|
---|
653 | __asm__ __volatile__("sth %0, [%1]"
|
---|
654 | : /* No outputs */
|
---|
655 | : "r" (val), "r" (addr));
|
---|
656 | }
|
---|
657 |
|
---|
658 | static __inline__ void
|
---|
659 | xf86WriteMmio16LeNB(__volatile__ void *base, const unsigned long offset,
|
---|
660 | const unsigned int val)
|
---|
661 | {
|
---|
662 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
663 |
|
---|
664 | __asm__ __volatile__("stha %0, [%1] %2"
|
---|
665 | : /* No outputs */
|
---|
666 | : "r" (val), "r" (addr), "i" (ASI_PL));
|
---|
667 | }
|
---|
668 |
|
---|
669 | static __inline__ void
|
---|
670 | xf86WriteMmio32BeNB(__volatile__ void *base, const unsigned long offset,
|
---|
671 | const unsigned int val)
|
---|
672 | {
|
---|
673 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
674 |
|
---|
675 | __asm__ __volatile__("st %0, [%1]"
|
---|
676 | : /* No outputs */
|
---|
677 | : "r" (val), "r" (addr));
|
---|
678 | }
|
---|
679 |
|
---|
680 | static __inline__ void
|
---|
681 | xf86WriteMmio32LeNB(__volatile__ void *base, const unsigned long offset,
|
---|
682 | const unsigned int val)
|
---|
683 | {
|
---|
684 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
685 |
|
---|
686 | __asm__ __volatile__("sta %0, [%1] %2"
|
---|
687 | : /* No outputs */
|
---|
688 | : "r" (val), "r" (addr), "i" (ASI_PL));
|
---|
689 | }
|
---|
690 |
|
---|
691 | # elif defined(__mips__) || (defined(__arm32__) && !defined(__linux__))
|
---|
692 | # ifdef __arm32__
|
---|
693 | # define PORT_SIZE long
|
---|
694 | # else
|
---|
695 | # define PORT_SIZE short
|
---|
696 | # endif
|
---|
697 |
|
---|
698 | _X_EXPORT unsigned int IOPortBase; /* Memory mapped I/O port area */
|
---|
699 |
|
---|
700 | static __inline__ void
|
---|
701 | outb(unsigned PORT_SIZE port, unsigned char val)
|
---|
702 | {
|
---|
703 | *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
|
---|
704 | }
|
---|
705 |
|
---|
706 | static __inline__ void
|
---|
707 | outw(unsigned PORT_SIZE port, unsigned short val)
|
---|
708 | {
|
---|
709 | *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
|
---|
710 | }
|
---|
711 |
|
---|
712 | static __inline__ void
|
---|
713 | outl(unsigned PORT_SIZE port, unsigned int val)
|
---|
714 | {
|
---|
715 | *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
|
---|
716 | }
|
---|
717 |
|
---|
718 | static __inline__ unsigned int
|
---|
719 | inb(unsigned PORT_SIZE port)
|
---|
720 | {
|
---|
721 | return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase);
|
---|
722 | }
|
---|
723 |
|
---|
724 | static __inline__ unsigned int
|
---|
725 | inw(unsigned PORT_SIZE port)
|
---|
726 | {
|
---|
727 | return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase);
|
---|
728 | }
|
---|
729 |
|
---|
730 | static __inline__ unsigned int
|
---|
731 | inl(unsigned PORT_SIZE port)
|
---|
732 | {
|
---|
733 | return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase);
|
---|
734 | }
|
---|
735 |
|
---|
736 |
|
---|
737 | # if defined(__mips__)
|
---|
738 | # ifdef linux /* don't mess with other OSs */
|
---|
739 | # if X_BYTE_ORDER == X_BIG_ENDIAN
|
---|
740 | static __inline__ unsigned int
|
---|
741 | xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
|
---|
742 | {
|
---|
743 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
744 | unsigned int ret;
|
---|
745 |
|
---|
746 | __asm__ __volatile__("lw %0, 0(%1)"
|
---|
747 | : "=r" (ret)
|
---|
748 | : "r" (addr));
|
---|
749 | return ret;
|
---|
750 | }
|
---|
751 |
|
---|
752 | static __inline__ void
|
---|
753 | xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
|
---|
754 | const unsigned int val)
|
---|
755 | {
|
---|
756 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
757 |
|
---|
758 | __asm__ __volatile__("sw %0, 0(%1)"
|
---|
759 | : /* No outputs */
|
---|
760 | : "r" (val), "r" (addr));
|
---|
761 | }
|
---|
762 | # endif
|
---|
763 | # endif /* !linux */
|
---|
764 | # endif /* __mips__ */
|
---|
765 |
|
---|
766 | # elif (defined(linux) || defined(__OpenBSD__) || defined(__NetBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
|
---|
767 |
|
---|
768 | # ifndef MAP_FAILED
|
---|
769 | # define MAP_FAILED ((void *)-1)
|
---|
770 | # endif
|
---|
771 |
|
---|
772 | extern _X_EXPORT volatile unsigned char *ioBase;
|
---|
773 |
|
---|
774 | static __inline__ unsigned char
|
---|
775 | xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
|
---|
776 | {
|
---|
777 | register unsigned char val;
|
---|
778 | __asm__ __volatile__(
|
---|
779 | "lbzx %0,%1,%2\n\t"
|
---|
780 | "eieio"
|
---|
781 | : "=r" (val)
|
---|
782 | : "b" (base), "r" (offset),
|
---|
783 | "m" (*((volatile unsigned char *)base+offset)));
|
---|
784 | return val;
|
---|
785 | }
|
---|
786 |
|
---|
787 | static __inline__ unsigned short
|
---|
788 | xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
|
---|
789 | {
|
---|
790 | register unsigned short val;
|
---|
791 | __asm__ __volatile__(
|
---|
792 | "lhzx %0,%1,%2\n\t"
|
---|
793 | "eieio"
|
---|
794 | : "=r" (val)
|
---|
795 | : "b" (base), "r" (offset),
|
---|
796 | "m" (*((volatile unsigned char *)base+offset)));
|
---|
797 | return val;
|
---|
798 | }
|
---|
799 |
|
---|
800 | static __inline__ unsigned short
|
---|
801 | xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
|
---|
802 | {
|
---|
803 | register unsigned short val;
|
---|
804 | __asm__ __volatile__(
|
---|
805 | "lhbrx %0,%1,%2\n\t"
|
---|
806 | "eieio"
|
---|
807 | : "=r" (val)
|
---|
808 | : "b" (base), "r" (offset),
|
---|
809 | "m" (*((volatile unsigned char *)base+offset)));
|
---|
810 | return val;
|
---|
811 | }
|
---|
812 |
|
---|
813 | static __inline__ unsigned int
|
---|
814 | xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
|
---|
815 | {
|
---|
816 | register unsigned int val;
|
---|
817 | __asm__ __volatile__(
|
---|
818 | "lwzx %0,%1,%2\n\t"
|
---|
819 | "eieio"
|
---|
820 | : "=r" (val)
|
---|
821 | : "b" (base), "r" (offset),
|
---|
822 | "m" (*((volatile unsigned char *)base+offset)));
|
---|
823 | return val;
|
---|
824 | }
|
---|
825 |
|
---|
826 | static __inline__ unsigned int
|
---|
827 | xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
|
---|
828 | {
|
---|
829 | register unsigned int val;
|
---|
830 | __asm__ __volatile__(
|
---|
831 | "lwbrx %0,%1,%2\n\t"
|
---|
832 | "eieio"
|
---|
833 | : "=r" (val)
|
---|
834 | : "b" (base), "r" (offset),
|
---|
835 | "m" (*((volatile unsigned char *)base+offset)));
|
---|
836 | return val;
|
---|
837 | }
|
---|
838 |
|
---|
839 | static __inline__ void
|
---|
840 | xf86WriteMmioNB8(__volatile__ void *base, const unsigned long offset,
|
---|
841 | const unsigned char val)
|
---|
842 | {
|
---|
843 | __asm__ __volatile__(
|
---|
844 | "stbx %1,%2,%3\n\t"
|
---|
845 | : "=m" (*((volatile unsigned char *)base+offset))
|
---|
846 | : "r" (val), "b" (base), "r" (offset));
|
---|
847 | }
|
---|
848 |
|
---|
849 | static __inline__ void
|
---|
850 | xf86WriteMmioNB16Le(__volatile__ void *base, const unsigned long offset,
|
---|
851 | const unsigned short val)
|
---|
852 | {
|
---|
853 | __asm__ __volatile__(
|
---|
854 | "sthbrx %1,%2,%3\n\t"
|
---|
855 | : "=m" (*((volatile unsigned char *)base+offset))
|
---|
856 | : "r" (val), "b" (base), "r" (offset));
|
---|
857 | }
|
---|
858 |
|
---|
859 | static __inline__ void
|
---|
860 | xf86WriteMmioNB16Be(__volatile__ void *base, const unsigned long offset,
|
---|
861 | const unsigned short val)
|
---|
862 | {
|
---|
863 | __asm__ __volatile__(
|
---|
864 | "sthx %1,%2,%3\n\t"
|
---|
865 | : "=m" (*((volatile unsigned char *)base+offset))
|
---|
866 | : "r" (val), "b" (base), "r" (offset));
|
---|
867 | }
|
---|
868 |
|
---|
869 | static __inline__ void
|
---|
870 | xf86WriteMmioNB32Le(__volatile__ void *base, const unsigned long offset,
|
---|
871 | const unsigned int val)
|
---|
872 | {
|
---|
873 | __asm__ __volatile__(
|
---|
874 | "stwbrx %1,%2,%3\n\t"
|
---|
875 | : "=m" (*((volatile unsigned char *)base+offset))
|
---|
876 | : "r" (val), "b" (base), "r" (offset));
|
---|
877 | }
|
---|
878 |
|
---|
879 | static __inline__ void
|
---|
880 | xf86WriteMmioNB32Be(__volatile__ void *base, const unsigned long offset,
|
---|
881 | const unsigned int val)
|
---|
882 | {
|
---|
883 | __asm__ __volatile__(
|
---|
884 | "stwx %1,%2,%3\n\t"
|
---|
885 | : "=m" (*((volatile unsigned char *)base+offset))
|
---|
886 | : "r" (val), "b" (base), "r" (offset));
|
---|
887 | }
|
---|
888 |
|
---|
889 | static __inline__ void
|
---|
890 | xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
|
---|
891 | const unsigned char val)
|
---|
892 | {
|
---|
893 | xf86WriteMmioNB8(base, offset, val);
|
---|
894 | eieio();
|
---|
895 | }
|
---|
896 |
|
---|
897 | static __inline__ void
|
---|
898 | xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
|
---|
899 | const unsigned short val)
|
---|
900 | {
|
---|
901 | xf86WriteMmioNB16Le(base, offset, val);
|
---|
902 | eieio();
|
---|
903 | }
|
---|
904 |
|
---|
905 | static __inline__ void
|
---|
906 | xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
|
---|
907 | const unsigned short val)
|
---|
908 | {
|
---|
909 | xf86WriteMmioNB16Be(base, offset, val);
|
---|
910 | eieio();
|
---|
911 | }
|
---|
912 |
|
---|
913 | static __inline__ void
|
---|
914 | xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
|
---|
915 | const unsigned int val)
|
---|
916 | {
|
---|
917 | xf86WriteMmioNB32Le(base, offset, val);
|
---|
918 | eieio();
|
---|
919 | }
|
---|
920 |
|
---|
921 | static __inline__ void
|
---|
922 | xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
|
---|
923 | const unsigned int val)
|
---|
924 | {
|
---|
925 | xf86WriteMmioNB32Be(base, offset, val);
|
---|
926 | eieio();
|
---|
927 | }
|
---|
928 |
|
---|
929 |
|
---|
930 | static __inline__ void
|
---|
931 | outb(unsigned short port, unsigned char value)
|
---|
932 | {
|
---|
933 | if(ioBase == MAP_FAILED) return;
|
---|
934 | xf86WriteMmio8((void *)ioBase, port, value);
|
---|
935 | }
|
---|
936 |
|
---|
937 | static __inline__ void
|
---|
938 | outw(unsigned short port, unsigned short value)
|
---|
939 | {
|
---|
940 | if(ioBase == MAP_FAILED) return;
|
---|
941 | xf86WriteMmio16Le((void *)ioBase, port, value);
|
---|
942 | }
|
---|
943 |
|
---|
944 | static __inline__ void
|
---|
945 | outl(unsigned short port, unsigned int value)
|
---|
946 | {
|
---|
947 | if(ioBase == MAP_FAILED) return;
|
---|
948 | xf86WriteMmio32Le((void *)ioBase, port, value);
|
---|
949 | }
|
---|
950 |
|
---|
951 | static __inline__ unsigned int
|
---|
952 | inb(unsigned short port)
|
---|
953 | {
|
---|
954 | if(ioBase == MAP_FAILED) return 0;
|
---|
955 | return xf86ReadMmio8((void *)ioBase, port);
|
---|
956 | }
|
---|
957 |
|
---|
958 | static __inline__ unsigned int
|
---|
959 | inw(unsigned short port)
|
---|
960 | {
|
---|
961 | if(ioBase == MAP_FAILED) return 0;
|
---|
962 | return xf86ReadMmio16Le((void *)ioBase, port);
|
---|
963 | }
|
---|
964 |
|
---|
965 | static __inline__ unsigned int
|
---|
966 | inl(unsigned short port)
|
---|
967 | {
|
---|
968 | if(ioBase == MAP_FAILED) return 0;
|
---|
969 | return xf86ReadMmio32Le((void *)ioBase, port);
|
---|
970 | }
|
---|
971 |
|
---|
972 | #elif defined(__arm__) && defined(__linux__)
|
---|
973 |
|
---|
974 | /* for Linux on ARM, we use the LIBC inx/outx routines */
|
---|
975 | /* note that the appropriate setup via "ioperm" needs to be done */
|
---|
976 | /* *before* any inx/outx is done. */
|
---|
977 |
|
---|
978 | #include <sys/io.h>
|
---|
979 |
|
---|
980 | static __inline__ void
|
---|
981 | xf_outb(unsigned short port, unsigned char val)
|
---|
982 | {
|
---|
983 | outb(val, port);
|
---|
984 | }
|
---|
985 |
|
---|
986 | static __inline__ void
|
---|
987 | xf_outw(unsigned short port, unsigned short val)
|
---|
988 | {
|
---|
989 | outw(val, port);
|
---|
990 | }
|
---|
991 |
|
---|
992 | static __inline__ void
|
---|
993 | xf_outl(unsigned short port, unsigned int val)
|
---|
994 | {
|
---|
995 | outl(val, port);
|
---|
996 | }
|
---|
997 |
|
---|
998 | #define outb xf_outb
|
---|
999 | #define outw xf_outw
|
---|
1000 | #define outl xf_outl
|
---|
1001 |
|
---|
1002 | # elif defined(__nds32__)
|
---|
1003 |
|
---|
1004 | /*
|
---|
1005 | * Assume all port access are aligned. We need to revise this implementation
|
---|
1006 | * if there is unaligned port access. For ldq_u, ldl_u, ldw_u, stq_u, stl_u and
|
---|
1007 | * stw_u, they are assumed unaligned.
|
---|
1008 | */
|
---|
1009 |
|
---|
1010 | #define barrier() /* no barrier */
|
---|
1011 |
|
---|
1012 | #define PORT_SIZE long
|
---|
1013 |
|
---|
1014 | static __inline__ unsigned char
|
---|
1015 | xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
|
---|
1016 | {
|
---|
1017 | return *(volatile unsigned char *)((unsigned char *)base + offset) ;
|
---|
1018 | }
|
---|
1019 |
|
---|
1020 | static __inline__ void
|
---|
1021 | xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
|
---|
1022 | const unsigned int val)
|
---|
1023 | {
|
---|
1024 | *(volatile unsigned char *)((unsigned char *)base + offset) = val ;
|
---|
1025 | barrier();
|
---|
1026 | }
|
---|
1027 |
|
---|
1028 | static __inline__ void
|
---|
1029 | xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
|
---|
1030 | const unsigned int val)
|
---|
1031 | {
|
---|
1032 | *(volatile unsigned char *)((unsigned char *)base + offset) = val ;
|
---|
1033 | }
|
---|
1034 |
|
---|
1035 | static __inline__ unsigned short
|
---|
1036 | xf86ReadMmio16Swap(__volatile__ void *base, const unsigned long offset)
|
---|
1037 | {
|
---|
1038 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
1039 | unsigned short ret;
|
---|
1040 |
|
---|
1041 | __asm__ __volatile__(
|
---|
1042 | "lhi %0, [%1];\n\t"
|
---|
1043 | "wsbh %0, %0;\n\t"
|
---|
1044 | : "=r" (ret)
|
---|
1045 | : "r" (addr));
|
---|
1046 | return ret;
|
---|
1047 | }
|
---|
1048 |
|
---|
1049 | static __inline__ unsigned short
|
---|
1050 | xf86ReadMmio16(__volatile__ void *base, const unsigned long offset)
|
---|
1051 | {
|
---|
1052 | return *(volatile unsigned short *)((char *)base + offset) ;
|
---|
1053 | }
|
---|
1054 |
|
---|
1055 | static __inline__ void
|
---|
1056 | xf86WriteMmio16Swap(__volatile__ void *base, const unsigned long offset,
|
---|
1057 | const unsigned int val)
|
---|
1058 | {
|
---|
1059 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
1060 |
|
---|
1061 | __asm__ __volatile__(
|
---|
1062 | "wsbh %0, %0;\n\t"
|
---|
1063 | "shi %0, [%1];\n\t"
|
---|
1064 | : /* No outputs */
|
---|
1065 | : "r" (val), "r" (addr));
|
---|
1066 | barrier();
|
---|
1067 | }
|
---|
1068 |
|
---|
1069 | static __inline__ void
|
---|
1070 | xf86WriteMmio16(__volatile__ void *base, const unsigned long offset,
|
---|
1071 | const unsigned int val)
|
---|
1072 | {
|
---|
1073 | *(volatile unsigned short *)((unsigned char *)base + offset) = val ;
|
---|
1074 | barrier();
|
---|
1075 | }
|
---|
1076 |
|
---|
1077 | static __inline__ void
|
---|
1078 | xf86WriteMmio16SwapNB(__volatile__ void *base, const unsigned long offset,
|
---|
1079 | const unsigned int val)
|
---|
1080 | {
|
---|
1081 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
1082 |
|
---|
1083 | __asm__ __volatile__(
|
---|
1084 | "wsbh %0, %0;\n\t"
|
---|
1085 | "shi %0, [%1];\n\t"
|
---|
1086 | : /* No outputs */
|
---|
1087 | : "r" (val), "r" (addr));
|
---|
1088 | }
|
---|
1089 |
|
---|
1090 | static __inline__ void
|
---|
1091 | xf86WriteMmio16NB(__volatile__ void *base, const unsigned long offset,
|
---|
1092 | const unsigned int val)
|
---|
1093 | {
|
---|
1094 | *(volatile unsigned short *)((unsigned char *)base + offset) = val ;
|
---|
1095 | }
|
---|
1096 |
|
---|
1097 | static __inline__ unsigned int
|
---|
1098 | xf86ReadMmio32Swap(__volatile__ void *base, const unsigned long offset)
|
---|
1099 | {
|
---|
1100 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
1101 | unsigned int ret;
|
---|
1102 |
|
---|
1103 | __asm__ __volatile__(
|
---|
1104 | "lwi %0, [%1];\n\t"
|
---|
1105 | "wsbh %0, %0;\n\t"
|
---|
1106 | "rotri %0, %0, 16;\n\t"
|
---|
1107 | : "=r" (ret)
|
---|
1108 | : "r" (addr));
|
---|
1109 | return ret;
|
---|
1110 | }
|
---|
1111 |
|
---|
1112 | static __inline__ unsigned int
|
---|
1113 | xf86ReadMmio32(__volatile__ void *base, const unsigned long offset)
|
---|
1114 | {
|
---|
1115 | return *(volatile unsigned int *)((unsigned char *)base + offset) ;
|
---|
1116 | }
|
---|
1117 |
|
---|
1118 | static __inline__ void
|
---|
1119 | xf86WriteMmio32Swap(__volatile__ void *base, const unsigned long offset,
|
---|
1120 | const unsigned int val)
|
---|
1121 | {
|
---|
1122 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
1123 |
|
---|
1124 | __asm__ __volatile__(
|
---|
1125 | "wsbh %0, %0;\n\t"
|
---|
1126 | "rotri %0, %0, 16;\n\t"
|
---|
1127 | "swi %0, [%1];\n\t"
|
---|
1128 | : /* No outputs */
|
---|
1129 | : "r" (val), "r" (addr));
|
---|
1130 | barrier();
|
---|
1131 | }
|
---|
1132 |
|
---|
1133 | static __inline__ void
|
---|
1134 | xf86WriteMmio32(__volatile__ void *base, const unsigned long offset,
|
---|
1135 | const unsigned int val)
|
---|
1136 | {
|
---|
1137 | *(volatile unsigned int *)((unsigned char *)base + offset) = val ;
|
---|
1138 | barrier();
|
---|
1139 | }
|
---|
1140 |
|
---|
1141 | static __inline__ void
|
---|
1142 | xf86WriteMmio32SwapNB(__volatile__ void *base, const unsigned long offset,
|
---|
1143 | const unsigned int val)
|
---|
1144 | {
|
---|
1145 | unsigned long addr = ((unsigned long)base) + offset;
|
---|
1146 |
|
---|
1147 | __asm__ __volatile__(
|
---|
1148 | "wsbh %0, %0;\n\t"
|
---|
1149 | "rotri %0, %0, 16;\n\t"
|
---|
1150 | "swi %0, [%1];\n\t"
|
---|
1151 | : /* No outputs */
|
---|
1152 | : "r" (val), "r" (addr));
|
---|
1153 | }
|
---|
1154 |
|
---|
1155 | static __inline__ void
|
---|
1156 | xf86WriteMmio32NB(__volatile__ void *base, const unsigned long offset,
|
---|
1157 | const unsigned int val)
|
---|
1158 | {
|
---|
1159 | *(volatile unsigned int *)((unsigned char *)base + offset) = val ;
|
---|
1160 | }
|
---|
1161 |
|
---|
1162 | # if defined(NDS32_MMIO_SWAP)
|
---|
1163 | static __inline__ void
|
---|
1164 | outb(unsigned PORT_SIZE port, unsigned char val)
|
---|
1165 | {
|
---|
1166 | xf86WriteMmio8(IOPortBase, port, val);
|
---|
1167 | }
|
---|
1168 |
|
---|
1169 | static __inline__ void
|
---|
1170 | outw(unsigned PORT_SIZE port, unsigned short val)
|
---|
1171 | {
|
---|
1172 | xf86WriteMmio16Swap(IOPortBase, port, val);
|
---|
1173 | }
|
---|
1174 |
|
---|
1175 | static __inline__ void
|
---|
1176 | outl(unsigned PORT_SIZE port, unsigned int val)
|
---|
1177 | {
|
---|
1178 | xf86WriteMmio32Swap(IOPortBase, port, val);
|
---|
1179 | }
|
---|
1180 |
|
---|
1181 | static __inline__ unsigned int
|
---|
1182 | inb(unsigned PORT_SIZE port)
|
---|
1183 | {
|
---|
1184 | return xf86ReadMmio8(IOPortBase, port);
|
---|
1185 | }
|
---|
1186 |
|
---|
1187 | static __inline__ unsigned int
|
---|
1188 | inw(unsigned PORT_SIZE port)
|
---|
1189 | {
|
---|
1190 | return xf86ReadMmio16Swap(IOPortBase, port);
|
---|
1191 | }
|
---|
1192 |
|
---|
1193 | static __inline__ unsigned int
|
---|
1194 | inl(unsigned PORT_SIZE port)
|
---|
1195 | {
|
---|
1196 | return xf86ReadMmio32Swap(IOPortBase, port);
|
---|
1197 | }
|
---|
1198 |
|
---|
1199 | static __inline__ unsigned long ldq_u(unsigned long *p)
|
---|
1200 | {
|
---|
1201 | unsigned long addr = (unsigned long)p;
|
---|
1202 | unsigned int ret;
|
---|
1203 |
|
---|
1204 | __asm__ __volatile__(
|
---|
1205 | "lmw.bi %0, [%1], %0, 0;\n\t"
|
---|
1206 | "wsbh %0, %0;\n\t"
|
---|
1207 | "rotri %0, %0, 16;\n\t"
|
---|
1208 | : "=r" (ret)
|
---|
1209 | : "r" (addr));
|
---|
1210 | return ret;
|
---|
1211 | }
|
---|
1212 |
|
---|
1213 | static __inline__ unsigned long ldl_u(unsigned int *p)
|
---|
1214 | {
|
---|
1215 | unsigned long addr = (unsigned long)p;
|
---|
1216 | unsigned int ret;
|
---|
1217 |
|
---|
1218 | __asm__ __volatile__(
|
---|
1219 | "lmw.bi %0, [%1], %0, 0;\n\t"
|
---|
1220 | "wsbh %0, %0;\n\t"
|
---|
1221 | "rotri %0, %0, 16;\n\t"
|
---|
1222 | : "=r" (ret)
|
---|
1223 | : "r" (addr));
|
---|
1224 | return ret;
|
---|
1225 | }
|
---|
1226 |
|
---|
1227 | static __inline__ void stq_u(unsigned long val, unsigned long *p)
|
---|
1228 | {
|
---|
1229 | unsigned long addr = (unsigned long)p;
|
---|
1230 |
|
---|
1231 | __asm__ __volatile__(
|
---|
1232 | "wsbh %0, %0;\n\t"
|
---|
1233 | "rotri %0, %0, 16;\n\t"
|
---|
1234 | "smw.bi %0, [%1], %0, 0;\n\t"
|
---|
1235 | : /* No outputs */
|
---|
1236 | : "r" (val), "r" (addr));
|
---|
1237 | }
|
---|
1238 |
|
---|
1239 | static __inline__ void stl_u(unsigned long val, unsigned int *p)
|
---|
1240 | {
|
---|
1241 | unsigned long addr = (unsigned long)p;
|
---|
1242 |
|
---|
1243 | __asm__ __volatile__(
|
---|
1244 | "wsbh %0, %0;\n\t"
|
---|
1245 | "rotri %0, %0, 16;\n\t"
|
---|
1246 | "smw.bi %0, [%1], %0, 0;\n\t"
|
---|
1247 | : /* No outputs */
|
---|
1248 | : "r" (val), "r" (addr));
|
---|
1249 | }
|
---|
1250 |
|
---|
1251 | # else /* !NDS32_MMIO_SWAP */
|
---|
1252 | static __inline__ void
|
---|
1253 | outb(unsigned PORT_SIZE port, unsigned char val)
|
---|
1254 | {
|
---|
1255 | *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))) = val;
|
---|
1256 | barrier();
|
---|
1257 | }
|
---|
1258 |
|
---|
1259 | static __inline__ void
|
---|
1260 | outw(unsigned PORT_SIZE port, unsigned short val)
|
---|
1261 | {
|
---|
1262 | *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))) = val;
|
---|
1263 | barrier();
|
---|
1264 | }
|
---|
1265 |
|
---|
1266 | static __inline__ void
|
---|
1267 | outl(unsigned PORT_SIZE port, unsigned int val)
|
---|
1268 | {
|
---|
1269 | *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))) = val;
|
---|
1270 | barrier();
|
---|
1271 | }
|
---|
1272 | static __inline__ unsigned int
|
---|
1273 | inb(unsigned PORT_SIZE port)
|
---|
1274 | {
|
---|
1275 | return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port)));
|
---|
1276 | }
|
---|
1277 |
|
---|
1278 | static __inline__ unsigned int
|
---|
1279 | inw(unsigned PORT_SIZE port)
|
---|
1280 | {
|
---|
1281 | return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port)));
|
---|
1282 | }
|
---|
1283 |
|
---|
1284 | static __inline__ unsigned int
|
---|
1285 | inl(unsigned PORT_SIZE port)
|
---|
1286 | {
|
---|
1287 | return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port)));
|
---|
1288 | }
|
---|
1289 |
|
---|
1290 | static __inline__ unsigned long ldq_u(unsigned long *p)
|
---|
1291 | {
|
---|
1292 | unsigned long addr = (unsigned long)p;
|
---|
1293 | unsigned int ret;
|
---|
1294 |
|
---|
1295 | __asm__ __volatile__(
|
---|
1296 | "lmw.bi %0, [%1], %0, 0;\n\t"
|
---|
1297 | : "=r" (ret)
|
---|
1298 | : "r" (addr));
|
---|
1299 | return ret;
|
---|
1300 | }
|
---|
1301 |
|
---|
1302 | static __inline__ unsigned long ldl_u(unsigned int *p)
|
---|
1303 | {
|
---|
1304 | unsigned long addr = (unsigned long)p;
|
---|
1305 | unsigned int ret;
|
---|
1306 |
|
---|
1307 | __asm__ __volatile__(
|
---|
1308 | "lmw.bi %0, [%1], %0, 0;\n\t"
|
---|
1309 | : "=r" (ret)
|
---|
1310 | : "r" (addr));
|
---|
1311 | return ret;
|
---|
1312 | }
|
---|
1313 |
|
---|
1314 |
|
---|
1315 | static __inline__ void stq_u(unsigned long val, unsigned long *p)
|
---|
1316 | {
|
---|
1317 | unsigned long addr = (unsigned long)p;
|
---|
1318 |
|
---|
1319 | __asm__ __volatile__(
|
---|
1320 | "smw.bi %0, [%1], %0, 0;\n\t"
|
---|
1321 | : /* No outputs */
|
---|
1322 | : "r" (val), "r" (addr));
|
---|
1323 | }
|
---|
1324 |
|
---|
1325 | static __inline__ void stl_u(unsigned long val, unsigned int *p)
|
---|
1326 | {
|
---|
1327 | unsigned long addr = (unsigned long)p;
|
---|
1328 |
|
---|
1329 | __asm__ __volatile__(
|
---|
1330 | "smw.bi %0, [%1], %0, 0;\n\t"
|
---|
1331 | : /* No outputs */
|
---|
1332 | : "r" (val), "r" (addr));
|
---|
1333 | }
|
---|
1334 | # endif /* NDS32_MMIO_SWAP */
|
---|
1335 |
|
---|
1336 | # if (((X_BYTE_ORDER == X_BIG_ENDIAN) && !defined(NDS32_MMIO_SWAP)) || ((X_BYTE_ORDER != X_BIG_ENDIAN) && defined(NDS32_MMIO_SWAP)))
|
---|
1337 | # define ldw_u(p) ((*(unsigned char *)(p)) << 8 | \
|
---|
1338 | (*((unsigned char *)(p)+1)))
|
---|
1339 | # define stw_u(v,p) (*(unsigned char *)(p)) = ((v) >> 8); \
|
---|
1340 | (*((unsigned char *)(p)+1)) = (v)
|
---|
1341 | # else
|
---|
1342 | # define ldw_u(p) ((*(unsigned char *)(p)) | \
|
---|
1343 | (*((unsigned char *)(p)+1)<<8))
|
---|
1344 | # define stw_u(v,p) (*(unsigned char *)(p)) = (v); \
|
---|
1345 | (*((unsigned char *)(p)+1)) = ((v) >> 8)
|
---|
1346 | # endif
|
---|
1347 |
|
---|
1348 | # define mem_barrier() /* XXX: nop for now */
|
---|
1349 | # define write_mem_barrier() /* XXX: nop for now */
|
---|
1350 |
|
---|
1351 | # else /* ix86 */
|
---|
1352 |
|
---|
1353 | # if !defined(__SUNPRO_C)
|
---|
1354 | # if !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__m32r__)
|
---|
1355 | # ifdef GCCUSESGAS
|
---|
1356 |
|
---|
1357 | /*
|
---|
1358 | * If gcc uses gas rather than the native assembler, the syntax of these
|
---|
1359 | * inlines has to be different. DHD
|
---|
1360 | */
|
---|
1361 |
|
---|
1362 | static __inline__ void
|
---|
1363 | outb(unsigned short port, unsigned char val)
|
---|
1364 | {
|
---|
1365 | __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
|
---|
1366 | }
|
---|
1367 |
|
---|
1368 |
|
---|
1369 | static __inline__ void
|
---|
1370 | outw(unsigned short port, unsigned short val)
|
---|
1371 | {
|
---|
1372 | __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
|
---|
1373 | }
|
---|
1374 |
|
---|
1375 | static __inline__ void
|
---|
1376 | outl(unsigned short port, unsigned int val)
|
---|
1377 | {
|
---|
1378 | __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
|
---|
1379 | }
|
---|
1380 |
|
---|
1381 | static __inline__ unsigned int
|
---|
1382 | inb(unsigned short port)
|
---|
1383 | {
|
---|
1384 | unsigned char ret;
|
---|
1385 | __asm__ __volatile__("inb %1,%0" :
|
---|
1386 | "=a" (ret) :
|
---|
1387 | "d" (port));
|
---|
1388 | return ret;
|
---|
1389 | }
|
---|
1390 |
|
---|
1391 | static __inline__ unsigned int
|
---|
1392 | inw(unsigned short port)
|
---|
1393 | {
|
---|
1394 | unsigned short ret;
|
---|
1395 | __asm__ __volatile__("inw %1,%0" :
|
---|
1396 | "=a" (ret) :
|
---|
1397 | "d" (port));
|
---|
1398 | return ret;
|
---|
1399 | }
|
---|
1400 |
|
---|
1401 | static __inline__ unsigned int
|
---|
1402 | inl(unsigned short port)
|
---|
1403 | {
|
---|
1404 | unsigned int ret;
|
---|
1405 | __asm__ __volatile__("inl %1,%0" :
|
---|
1406 | "=a" (ret) :
|
---|
1407 | "d" (port));
|
---|
1408 | return ret;
|
---|
1409 | }
|
---|
1410 |
|
---|
1411 | # else /* GCCUSESGAS */
|
---|
1412 |
|
---|
1413 | static __inline__ void
|
---|
1414 | outb(unsigned short port, unsigned char val)
|
---|
1415 | {
|
---|
1416 | __asm__ __volatile__("out%B0 (%1)" : :"a" (val), "d" (port));
|
---|
1417 | }
|
---|
1418 |
|
---|
1419 | static __inline__ void
|
---|
1420 | outw(unsigned short port, unsigned short val)
|
---|
1421 | {
|
---|
1422 | __asm__ __volatile__("out%W0 (%1)" : :"a" (val), "d" (port));
|
---|
1423 | }
|
---|
1424 |
|
---|
1425 | static __inline__ void
|
---|
1426 | outl(unsigned short port, unsigned int val)
|
---|
1427 | {
|
---|
1428 | __asm__ __volatile__("out%L0 (%1)" : :"a" (val), "d" (port));
|
---|
1429 | }
|
---|
1430 |
|
---|
1431 | static __inline__ unsigned int
|
---|
1432 | inb(unsigned short port)
|
---|
1433 | {
|
---|
1434 | unsigned char ret;
|
---|
1435 | __asm__ __volatile__("in%B0 (%1)" :
|
---|
1436 | "=a" (ret) :
|
---|
1437 | "d" (port));
|
---|
1438 | return ret;
|
---|
1439 | }
|
---|
1440 |
|
---|
1441 | static __inline__ unsigned int
|
---|
1442 | inw(unsigned short port)
|
---|
1443 | {
|
---|
1444 | unsigned short ret;
|
---|
1445 | __asm__ __volatile__("in%W0 (%1)" :
|
---|
1446 | "=a" (ret) :
|
---|
1447 | "d" (port));
|
---|
1448 | return ret;
|
---|
1449 | }
|
---|
1450 |
|
---|
1451 | static __inline__ unsigned int
|
---|
1452 | inl(unsigned short port)
|
---|
1453 | {
|
---|
1454 | unsigned int ret;
|
---|
1455 | __asm__ __volatile__("in%L0 (%1)" :
|
---|
1456 | "=a" (ret) :
|
---|
1457 | "d" (port));
|
---|
1458 | return ret;
|
---|
1459 | }
|
---|
1460 |
|
---|
1461 | # endif /* GCCUSESGAS */
|
---|
1462 |
|
---|
1463 | # else /* !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__m32r__) */
|
---|
1464 |
|
---|
1465 | static __inline__ void
|
---|
1466 | outb(unsigned short port, unsigned char val)
|
---|
1467 | {
|
---|
1468 | }
|
---|
1469 |
|
---|
1470 | static __inline__ void
|
---|
1471 | outw(unsigned short port, unsigned short val)
|
---|
1472 | {
|
---|
1473 | }
|
---|
1474 |
|
---|
1475 | static __inline__ void
|
---|
1476 | outl(unsigned short port, unsigned int val)
|
---|
1477 | {
|
---|
1478 | }
|
---|
1479 |
|
---|
1480 | static __inline__ unsigned int
|
---|
1481 | inb(unsigned short port)
|
---|
1482 | {
|
---|
1483 | return 0;
|
---|
1484 | }
|
---|
1485 |
|
---|
1486 | static __inline__ unsigned int
|
---|
1487 | inw(unsigned short port)
|
---|
1488 | {
|
---|
1489 | return 0;
|
---|
1490 | }
|
---|
1491 |
|
---|
1492 | static __inline__ unsigned int
|
---|
1493 | inl(unsigned short port)
|
---|
1494 | {
|
---|
1495 | return 0;
|
---|
1496 | }
|
---|
1497 |
|
---|
1498 | # endif /* FAKEIT */
|
---|
1499 | # endif /* __SUNPRO_C */
|
---|
1500 |
|
---|
1501 | # endif /* ix86 */
|
---|
1502 |
|
---|
1503 | # else /* !GNUC */
|
---|
1504 | # if defined(__STDC__) && (__STDC__ == 1)
|
---|
1505 | # ifndef asm
|
---|
1506 | # define asm __asm
|
---|
1507 | # endif
|
---|
1508 | # endif
|
---|
1509 | # if !defined(__SUNPRO_C)
|
---|
1510 | # include <sys/inline.h>
|
---|
1511 | # endif
|
---|
1512 | # if !defined(__HIGHC__) && !defined(__SUNPRO_C) || \
|
---|
1513 | defined(__USLC__)
|
---|
1514 | # pragma asm partial_optimization outl
|
---|
1515 | # pragma asm partial_optimization outw
|
---|
1516 | # pragma asm partial_optimization outb
|
---|
1517 | # pragma asm partial_optimization inl
|
---|
1518 | # pragma asm partial_optimization inw
|
---|
1519 | # pragma asm partial_optimization inb
|
---|
1520 | # endif
|
---|
1521 | # endif /* __GNUC__ */
|
---|
1522 |
|
---|
1523 | # endif /* NO_INLINE */
|
---|
1524 |
|
---|
1525 | # ifdef __alpha__
|
---|
1526 | /* entry points for Mmio memory access routines */
|
---|
1527 | extern _X_EXPORT int (*xf86ReadMmio8)(void *, unsigned long);
|
---|
1528 | extern _X_EXPORT int (*xf86ReadMmio16)(void *, unsigned long);
|
---|
1529 | # ifndef STANDALONE_MMIO
|
---|
1530 | extern _X_EXPORT int (*xf86ReadMmio32)(void *, unsigned long);
|
---|
1531 | # else
|
---|
1532 | /* Some DRI 3D drivers need MMIO_IN32. */
|
---|
1533 | static __inline__ int
|
---|
1534 | xf86ReadMmio32(void *Base, unsigned long Offset)
|
---|
1535 | {
|
---|
1536 | mem_barrier();
|
---|
1537 | return *(volatile unsigned int*)((unsigned long)Base+(Offset));
|
---|
1538 | }
|
---|
1539 | # endif
|
---|
1540 | extern _X_EXPORT void (*xf86WriteMmio8)(int, void *, unsigned long);
|
---|
1541 | extern _X_EXPORT void (*xf86WriteMmio16)(int, void *, unsigned long);
|
---|
1542 | extern _X_EXPORT void (*xf86WriteMmio32)(int, void *, unsigned long);
|
---|
1543 | extern _X_EXPORT void (*xf86WriteMmioNB8)(int, void *, unsigned long);
|
---|
1544 | extern _X_EXPORT void (*xf86WriteMmioNB16)(int, void *, unsigned long);
|
---|
1545 | extern _X_EXPORT void (*xf86WriteMmioNB32)(int, void *, unsigned long);
|
---|
1546 | extern _X_EXPORT void xf86SlowBCopyFromBus(unsigned char *, unsigned char *, int);
|
---|
1547 | extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int);
|
---|
1548 |
|
---|
1549 | /* Some macros to hide the system dependencies for MMIO accesses */
|
---|
1550 | /* Changed to kill noise generated by gcc's -Wcast-align */
|
---|
1551 | # define MMIO_IN8(base, offset) (*xf86ReadMmio8)(base, offset)
|
---|
1552 | # define MMIO_IN16(base, offset) (*xf86ReadMmio16)(base, offset)
|
---|
1553 | # ifndef STANDALONE_MMIO
|
---|
1554 | # define MMIO_IN32(base, offset) (*xf86ReadMmio32)(base, offset)
|
---|
1555 | # else
|
---|
1556 | # define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
|
---|
1557 | # endif
|
---|
1558 |
|
---|
1559 | # define MMIO_OUT32(base, offset, val) \
|
---|
1560 | do { \
|
---|
1561 | write_mem_barrier(); \
|
---|
1562 | *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val); \
|
---|
1563 | } while (0)
|
---|
1564 | # define MMIO_ONB32(base, offset, val) \
|
---|
1565 | *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
|
---|
1566 |
|
---|
1567 | # define MMIO_OUT8(base, offset, val) \
|
---|
1568 | (*xf86WriteMmio8)((CARD8)(val), base, offset)
|
---|
1569 | # define MMIO_OUT16(base, offset, val) \
|
---|
1570 | (*xf86WriteMmio16)((CARD16)(val), base, offset)
|
---|
1571 | # define MMIO_ONB8(base, offset, val) \
|
---|
1572 | (*xf86WriteMmioNB8)((CARD8)(val), base, offset)
|
---|
1573 | # define MMIO_ONB16(base, offset, val) \
|
---|
1574 | (*xf86WriteMmioNB16)((CARD16)(val), base, offset)
|
---|
1575 | # define MMIO_MOVE32(base, offset, val) \
|
---|
1576 | MMIO_OUT32(base, offset, val)
|
---|
1577 |
|
---|
1578 | # elif defined(__powerpc__)
|
---|
1579 | /*
|
---|
1580 | * we provide byteswapping and no byteswapping functions here
|
---|
1581 | * with byteswapping as default,
|
---|
1582 | * drivers that don't need byteswapping should define PPC_MMIO_IS_BE
|
---|
1583 | */
|
---|
1584 | # define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
|
---|
1585 | # define MMIO_OUT8(base, offset, val) \
|
---|
1586 | xf86WriteMmio8(base, offset, (CARD8)(val))
|
---|
1587 | # define MMIO_ONB8(base, offset, val) \
|
---|
1588 | xf86WriteMmioNB8(base, offset, (CARD8)(val))
|
---|
1589 |
|
---|
1590 | # if defined(PPC_MMIO_IS_BE) /* No byteswapping */
|
---|
1591 | # define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
|
---|
1592 | # define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
|
---|
1593 | # define MMIO_OUT16(base, offset, val) \
|
---|
1594 | xf86WriteMmio16Be(base, offset, (CARD16)(val))
|
---|
1595 | # define MMIO_OUT32(base, offset, val) \
|
---|
1596 | xf86WriteMmio32Be(base, offset, (CARD32)(val))
|
---|
1597 | # define MMIO_ONB16(base, offset, val) \
|
---|
1598 | xf86WriteMmioNB16Be(base, offset, (CARD16)(val))
|
---|
1599 | # define MMIO_ONB32(base, offset, val) \
|
---|
1600 | xf86WriteMmioNB32Be(base, offset, (CARD32)(val))
|
---|
1601 | # else /* byteswapping is the default */
|
---|
1602 | # define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
|
---|
1603 | # define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
|
---|
1604 | # define MMIO_OUT16(base, offset, val) \
|
---|
1605 | xf86WriteMmio16Le(base, offset, (CARD16)(val))
|
---|
1606 | # define MMIO_OUT32(base, offset, val) \
|
---|
1607 | xf86WriteMmio32Le(base, offset, (CARD32)(val))
|
---|
1608 | # define MMIO_ONB16(base, offset, val) \
|
---|
1609 | xf86WriteMmioNB16Le(base, offset, (CARD16)(val))
|
---|
1610 | # define MMIO_ONB32(base, offset, val) \
|
---|
1611 | xf86WriteMmioNB32Le(base, offset, (CARD32)(val))
|
---|
1612 | # endif
|
---|
1613 |
|
---|
1614 | # define MMIO_MOVE32(base, offset, val) \
|
---|
1615 | xf86WriteMmio32Be(base, offset, (CARD32)(val))
|
---|
1616 |
|
---|
1617 | # elif defined(__sparc__) || defined(sparc) || defined(__sparc)
|
---|
1618 | /*
|
---|
1619 | * Like powerpc, we provide byteswapping and no byteswapping functions
|
---|
1620 | * here with byteswapping as default, drivers that don't need byteswapping
|
---|
1621 | * should define SPARC_MMIO_IS_BE (perhaps create a generic macro so that we
|
---|
1622 | * do not need to use PPC_MMIO_IS_BE and the sparc one in all the same places
|
---|
1623 | * of drivers?).
|
---|
1624 | */
|
---|
1625 | # define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
|
---|
1626 | # define MMIO_OUT8(base, offset, val) \
|
---|
1627 | xf86WriteMmio8(base, offset, (CARD8)(val))
|
---|
1628 | # define MMIO_ONB8(base, offset, val) \
|
---|
1629 | xf86WriteMmio8NB(base, offset, (CARD8)(val))
|
---|
1630 |
|
---|
1631 | # if defined(SPARC_MMIO_IS_BE) /* No byteswapping */
|
---|
1632 | # define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
|
---|
1633 | # define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
|
---|
1634 | # define MMIO_OUT16(base, offset, val) \
|
---|
1635 | xf86WriteMmio16Be(base, offset, (CARD16)(val))
|
---|
1636 | # define MMIO_OUT32(base, offset, val) \
|
---|
1637 | xf86WriteMmio32Be(base, offset, (CARD32)(val))
|
---|
1638 | # define MMIO_ONB16(base, offset, val) \
|
---|
1639 | xf86WriteMmio16BeNB(base, offset, (CARD16)(val))
|
---|
1640 | # define MMIO_ONB32(base, offset, val) \
|
---|
1641 | xf86WriteMmio32BeNB(base, offset, (CARD32)(val))
|
---|
1642 | # else /* byteswapping is the default */
|
---|
1643 | # define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
|
---|
1644 | # define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
|
---|
1645 | # define MMIO_OUT16(base, offset, val) \
|
---|
1646 | xf86WriteMmio16Le(base, offset, (CARD16)(val))
|
---|
1647 | # define MMIO_OUT32(base, offset, val) \
|
---|
1648 | xf86WriteMmio32Le(base, offset, (CARD32)(val))
|
---|
1649 | # define MMIO_ONB16(base, offset, val) \
|
---|
1650 | xf86WriteMmio16LeNB(base, offset, (CARD16)(val))
|
---|
1651 | # define MMIO_ONB32(base, offset, val) \
|
---|
1652 | xf86WriteMmio32LeNB(base, offset, (CARD32)(val))
|
---|
1653 | # endif
|
---|
1654 |
|
---|
1655 | # define MMIO_MOVE32(base, offset, val) \
|
---|
1656 | xf86WriteMmio32Be(base, offset, (CARD32)(val))
|
---|
1657 |
|
---|
1658 | # elif defined(__nds32__)
|
---|
1659 | /*
|
---|
1660 | * we provide byteswapping and no byteswapping functions here
|
---|
1661 | * with no byteswapping as default; when endianness of CPU core
|
---|
1662 | * and I/O devices don't match, byte swapping is necessary
|
---|
1663 | * drivers that need byteswapping should define NDS32_MMIO_SWAP
|
---|
1664 | */
|
---|
1665 | # define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
|
---|
1666 | # define MMIO_OUT8(base, offset, val) \
|
---|
1667 | xf86WriteMmio8(base, offset, (CARD8)(val))
|
---|
1668 | # define MMIO_ONB8(base, offset, val) \
|
---|
1669 | xf86WriteMmioNB8(base, offset, (CARD8)(val))
|
---|
1670 |
|
---|
1671 | # if defined(NDS32_MMIO_SWAP) /* byteswapping */
|
---|
1672 | # define MMIO_IN16(base, offset) xf86ReadMmio16Swap(base, offset)
|
---|
1673 | # define MMIO_IN32(base, offset) xf86ReadMmio32Swap(base, offset)
|
---|
1674 | # define MMIO_OUT16(base, offset, val) \
|
---|
1675 | xf86WriteMmio16Swap(base, offset, (CARD16)(val))
|
---|
1676 | # define MMIO_OUT32(base, offset, val) \
|
---|
1677 | xf86WriteMmio32Swap(base, offset, (CARD32)(val))
|
---|
1678 | # define MMIO_ONB16(base, offset, val) \
|
---|
1679 | xf86WriteMmioNB16Swap(base, offset, (CARD16)(val))
|
---|
1680 | # define MMIO_ONB32(base, offset, val) \
|
---|
1681 | xf86WriteMmioNB32Swap(base, offset, (CARD32)(val))
|
---|
1682 | # else /* no byteswapping is the default */
|
---|
1683 | # define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset)
|
---|
1684 | # define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
|
---|
1685 | # define MMIO_OUT16(base, offset, val) \
|
---|
1686 | xf86WriteMmio16(base, offset, (CARD16)(val))
|
---|
1687 | # define MMIO_OUT32(base, offset, val) \
|
---|
1688 | xf86WriteMmio32(base, offset, (CARD32)(val))
|
---|
1689 | # define MMIO_ONB16(base, offset, val) \
|
---|
1690 | xf86WriteMmioNB16(base, offset, (CARD16)(val))
|
---|
1691 | # define MMIO_ONB32(base, offset, val) \
|
---|
1692 | xf86WriteMmioNB32(base, offset, (CARD32)(val))
|
---|
1693 | # endif
|
---|
1694 |
|
---|
1695 | # define MMIO_MOVE32(base, offset, val) \
|
---|
1696 | xf86WriteMmio32(base, offset, (CARD32)(val))
|
---|
1697 |
|
---|
1698 | #ifdef N1213_HC /* for NDS32 N1213 hardcore */
|
---|
1699 | static __inline__ void nds32_flush_icache(char *addr)
|
---|
1700 | {
|
---|
1701 | __asm__ volatile (
|
---|
1702 | "isync %0;"
|
---|
1703 | "msync;"
|
---|
1704 | "isb;"
|
---|
1705 | "cctl %0,L1I_VA_INVAL;"
|
---|
1706 | "isb;"
|
---|
1707 | : : "r"(addr) : "memory");
|
---|
1708 | }
|
---|
1709 | #else
|
---|
1710 | static __inline__ void nds32_flush_icache(char *addr)
|
---|
1711 | {
|
---|
1712 | __asm__ volatile (
|
---|
1713 | "isync %0;"
|
---|
1714 | "isb;"
|
---|
1715 | : : "r"(addr) : "memory");
|
---|
1716 | }
|
---|
1717 | #endif
|
---|
1718 |
|
---|
1719 | # else /* !__alpha__ && !__powerpc__ && !__sparc__ */
|
---|
1720 |
|
---|
1721 | # define MMIO_IN8(base, offset) \
|
---|
1722 | *(volatile CARD8 *)(((CARD8*)(base)) + (offset))
|
---|
1723 | # define MMIO_IN16(base, offset) \
|
---|
1724 | *(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset))
|
---|
1725 | # define MMIO_IN32(base, offset) \
|
---|
1726 | *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset))
|
---|
1727 | # define MMIO_OUT8(base, offset, val) \
|
---|
1728 | *(volatile CARD8 *)(((CARD8*)(base)) + (offset)) = (val)
|
---|
1729 | # define MMIO_OUT16(base, offset, val) \
|
---|
1730 | *(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
|
---|
1731 | # define MMIO_OUT32(base, offset, val) \
|
---|
1732 | *(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
|
---|
1733 | # define MMIO_ONB8(base, offset, val) MMIO_OUT8(base, offset, val)
|
---|
1734 | # define MMIO_ONB16(base, offset, val) MMIO_OUT16(base, offset, val)
|
---|
1735 | # define MMIO_ONB32(base, offset, val) MMIO_OUT32(base, offset, val)
|
---|
1736 |
|
---|
1737 | # define MMIO_MOVE32(base, offset, val) MMIO_OUT32(base, offset, val)
|
---|
1738 |
|
---|
1739 | # endif /* __alpha__ */
|
---|
1740 |
|
---|
1741 | /*
|
---|
1742 | * With Intel, the version in os-support/misc/SlowBcopy.s is used.
|
---|
1743 | * This avoids port I/O during the copy (which causes problems with
|
---|
1744 | * some hardware).
|
---|
1745 | */
|
---|
1746 | # ifdef __alpha__
|
---|
1747 | # define slowbcopy_tobus(src,dst,count) xf86SlowBCopyToBus(src,dst,count)
|
---|
1748 | # define slowbcopy_frombus(src,dst,count) xf86SlowBCopyFromBus(src,dst,count)
|
---|
1749 | # else /* __alpha__ */
|
---|
1750 | # define slowbcopy_tobus(src,dst,count) xf86SlowBcopy(src,dst,count)
|
---|
1751 | # define slowbcopy_frombus(src,dst,count) xf86SlowBcopy(src,dst,count)
|
---|
1752 | # endif /* __alpha__ */
|
---|
1753 |
|
---|
1754 | #endif /* _COMPILER_H */
|
---|