| 1 | /****************************************************************************
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| 2 | *
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| 3 | * Realmode X86 Emulator Library
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| 4 | *
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| 5 | * Copyright (C) 1996-1999 SciTech Software, Inc.
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| 6 | * Copyright (C) David Mosberger-Tang
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| 7 | * Copyright (C) 1999 Egbert Eich
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| 8 | *
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| 9 | * ========================================================================
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| 10 | *
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| 11 | * Permission to use, copy, modify, distribute, and sell this software and
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| 12 | * its documentation for any purpose is hereby granted without fee,
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| 13 | * provided that the above copyright notice appear in all copies and that
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| 14 | * both that copyright notice and this permission notice appear in
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| 15 | * supporting documentation, and that the name of the authors not be used
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| 16 | * in advertising or publicity pertaining to distribution of the software
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| 17 | * without specific, written prior permission. The authors makes no
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| 18 | * representations about the suitability of this software for any purpose.
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| 19 | * It is provided "as is" without express or implied warranty.
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| 20 | *
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| 21 | * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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| 22 | * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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| 23 | * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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| 24 | * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
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| 25 | * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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| 26 | * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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| 27 | * PERFORMANCE OF THIS SOFTWARE.
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| 28 | *
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| 29 | * ========================================================================
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| 30 | *
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| 31 | * Language: ANSI C
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| 32 | * Environment: Any
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| 33 | * Developer: Kendall Bennett
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| 34 | *
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| 35 | * Description: Header file for x86 register definitions.
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| 36 | *
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| 37 | ****************************************************************************/
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| 38 |
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| 39 | #ifndef __X86EMU_REGS_H
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| 40 | #define __X86EMU_REGS_H
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| 41 |
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| 42 | /*---------------------- Macros and type definitions ----------------------*/
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| 43 |
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| 44 | #ifdef PACK
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| 45 | #pragma PACK
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| 46 | #endif
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| 47 |
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| 48 | /*
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| 49 | * General EAX, EBX, ECX, EDX type registers. Note that for
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| 50 | * portability, and speed, the issue of byte swapping is not addressed
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| 51 | * in the registers. All registers are stored in the default format
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| 52 | * available on the host machine. The only critical issue is that the
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| 53 | * registers should line up EXACTLY in the same manner as they do in
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| 54 | * the 386. That is:
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| 55 | *
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| 56 | * EAX & 0xff === AL
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| 57 | * EAX & 0xffff == AX
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| 58 | *
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| 59 | * etc. The result is that alot of the calculations can then be
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| 60 | * done using the native instruction set fully.
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| 61 | */
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| 62 |
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| 63 | #ifdef __BIG_ENDIAN__
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| 64 |
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| 65 | typedef struct {
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| 66 | u32 e_reg;
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| 67 | } I32_reg_t;
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| 68 |
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| 69 | typedef struct {
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| 70 | u16 filler0, x_reg;
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| 71 | } I16_reg_t;
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| 72 |
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| 73 | typedef struct {
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| 74 | u8 filler0, filler1, h_reg, l_reg;
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| 75 | } I8_reg_t;
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| 76 |
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| 77 | #else /* !__BIG_ENDIAN__ */
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| 78 |
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| 79 | typedef struct {
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| 80 | u32 e_reg;
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| 81 | } I32_reg_t;
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| 82 |
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| 83 | typedef struct {
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| 84 | u16 x_reg;
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| 85 | } I16_reg_t;
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| 86 |
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| 87 | typedef struct {
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| 88 | u8 l_reg, h_reg;
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| 89 | } I8_reg_t;
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| 90 |
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| 91 | #endif /* BIG_ENDIAN */
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| 92 |
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| 93 | typedef union {
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| 94 | I32_reg_t I32_reg;
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| 95 | I16_reg_t I16_reg;
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| 96 | I8_reg_t I8_reg;
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| 97 | } i386_general_register;
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| 98 |
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| 99 | struct i386_general_regs {
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| 100 | i386_general_register A, B, C, D;
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| 101 | };
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| 102 |
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| 103 | typedef struct i386_general_regs Gen_reg_t;
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| 104 |
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| 105 | struct i386_special_regs {
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| 106 | i386_general_register SP, BP, SI, DI, IP;
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| 107 | u32 FLAGS;
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| 108 | };
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| 109 |
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| 110 | /*
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| 111 | * Segment registers here represent the 16 bit quantities
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| 112 | * CS, DS, ES, SS.
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| 113 | */
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| 114 |
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| 115 | struct i386_segment_regs {
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| 116 | u16 CS, DS, SS, ES, FS, GS;
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| 117 | };
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| 118 |
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| 119 | /* 8 bit registers */
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| 120 | #define R_AH gen.A.I8_reg.h_reg
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| 121 | #define R_AL gen.A.I8_reg.l_reg
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| 122 | #define R_BH gen.B.I8_reg.h_reg
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| 123 | #define R_BL gen.B.I8_reg.l_reg
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| 124 | #define R_CH gen.C.I8_reg.h_reg
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| 125 | #define R_CL gen.C.I8_reg.l_reg
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| 126 | #define R_DH gen.D.I8_reg.h_reg
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| 127 | #define R_DL gen.D.I8_reg.l_reg
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| 128 |
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| 129 | /* 16 bit registers */
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| 130 | #define R_AX gen.A.I16_reg.x_reg
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| 131 | #define R_BX gen.B.I16_reg.x_reg
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| 132 | #define R_CX gen.C.I16_reg.x_reg
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| 133 | #define R_DX gen.D.I16_reg.x_reg
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| 134 |
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| 135 | /* 32 bit extended registers */
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| 136 | #define R_EAX gen.A.I32_reg.e_reg
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| 137 | #define R_EBX gen.B.I32_reg.e_reg
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| 138 | #define R_ECX gen.C.I32_reg.e_reg
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| 139 | #define R_EDX gen.D.I32_reg.e_reg
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| 140 |
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| 141 | /* special registers */
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| 142 | #define R_SP spc.SP.I16_reg.x_reg
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| 143 | #define R_BP spc.BP.I16_reg.x_reg
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| 144 | #define R_SI spc.SI.I16_reg.x_reg
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| 145 | #define R_DI spc.DI.I16_reg.x_reg
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| 146 | #define R_IP spc.IP.I16_reg.x_reg
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| 147 | #define R_FLG spc.FLAGS
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| 148 |
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| 149 | /* special registers */
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| 150 | #define R_SP spc.SP.I16_reg.x_reg
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| 151 | #define R_BP spc.BP.I16_reg.x_reg
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| 152 | #define R_SI spc.SI.I16_reg.x_reg
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| 153 | #define R_DI spc.DI.I16_reg.x_reg
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| 154 | #define R_IP spc.IP.I16_reg.x_reg
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| 155 | #define R_FLG spc.FLAGS
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| 156 |
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| 157 | /* special registers */
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| 158 | #define R_ESP spc.SP.I32_reg.e_reg
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| 159 | #define R_EBP spc.BP.I32_reg.e_reg
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| 160 | #define R_ESI spc.SI.I32_reg.e_reg
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| 161 | #define R_EDI spc.DI.I32_reg.e_reg
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| 162 | #define R_EIP spc.IP.I32_reg.e_reg
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| 163 | #define R_EFLG spc.FLAGS
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| 164 |
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| 165 | /* segment registers */
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| 166 | #define R_CS seg.CS
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| 167 | #define R_DS seg.DS
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| 168 | #define R_SS seg.SS
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| 169 | #define R_ES seg.ES
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| 170 | #define R_FS seg.FS
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| 171 | #define R_GS seg.GS
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| 172 |
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| 173 | /* flag conditions */
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| 174 | #define FB_CF 0x0001 /* CARRY flag */
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| 175 | #define FB_PF 0x0004 /* PARITY flag */
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| 176 | #define FB_AF 0x0010 /* AUX flag */
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| 177 | #define FB_ZF 0x0040 /* ZERO flag */
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| 178 | #define FB_SF 0x0080 /* SIGN flag */
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| 179 | #define FB_TF 0x0100 /* TRAP flag */
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| 180 | #define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
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| 181 | #define FB_DF 0x0400 /* DIR flag */
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| 182 | #define FB_OF 0x0800 /* OVERFLOW flag */
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| 183 |
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| 184 | /* 80286 and above always have bit#1 set */
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| 185 | #define F_ALWAYS_ON (0x0002) /* flag bits always on */
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| 186 |
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| 187 | /*
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| 188 | * Define a mask for only those flag bits we will ever pass back
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| 189 | * (via PUSHF)
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| 190 | */
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| 191 | #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
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| 192 |
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| 193 | /* following bits masked in to a 16bit quantity */
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| 194 |
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| 195 | #define F_CF 0x0001 /* CARRY flag */
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| 196 | #define F_PF 0x0004 /* PARITY flag */
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| 197 | #define F_AF 0x0010 /* AUX flag */
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| 198 | #define F_ZF 0x0040 /* ZERO flag */
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| 199 | #define F_SF 0x0080 /* SIGN flag */
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| 200 | #define F_TF 0x0100 /* TRAP flag */
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| 201 | #define F_IF 0x0200 /* INTERRUPT ENABLE flag */
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| 202 | #define F_DF 0x0400 /* DIR flag */
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| 203 | #define F_OF 0x0800 /* OVERFLOW flag */
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| 204 |
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| 205 | #define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
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| 206 | #define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
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| 207 | #define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
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| 208 | #define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
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| 209 | #define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
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| 210 |
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| 211 | #define CONDITIONAL_SET_FLAG(COND,FLAG) \
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| 212 | if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
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| 213 |
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| 214 | #define F_PF_CALC 0x010000 /* PARITY flag has been calced */
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| 215 | #define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
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| 216 | #define F_SF_CALC 0x040000 /* SIGN flag has been calced */
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| 217 |
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| 218 | #define F_ALL_CALC 0xff0000 /* All have been calced */
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| 219 |
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| 220 | /*
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| 221 | * Emulator machine state.
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| 222 | * Segment usage control.
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| 223 | */
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| 224 | #define SYSMODE_SEG_DS_SS 0x00000001
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| 225 | #define SYSMODE_SEGOVR_CS 0x00000002
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| 226 | #define SYSMODE_SEGOVR_DS 0x00000004
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| 227 | #define SYSMODE_SEGOVR_ES 0x00000008
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| 228 | #define SYSMODE_SEGOVR_FS 0x00000010
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| 229 | #define SYSMODE_SEGOVR_GS 0x00000020
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| 230 | #define SYSMODE_SEGOVR_SS 0x00000040
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| 231 | #define SYSMODE_PREFIX_REPE 0x00000080
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| 232 | #define SYSMODE_PREFIX_REPNE 0x00000100
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| 233 | #define SYSMODE_PREFIX_DATA 0x00000200
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| 234 | #define SYSMODE_PREFIX_ADDR 0x00000400
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| 235 | #define SYSMODE_INTR_PENDING 0x10000000
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| 236 | #define SYSMODE_EXTRN_INTR 0x20000000
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| 237 | #define SYSMODE_HALTED 0x40000000
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| 238 |
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| 239 | #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
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| 240 | SYSMODE_SEGOVR_CS | \
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| 241 | SYSMODE_SEGOVR_DS | \
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| 242 | SYSMODE_SEGOVR_ES | \
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| 243 | SYSMODE_SEGOVR_FS | \
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| 244 | SYSMODE_SEGOVR_GS | \
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| 245 | SYSMODE_SEGOVR_SS)
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| 246 | #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
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| 247 | SYSMODE_SEGOVR_CS | \
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| 248 | SYSMODE_SEGOVR_DS | \
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| 249 | SYSMODE_SEGOVR_ES | \
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| 250 | SYSMODE_SEGOVR_FS | \
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| 251 | SYSMODE_SEGOVR_GS | \
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| 252 | SYSMODE_SEGOVR_SS | \
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| 253 | SYSMODE_PREFIX_DATA | \
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| 254 | SYSMODE_PREFIX_ADDR)
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| 255 |
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| 256 | #define INTR_SYNCH 0x1
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| 257 | #define INTR_ASYNCH 0x2
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| 258 | #define INTR_HALTED 0x4
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| 259 |
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| 260 | typedef struct {
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| 261 | struct i386_general_regs gen;
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| 262 | struct i386_special_regs spc;
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| 263 | struct i386_segment_regs seg;
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| 264 | /*
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| 265 | * MODE contains information on:
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| 266 | * REPE prefix 2 bits repe,repne
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| 267 | * SEGMENT overrides 5 bits normal,DS,SS,CS,ES
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| 268 | * Delayed flag set 3 bits (zero, signed, parity)
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| 269 | * reserved 6 bits
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| 270 | * interrupt # 8 bits instruction raised interrupt
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| 271 | * BIOS video segregs 4 bits
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| 272 | * Interrupt Pending 1 bits
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| 273 | * Extern interrupt 1 bits
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| 274 | * Halted 1 bits
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| 275 | */
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| 276 | u32 mode;
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| 277 | volatile int intr; /* mask of pending interrupts */
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| 278 | int debug;
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| 279 | #ifdef DEBUG
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| 280 | int check;
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| 281 | u16 saved_ip;
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| 282 | u16 saved_cs;
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| 283 | int enc_pos;
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| 284 | int enc_str_pos;
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| 285 | char decode_buf[32]; /* encoded byte stream */
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| 286 | char decoded_buf[256]; /* disassembled strings */
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| 287 | #endif
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| 288 | u8 intno;
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| 289 | u8 __pad[3];
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| 290 | } X86EMU_regs;
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| 291 |
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| 292 | /****************************************************************************
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| 293 | REMARKS:
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| 294 | Structure maintaining the emulator machine state.
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| 295 |
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| 296 | MEMBERS:
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| 297 | mem_base - Base real mode memory for the emulator
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| 298 | mem_size - Size of the real mode memory block for the emulator
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| 299 | private - private data pointer
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| 300 | x86 - X86 registers
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| 301 | ****************************************************************************/
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| 302 | typedef struct {
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| 303 | unsigned long mem_base;
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| 304 | unsigned long mem_size;
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| 305 | void *private;
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| 306 | X86EMU_regs x86;
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| 307 | } X86EMU_sysEnv;
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| 308 |
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| 309 | #ifdef END_PACK
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| 310 | #pragma END_PACK
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| 311 | #endif
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| 312 |
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| 313 | /*----------------------------- Global Variables --------------------------*/
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| 314 |
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| 315 | #ifdef __cplusplus
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| 316 | extern "C" { /* Use "C" linkage when in C++ mode */
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| 317 | #endif
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| 318 |
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| 319 | /* Global emulator machine state.
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| 320 | *
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| 321 | * We keep it global to avoid pointer dereferences in the code for speed.
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| 322 | */
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| 323 |
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| 324 | extern X86EMU_sysEnv _X86EMU_env;
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| 325 | #define M _X86EMU_env
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| 326 |
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| 327 | /*-------------------------- Function Prototypes --------------------------*/
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| 328 |
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| 329 | /* Function to log information at runtime */
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| 330 |
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| 331 | void printk(const char *fmt, ...);
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| 332 |
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| 333 | #ifdef __cplusplus
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| 334 | } /* End of "C" linkage for C++ */
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| 335 | #endif
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| 336 | #endif /* __X86EMU_REGS_H */
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