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source: vbox/trunk/src/VBox/Additions/x11/x11include/xorg-server-1.3.0.0/vgaReg.h@ 25078

最後變更 在這個檔案從25078是 25078,由 vboxsync 提交於 15 年 前

Additions/x11/x11include: exported and set eol-style on new headers

  • 屬性 svn:eol-style 設為 native
檔案大小: 5.3 KB
 
1/*
2 * Copyright IBM Corporation 1987,1988,1989
3 *
4 * All Rights Reserved
5 *
6 * Permission to use, copy, modify, and distribute this software and its
7 * documentation for any purpose and without fee is hereby granted,
8 * provided that the above copyright notice appear in all copies and that
9 * both that copyright notice and this permission notice appear in
10 * supporting documentation, and that the name of IBM not be
11 * used in advertising or publicity pertaining to distribution of the
12 * software without specific, written prior permission.
13 *
14 * IBM DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
15 * ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
16 * IBM BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
17 * ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
18 * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
19 * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
20 * SOFTWARE.
21 *
22*/
23
24/* $XConsortium: vgaReg.h /main/4 1996/02/21 17:59:02 kaleb $ */
25
26#define SET_BYTE_REGISTER( ioport, value ) outb( ioport, value )
27#define SET_INDEX_REGISTER( ioport, value ) SET_BYTE_REGISTER( ioport, value )
28#define SET_DATA_REGISTER( ioport, value ) SET_BYTE_REGISTER( ioport, value )
29/* GJA -- deleted RTIO and ATRIO case here, so that a PCIO #define became
30 * superfluous.
31 */
32#define SET_INDEXED_REGISTER(RegGroup, Index, Value) \
33 (SET_BYTE_REGISTER(RegGroup, Index), \
34 SET_BYTE_REGISTER((RegGroup) + 1, Value))
35
36/* There is a jumper on the ega to change this to 0x200 instead !! */
37#ifdef HAVE_XORG_CONFIG_H
38#include <xorg-config.h>
39#endif
40
41#if 0 /* This is now a stack variable, as needed */
42#define REGBASE 0x300
43#endif
44
45#define AttributeIndexRegister REGBASE + 0xC0
46#define AttributeDataWriteRegister REGBASE + 0xC0
47#define AttributeDataReadRegister REGBASE + 0xC1
48#define AttributeRegister AttributeIndexRegister
49#define AttributeModeIndex 0x30
50#define OverScanColorIndex 0x31
51#define ColorPlaneEnableIndex 0x32
52#define HorizPelPanIndex 0x33
53#define ColorSelectIndex 0x34
54#ifndef PC98_EGC
55#define SetVideoAttributeIndex( index ) \
56 SET_INDEX_REGISTER( AttributeIndexRegister, index )
57#define SetVideoAttribute( index, value ) \
58 SetVideoAttributeIndex( index ) ; \
59 SET_BYTE_REGISTER( AttributeDataWriteRegister, value )
60#endif
61
62 /* Graphics Registers 03CE & 03CF */
63#define GraphicsIndexRegister REGBASE + 0xCE
64#define GraphicsDataRegister REGBASE + 0xCF
65#define GraphicsRegister GraphicsIndexRegister
66#define Set_ResetIndex 0x00
67#define Enb_Set_ResetIndex 0x01
68#define Color_CompareIndex 0x02
69#define Data_RotateIndex 0x03
70#define Read_Map_SelectIndex 0x04
71#define Graphics_ModeIndex 0x05
72#define MiscellaneousIndex 0x06
73#define Color_Dont_CareIndex 0x07
74#define Bit_MaskIndex 0x08
75#ifndef PC98_EGC
76#define SetVideoGraphicsIndex( index ) \
77 SET_INDEX_REGISTER( GraphicsIndexRegister, index )
78#define SetVideoGraphicsData( value ) \
79 SET_INDEX_REGISTER( GraphicsDataRegister, value )
80#define SetVideoGraphics( index, value ) \
81 SET_INDEXED_REGISTER( GraphicsRegister, index, value )
82#endif
83
84/* Sequencer Registers 03C4 & 03C5 */
85#define SequencerIndexRegister REGBASE + 0xC4
86#define SequencerDataRegister REGBASE + 0xC5
87#define SequencerRegister SequencerIndexRegister
88#define Seq_ResetIndex 00
89#define Clock_ModeIndex 01
90#define Mask_MapIndex 02
91#define Char_Map_SelectIndex 03
92#define Memory_ModeIndex 04
93#ifndef PC98_EGC
94#define SetVideoSequencerIndex( index ) \
95 SET_INDEX_REGISTER( SequencerIndexRegister, index )
96#define SetVideoSequencer( index, value ) \
97 SET_INDEXED_REGISTER( SequencerRegister, index, value )
98#endif
99
100/* BIT CONSTANTS FOR THE VGA/EGA HARDWARE */
101/* for the Graphics' Data_Rotate Register */
102#define VGA_ROTATE_FUNC_SHIFT 3
103#define VGA_COPY_MODE ( 0 << VGA_ROTATE_FUNC_SHIFT ) /* 0x00 */
104#define VGA_AND_MODE ( 1 << VGA_ROTATE_FUNC_SHIFT ) /* 0x08 */
105#define VGA_OR_MODE ( 2 << VGA_ROTATE_FUNC_SHIFT ) /* 0x10 */
106#define VGA_XOR_MODE ( 3 << VGA_ROTATE_FUNC_SHIFT ) /* 0x18 */
107/* for the Graphics' Graphics_Mode Register */
108#define VGA_READ_MODE_SHIFT 3
109#define VGA_WRITE_MODE_0 0
110#define VGA_WRITE_MODE_1 1
111#define VGA_WRITE_MODE_2 2
112#define VGA_WRITE_MODE_3 3
113#define VGA_READ_MODE_0 ( 0 << VGA_READ_MODE_SHIFT )
114#define VGA_READ_MODE_1 ( 1 << VGA_READ_MODE_SHIFT )
115
116#ifdef PC98_EGC
117/* I/O port address define for extended EGC */
118#define EGC_PLANE 0x4a0 /* EGC active plane select */
119#define EGC_READ 0x4a2 /* EGC FGC,EGC,Read Plane */
120#define EGC_MODE 0x4a4 /* EGC Mode register & ROP */
121#define EGC_FGC 0x4a6 /* EGC Forground color */
122#define EGC_MASK 0x4a8 /* EGC Mask register */
123#define EGC_BGC 0x4aa /* EGC Background color */
124#define EGC_ADD 0x4ac /* EGC Dest/Source address */
125#define EGC_LENGTH 0x4ae /* EGC Bit length */
126
127#define PALETTE_ADD 0xa8 /* Palette address */
128#define PALETTE_GRE 0xaa /* Palette Green */
129#define PALETTE_RED 0xac /* Palette Red */
130#define PALETTE_BLU 0xae /* Palette Blue */
131
132#define EGC_AND_MODE 0x2c8c /* (S&P&D)|(~S&D) */
133#define EGC_AND_INV_MODE 0x2c2c /* (S&P&~D)|(~S&D) */
134#define EGC_OR_MODE 0x2cec /* S&(P|D)|(~S&D) */
135#define EGC_OR_INV_MODE 0x2cbc /* S&(P|~D)|(~S&D) */
136#define EGC_XOR_MODE 0x2c6c /* (S&(P&~D|~P&D))|(~S&D) */
137#define EGC_XOR_INV_MODE 0x2c9c /* (S&(P&D)|(~P&~D))|(~S&D) */
138#define EGC_COPY_MODE 0x2cac /* (S&P)|(~S&D) */
139#endif
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