1 | /** @file
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2 | CPU Architectural Protocol as defined in PI spec Volume 2 DXE
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3 |
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4 | This code abstracts the DXE core from processor implementation details.
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5 |
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6 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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7 | SPDX-License-Identifier: BSD-2-Clause-Patent
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8 |
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9 | **/
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10 |
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11 | #ifndef __ARCH_PROTOCOL_CPU_H__
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12 | #define __ARCH_PROTOCOL_CPU_H__
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13 |
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14 | #include <Protocol/DebugSupport.h>
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15 |
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16 | #define EFI_CPU_ARCH_PROTOCOL_GUID \
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17 | { 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
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18 |
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19 | typedef struct _EFI_CPU_ARCH_PROTOCOL EFI_CPU_ARCH_PROTOCOL;
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20 |
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21 | ///
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22 | /// The type of flush operation
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23 | ///
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24 | typedef enum {
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25 | EfiCpuFlushTypeWriteBackInvalidate,
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26 | EfiCpuFlushTypeWriteBack,
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27 | EfiCpuFlushTypeInvalidate,
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28 | EfiCpuMaxFlushType
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29 | } EFI_CPU_FLUSH_TYPE;
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30 |
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31 | ///
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32 | /// The type of processor INIT.
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33 | ///
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34 | typedef enum {
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35 | EfiCpuInit,
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36 | EfiCpuMaxInitType
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37 | } EFI_CPU_INIT_TYPE;
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38 |
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39 | /**
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40 | EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
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41 |
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42 | @param InterruptType Defines the type of interrupt or exception that
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43 | occurred on the processor.This parameter is processor architecture specific.
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44 | @param SystemContext A pointer to the processor context when
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45 | the interrupt occurred on the processor.
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46 |
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47 | @return None
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48 |
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49 | **/
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50 | typedef
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51 | VOID
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52 | (EFIAPI *EFI_CPU_INTERRUPT_HANDLER)(
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53 | IN CONST EFI_EXCEPTION_TYPE InterruptType,
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54 | IN CONST EFI_SYSTEM_CONTEXT SystemContext
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55 | );
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56 |
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57 | /**
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58 | This function flushes the range of addresses from Start to Start+Length
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59 | from the processor's data cache. If Start is not aligned to a cache line
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60 | boundary, then the bytes before Start to the preceding cache line boundary
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61 | are also flushed. If Start+Length is not aligned to a cache line boundary,
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62 | then the bytes past Start+Length to the end of the next cache line boundary
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63 | are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
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64 | supported. If the data cache is fully coherent with all DMA operations, then
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65 | this function can just return EFI_SUCCESS. If the processor does not support
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66 | flushing a range of the data cache, then the entire data cache can be flushed.
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67 |
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68 | @param This The EFI_CPU_ARCH_PROTOCOL instance.
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69 | @param Start The beginning physical address to flush from the processor's data
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70 | cache.
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71 | @param Length The number of bytes to flush from the processor's data cache. This
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72 | function may flush more bytes than Length specifies depending upon
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73 | the granularity of the flush operation that the processor supports.
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74 | @param FlushType Specifies the type of flush operation to perform.
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75 |
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76 | @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
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77 | the processor's data cache.
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78 | @retval EFI_UNSUPPORTED The processor does not support the cache flush type specified
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79 | by FlushType.
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80 | @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
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81 | from the processor's data cache.
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82 |
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83 | **/
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84 | typedef
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85 | EFI_STATUS
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86 | (EFIAPI *EFI_CPU_FLUSH_DATA_CACHE)(
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87 | IN EFI_CPU_ARCH_PROTOCOL *This,
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88 | IN EFI_PHYSICAL_ADDRESS Start,
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89 | IN UINT64 Length,
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90 | IN EFI_CPU_FLUSH_TYPE FlushType
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91 | );
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92 |
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93 | /**
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94 | This function enables interrupt processing by the processor.
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95 |
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96 | @param This The EFI_CPU_ARCH_PROTOCOL instance.
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97 |
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98 | @retval EFI_SUCCESS Interrupts are enabled on the processor.
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99 | @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
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100 |
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101 | **/
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102 | typedef
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103 | EFI_STATUS
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104 | (EFIAPI *EFI_CPU_ENABLE_INTERRUPT)(
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105 | IN EFI_CPU_ARCH_PROTOCOL *This
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106 | );
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107 |
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108 | /**
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109 | This function disables interrupt processing by the processor.
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110 |
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111 | @param This The EFI_CPU_ARCH_PROTOCOL instance.
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112 |
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113 | @retval EFI_SUCCESS Interrupts are disabled on the processor.
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114 | @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
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115 |
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116 | **/
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117 | typedef
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118 | EFI_STATUS
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119 | (EFIAPI *EFI_CPU_DISABLE_INTERRUPT)(
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120 | IN EFI_CPU_ARCH_PROTOCOL *This
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121 | );
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122 |
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123 | /**
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124 | This function retrieves the processor's current interrupt state a returns it in
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125 | State. If interrupts are currently enabled, then TRUE is returned. If interrupts
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126 | are currently disabled, then FALSE is returned.
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127 |
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128 | @param This The EFI_CPU_ARCH_PROTOCOL instance.
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129 | @param State A pointer to the processor's current interrupt state. Set to TRUE if
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130 | interrupts are enabled and FALSE if interrupts are disabled.
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131 |
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132 | @retval EFI_SUCCESS The processor's current interrupt state was returned in State.
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133 | @retval EFI_INVALID_PARAMETER State is NULL.
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134 |
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135 | **/
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136 | typedef
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137 | EFI_STATUS
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138 | (EFIAPI *EFI_CPU_GET_INTERRUPT_STATE)(
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139 | IN EFI_CPU_ARCH_PROTOCOL *This,
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140 | OUT BOOLEAN *State
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141 | );
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142 |
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143 | /**
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144 | This function generates an INIT on the processor. If this function succeeds, then the
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145 | processor will be reset, and control will not be returned to the caller. If InitType is
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146 | not supported by this processor, or the processor cannot programmatically generate an
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147 | INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
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148 | occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
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149 |
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150 | @param This The EFI_CPU_ARCH_PROTOCOL instance.
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151 | @param InitType The type of processor INIT to perform.
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152 |
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153 | @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
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154 | @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
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155 | by this processor.
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156 | @retval EFI_DEVICE_ERROR The processor INIT failed.
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157 |
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158 | **/
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159 | typedef
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160 | EFI_STATUS
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161 | (EFIAPI *EFI_CPU_INIT)(
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162 | IN EFI_CPU_ARCH_PROTOCOL *This,
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163 | IN EFI_CPU_INIT_TYPE InitType
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164 | );
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165 |
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166 | /**
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167 | This function registers and enables the handler specified by InterruptHandler for a processor
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168 | interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
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169 | handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
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170 | The installed handler is called once for each processor interrupt or exception.
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171 |
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172 | @param This The EFI_CPU_ARCH_PROTOCOL instance.
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173 | @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
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174 | are enabled and FALSE if interrupts are disabled.
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175 | @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
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176 | when a processor interrupt occurs. If this parameter is NULL, then the handler
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177 | will be uninstalled.
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178 |
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179 | @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
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180 | @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
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181 | previously installed.
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182 | @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
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183 | previously installed.
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184 | @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
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185 |
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186 | **/
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187 | typedef
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188 | EFI_STATUS
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189 | (EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER)(
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190 | IN EFI_CPU_ARCH_PROTOCOL *This,
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191 | IN EFI_EXCEPTION_TYPE InterruptType,
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192 | IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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193 | );
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194 |
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195 | /**
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196 | This function reads the processor timer specified by TimerIndex and returns it in TimerValue.
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197 |
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198 | @param This The EFI_CPU_ARCH_PROTOCOL instance.
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199 | @param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter
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200 | must be between 0 and NumberOfTimers-1.
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201 | @param TimerValue Pointer to the returned timer value.
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202 | @param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment
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203 | of TimerValue. If TimerValue does not increment at a predictable rate, then 0 is
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204 | returned. This parameter is optional and may be NULL.
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205 |
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206 | @retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue.
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207 | @retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers.
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208 | @retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid.
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209 | @retval EFI_UNSUPPORTED The processor does not have any readable timers.
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210 |
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211 | **/
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212 | typedef
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213 | EFI_STATUS
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214 | (EFIAPI *EFI_CPU_GET_TIMER_VALUE)(
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215 | IN EFI_CPU_ARCH_PROTOCOL *This,
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216 | IN UINT32 TimerIndex,
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217 | OUT UINT64 *TimerValue,
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218 | OUT UINT64 *TimerPeriod OPTIONAL
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219 | );
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220 |
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221 | /**
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222 | This function modifies the attributes for the memory region specified by BaseAddress and
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223 | Length from their current attributes to the attributes specified by Attributes.
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224 |
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225 | @param This The EFI_CPU_ARCH_PROTOCOL instance.
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226 | @param BaseAddress The physical address that is the start address of a memory region.
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227 | @param Length The size in bytes of the memory region.
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228 | @param Attributes The bit mask of attributes to set for the memory region.
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229 |
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230 | @retval EFI_SUCCESS The attributes were set for the memory region.
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231 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
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232 | BaseAddress and Length cannot be modified.
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233 | @retval EFI_INVALID_PARAMETER Length is zero.
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234 | Attributes specified an illegal combination of attributes that
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235 | cannot be set together.
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236 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
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237 | the memory resource range.
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238 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
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239 | resource range specified by BaseAddress and Length.
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240 | The bit mask of attributes is not support for the memory resource
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241 | range specified by BaseAddress and Length.
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242 |
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243 | **/
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244 | typedef
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245 | EFI_STATUS
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246 | (EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)(
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247 | IN EFI_CPU_ARCH_PROTOCOL *This,
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248 | IN EFI_PHYSICAL_ADDRESS BaseAddress,
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249 | IN UINT64 Length,
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250 | IN UINT64 Attributes
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251 | );
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252 |
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253 | ///
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254 | /// The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE
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255 | /// Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt
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256 | /// vectors and exception vectors, reading internal processor timers, resetting the processor, and
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257 | /// determining the processor frequency.
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258 | ///
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259 | struct _EFI_CPU_ARCH_PROTOCOL {
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260 | EFI_CPU_FLUSH_DATA_CACHE FlushDataCache;
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261 | EFI_CPU_ENABLE_INTERRUPT EnableInterrupt;
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262 | EFI_CPU_DISABLE_INTERRUPT DisableInterrupt;
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263 | EFI_CPU_GET_INTERRUPT_STATE GetInterruptState;
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264 | EFI_CPU_INIT Init;
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265 | EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler;
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266 | EFI_CPU_GET_TIMER_VALUE GetTimerValue;
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267 | EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes;
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268 | ///
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269 | /// The number of timers that are available in a processor. The value in this
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270 | /// field is a constant that must not be modified after the CPU Architectural
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271 | /// Protocol is installed. All consumers must treat this as a read-only field.
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272 | ///
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273 | UINT32 NumberOfTimers;
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274 | ///
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275 | /// The size, in bytes, of the alignment required for DMA buffer allocations.
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276 | /// This is typically the size of the largest data cache line in the platform.
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277 | /// The value in this field is a constant that must not be modified after the
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278 | /// CPU Architectural Protocol is installed. All consumers must treat this as
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279 | /// a read-only field.
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280 | ///
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281 | UINT32 DmaBufferAlignment;
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282 | };
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283 |
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284 | extern EFI_GUID gEfiCpuArchProtocolGuid;
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285 |
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286 | #endif
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