1 | /** @file
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2 | I2C Master Protocol as defined in the PI 1.3 specification.
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3 |
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4 | This protocol manipulates the I2C host controller to perform transactions as a master
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5 | on the I2C bus using the current state of any switches or multiplexers in the I2C bus.
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6 |
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7 | Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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8 | SPDX-License-Identifier: BSD-2-Clause-Patent
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9 |
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10 | @par Revision Reference:
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11 | This protocol is from PI Version 1.3.
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12 |
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13 | **/
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14 |
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15 | #ifndef __I2C_MASTER_H__
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16 | #define __I2C_MASTER_H__
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17 |
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18 | #include <Pi/PiI2c.h>
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19 |
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20 | #define EFI_I2C_MASTER_PROTOCOL_GUID { 0xcd72881f, 0x45b5, 0x4feb, { 0x98, 0xc8, 0x31, 0x3d, 0xa8, 0x11, 0x74, 0x62 }}
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21 |
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22 | typedef struct _EFI_I2C_MASTER_PROTOCOL EFI_I2C_MASTER_PROTOCOL;
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23 |
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24 | /**
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25 | Set the frequency for the I2C clock line.
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26 |
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27 | This routine must be called at or below TPL_NOTIFY.
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28 |
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29 | The software and controller do a best case effort of using the specified
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30 | frequency for the I2C bus. If the frequency does not match exactly then
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31 | the I2C master protocol selects the next lower frequency to avoid
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32 | exceeding the operating conditions for any of the I2C devices on the bus.
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33 | For example if 400 KHz was specified and the controller's divide network
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34 | only supports 402 KHz or 398 KHz then the I2C master protocol selects 398
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35 | KHz. If there are not lower frequencies available, then return
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36 | EFI_UNSUPPORTED.
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37 |
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38 | @param[in] This Pointer to an EFI_I2C_MASTER_PROTOCOL structure
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39 | @param[in] BusClockHertz Pointer to the requested I2C bus clock frequency
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40 | in Hertz. Upon return this value contains the
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41 | actual frequency in use by the I2C controller.
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42 |
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43 | @retval EFI_SUCCESS The bus frequency was set successfully.
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44 | @retval EFI_ALREADY_STARTED The controller is busy with another transaction.
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45 | @retval EFI_INVALID_PARAMETER BusClockHertz is NULL
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46 | @retval EFI_UNSUPPORTED The controller does not support this frequency.
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47 |
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48 | **/
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49 | typedef
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50 | EFI_STATUS
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51 | (EFIAPI *EFI_I2C_MASTER_PROTOCOL_SET_BUS_FREQUENCY)(
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52 | IN CONST EFI_I2C_MASTER_PROTOCOL *This,
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53 | IN OUT UINTN *BusClockHertz
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54 | );
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55 |
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56 | /**
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57 | Reset the I2C controller and configure it for use
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58 |
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59 | This routine must be called at or below TPL_NOTIFY.
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60 |
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61 | The I2C controller is reset. The caller must call SetBusFrequench() after
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62 | calling Reset().
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63 |
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64 | @param[in] This Pointer to an EFI_I2C_MASTER_PROTOCOL structure.
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65 |
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66 | @retval EFI_SUCCESS The reset completed successfully.
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67 | @retval EFI_ALREADY_STARTED The controller is busy with another transaction.
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68 | @retval EFI_DEVICE_ERROR The reset operation failed.
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69 |
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70 | **/
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71 | typedef
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72 | EFI_STATUS
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73 | (EFIAPI *EFI_I2C_MASTER_PROTOCOL_RESET)(
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74 | IN CONST EFI_I2C_MASTER_PROTOCOL *This
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75 | );
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76 |
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77 | /**
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78 | Start an I2C transaction on the host controller.
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79 |
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80 | This routine must be called at or below TPL_NOTIFY. For synchronous
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81 | requests this routine must be called at or below TPL_CALLBACK.
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82 |
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83 | This function initiates an I2C transaction on the controller. To
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84 | enable proper error handling by the I2C protocol stack, the I2C
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85 | master protocol does not support queuing but instead only manages
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86 | one I2C transaction at a time. This API requires that the I2C bus
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87 | is in the correct configuration for the I2C transaction.
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88 |
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89 | The transaction is performed by sending a start-bit and selecting the
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90 | I2C device with the specified I2C slave address and then performing
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91 | the specified I2C operations. When multiple operations are requested
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92 | they are separated with a repeated start bit and the slave address.
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93 | The transaction is terminated with a stop bit.
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94 |
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95 | When Event is NULL, StartRequest operates synchronously and returns
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96 | the I2C completion status as its return value.
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97 |
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98 | When Event is not NULL, StartRequest synchronously returns EFI_SUCCESS
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99 | indicating that the I2C transaction was started asynchronously. The
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100 | transaction status value is returned in the buffer pointed to by
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101 | I2cStatus upon the completion of the I2C transaction when I2cStatus
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102 | is not NULL. After the transaction status is returned the Event is
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103 | signaled.
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104 |
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105 | Note: The typical consumer of this API is the I2C host protocol.
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106 | Extreme care must be taken by other consumers of this API to prevent
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107 | confusing the third party I2C drivers due to a state change at the
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108 | I2C device which the third party I2C drivers did not initiate. I2C
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109 | platform specific code may use this API within these guidelines.
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110 |
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111 | @param[in] This Pointer to an EFI_I2C_MASTER_PROTOCOL structure.
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112 | @param[in] SlaveAddress Address of the device on the I2C bus. Set the
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113 | I2C_ADDRESSING_10_BIT when using 10-bit addresses,
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114 | clear this bit for 7-bit addressing. Bits 0-6
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115 | are used for 7-bit I2C slave addresses and bits
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116 | 0-9 are used for 10-bit I2C slave addresses.
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117 | @param[in] RequestPacket Pointer to an EFI_I2C_REQUEST_PACKET
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118 | structure describing the I2C transaction.
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119 | @param[in] Event Event to signal for asynchronous transactions,
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120 | NULL for asynchronous transactions
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121 | @param[out] I2cStatus Optional buffer to receive the I2C transaction
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122 | completion status
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123 |
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124 | @retval EFI_SUCCESS The asynchronous transaction was successfully
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125 | started when Event is not NULL.
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126 | @retval EFI_SUCCESS The transaction completed successfully when
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127 | Event is NULL.
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128 | @retval EFI_ALREADY_STARTED The controller is busy with another transaction.
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129 | @retval EFI_BAD_BUFFER_SIZE The RequestPacket->LengthInBytes value is too
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130 | large.
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131 | @retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the
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132 | transaction.
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133 | @retval EFI_INVALID_PARAMETER RequestPacket is NULL
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134 | @retval EFI_NOT_FOUND Reserved bit set in the SlaveAddress parameter
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135 | @retval EFI_NO_RESPONSE The I2C device is not responding to the slave
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136 | address. EFI_DEVICE_ERROR will be returned if
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137 | the controller cannot distinguish when the NACK
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138 | occurred.
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139 | @retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C transaction
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140 | @retval EFI_UNSUPPORTED The controller does not support the requested
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141 | transaction.
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142 |
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143 | **/
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144 | typedef
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145 | EFI_STATUS
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146 | (EFIAPI *EFI_I2C_MASTER_PROTOCOL_START_REQUEST)(
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147 | IN CONST EFI_I2C_MASTER_PROTOCOL *This,
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148 | IN UINTN SlaveAddress,
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149 | IN EFI_I2C_REQUEST_PACKET *RequestPacket,
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150 | IN EFI_EVENT Event OPTIONAL,
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151 | OUT EFI_STATUS *I2cStatus OPTIONAL
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152 | );
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153 |
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154 | ///
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155 | /// I2C master mode protocol
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156 | ///
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157 | /// This protocol manipulates the I2C host controller to perform transactions as a
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158 | /// master on the I2C bus using the current state of any switches or multiplexers
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159 | /// in the I2C bus.
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160 | ///
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161 | struct _EFI_I2C_MASTER_PROTOCOL {
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162 | ///
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163 | /// Set the clock frequency for the I2C bus.
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164 | ///
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165 | EFI_I2C_MASTER_PROTOCOL_SET_BUS_FREQUENCY SetBusFrequency;
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166 |
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167 | ///
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168 | /// Reset the I2C host controller.
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169 | ///
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170 | EFI_I2C_MASTER_PROTOCOL_RESET Reset;
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171 |
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172 | ///
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173 | /// Start an I2C transaction in master mode on the host controller.
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174 | ///
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175 | EFI_I2C_MASTER_PROTOCOL_START_REQUEST StartRequest;
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176 |
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177 | ///
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178 | /// Pointer to an EFI_I2C_CONTROLLER_CAPABILITIES data structure containing
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179 | /// the capabilities of the I2C host controller.
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180 | ///
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181 | CONST EFI_I2C_CONTROLLER_CAPABILITIES *I2cControllerCapabilities;
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182 | };
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183 |
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184 | extern EFI_GUID gEfiI2cMasterProtocolGuid;
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185 |
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186 | #endif // __I2C_MASTER_H__
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