1 | /** @file
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2 | MM CPU I/O 2 protocol as defined in the PI 1.5 specification.
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3 |
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4 | This protocol provides CPU I/O and memory access within MM.
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5 |
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6 | Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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7 | SPDX-License-Identifier: BSD-2-Clause-Patent
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8 |
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9 | **/
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10 |
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11 | #ifndef _MM_CPU_IO_H_
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12 | #define _MM_CPU_IO_H_
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13 |
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14 | #define EFI_MM_CPU_IO_PROTOCOL_GUID \
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15 | { \
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16 | 0x3242A9D8, 0xCE70, 0x4AA0, { 0x95, 0x5D, 0x5E, 0x7B, 0x14, 0x0D, 0xE4, 0xD2 } \
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17 | }
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18 |
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19 | typedef struct _EFI_MM_CPU_IO_PROTOCOL EFI_MM_CPU_IO_PROTOCOL;
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20 |
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21 | ///
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22 | /// Width of the MM CPU I/O operations
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23 | ///
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24 | typedef enum {
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25 | MM_IO_UINT8 = 0,
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26 | MM_IO_UINT16 = 1,
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27 | MM_IO_UINT32 = 2,
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28 | MM_IO_UINT64 = 3
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29 | } EFI_MM_IO_WIDTH;
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30 |
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31 | /**
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32 | Provides the basic memory and I/O interfaces used toabstract accesses to devices.
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33 |
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34 | The I/O operations are carried out exactly as requested. The caller is
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35 | responsible for any alignment and I/O width issues that the bus, device,
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36 | platform, or type of I/O might require.
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37 |
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38 | @param[in] This The EFI_MM_CPU_IO_PROTOCOL instance.
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39 | @param[in] Width Signifies the width of the I/O operations.
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40 | @param[in] Address The base address of the I/O operations. The caller is
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41 | responsible for aligning the Address if required.
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42 | @param[in] Count The number of I/O operations to perform.
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43 | @param[in,out] Buffer For read operations, the destination buffer to store
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44 | the results. For write operations, the source buffer
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45 | from which to write data.
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46 |
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47 | @retval EFI_SUCCESS The data was read from or written to the device.
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48 | @retval EFI_UNSUPPORTED The Address is not valid for this system.
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49 | @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
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50 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack
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51 | of resources.
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52 | **/
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53 | typedef
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54 | EFI_STATUS
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55 | (EFIAPI *EFI_MM_CPU_IO)(
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56 | IN CONST EFI_MM_CPU_IO_PROTOCOL *This,
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57 | IN EFI_MM_IO_WIDTH Width,
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58 | IN UINT64 Address,
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59 | IN UINTN Count,
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60 | IN OUT VOID *Buffer
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61 | );
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62 |
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63 | typedef struct {
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64 | ///
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65 | /// This service provides the various modalities of memory and I/O read.
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66 | ///
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67 | EFI_MM_CPU_IO Read;
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68 | ///
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69 | /// This service provides the various modalities of memory and I/O write.
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70 | ///
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71 | EFI_MM_CPU_IO Write;
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72 | } EFI_MM_IO_ACCESS;
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73 |
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74 | ///
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75 | /// MM CPU I/O Protocol provides CPU I/O and memory access within MM.
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76 | ///
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77 | struct _EFI_MM_CPU_IO_PROTOCOL {
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78 | ///
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79 | /// Allows reads and writes to memory-mapped I/O space.
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80 | ///
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81 | EFI_MM_IO_ACCESS Mem;
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82 | ///
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83 | /// Allows reads and writes to I/O space.
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84 | ///
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85 | EFI_MM_IO_ACCESS Io;
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86 | };
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87 |
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88 | extern EFI_GUID gEfiMmCpuIoProtocolGuid;
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89 |
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90 | #endif
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