| 1 | /** @file
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| 2 | PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.
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| 3 |
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| 4 | PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
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| 5 | and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
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| 6 | defferent types of bus mastering DMA.
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| 7 |
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| 8 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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| 9 | SPDX-License-Identifier: BSD-2-Clause-Patent
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| 10 |
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| 11 | **/
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| 12 |
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| 13 | #ifndef __PCI_ROOT_BRIDGE_IO_H__
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| 14 | #define __PCI_ROOT_BRIDGE_IO_H__
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| 15 |
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| 16 | #include <Library/BaseLib.h>
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| 17 |
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| 18 | #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
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| 19 | { \
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| 20 | 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
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| 21 | }
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| 22 |
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| 23 | typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;
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| 24 |
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| 25 | ///
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| 26 | /// *******************************************************
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| 27 | /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
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| 28 | /// *******************************************************
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| 29 | ///
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| 30 | typedef enum {
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| 31 | EfiPciWidthUint8,
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| 32 | EfiPciWidthUint16,
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| 33 | EfiPciWidthUint32,
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| 34 | EfiPciWidthUint64,
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| 35 | EfiPciWidthFifoUint8,
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| 36 | EfiPciWidthFifoUint16,
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| 37 | EfiPciWidthFifoUint32,
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| 38 | EfiPciWidthFifoUint64,
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| 39 | EfiPciWidthFillUint8,
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| 40 | EfiPciWidthFillUint16,
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| 41 | EfiPciWidthFillUint32,
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| 42 | EfiPciWidthFillUint64,
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| 43 | EfiPciWidthMaximum
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| 44 | } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;
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| 45 |
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| 46 | ///
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| 47 | /// *******************************************************
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| 48 | /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
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| 49 | /// *******************************************************
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| 50 | ///
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| 51 | typedef enum {
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| 52 | ///
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| 53 | /// A read operation from system memory by a bus master that is not capable of producing
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| 54 | /// PCI dual address cycles.
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| 55 | ///
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| 56 | EfiPciOperationBusMasterRead,
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| 57 | ///
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| 58 | /// A write operation from system memory by a bus master that is not capable of producing
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| 59 | /// PCI dual address cycles.
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| 60 | ///
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| 61 | EfiPciOperationBusMasterWrite,
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| 62 | ///
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| 63 | /// Provides both read and write access to system memory by both the processor and a bus
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| 64 | /// master that is not capable of producing PCI dual address cycles.
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| 65 | ///
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| 66 | EfiPciOperationBusMasterCommonBuffer,
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| 67 | ///
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| 68 | /// A read operation from system memory by a bus master that is capable of producing PCI
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| 69 | /// dual address cycles.
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| 70 | ///
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| 71 | EfiPciOperationBusMasterRead64,
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| 72 | ///
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| 73 | /// A write operation to system memory by a bus master that is capable of producing PCI
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| 74 | /// dual address cycles.
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| 75 | ///
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| 76 | EfiPciOperationBusMasterWrite64,
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| 77 | ///
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| 78 | /// Provides both read and write access to system memory by both the processor and a bus
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| 79 | /// master that is capable of producing PCI dual address cycles.
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| 80 | ///
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| 81 | EfiPciOperationBusMasterCommonBuffer64,
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| 82 | EfiPciOperationMaximum
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| 83 | } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;
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| 84 |
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| 85 | #define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
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| 86 | #define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002
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| 87 | #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004
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| 88 | #define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008
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| 89 | #define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010
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| 90 | #define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
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| 91 | #define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
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| 92 | #define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
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| 93 | #define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
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| 94 | #define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
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| 95 | #define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
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| 96 | #define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000
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| 97 | #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000
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| 98 | #define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000
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| 99 |
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| 100 | #define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
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| 101 |
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| 102 | #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
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| 103 |
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| 104 | #if defined(__GNUC__) && defined(VBOX) /* VBox: work around: warning: comparison is always false due to limited range of data type */
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| 105 | #define EFI_PCI_ADDRESS(bus, dev, func, reg) \
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| 106 | (UINT64) ( \
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| 107 | (((UINTN) bus) << 24) | \
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| 108 | (((UINTN) dev) << 16) | \
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| 109 | (((UINTN) func) << 8) | \
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| 110 | ((512U + (UINTN) (reg)) < (256U + 512U) ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
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| 111 | #else
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| 112 | #define EFI_PCI_ADDRESS(bus, dev, func, reg) \
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| 113 | (UINT64) ( \
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| 114 | (((UINTN) bus) << 24) | \
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| 115 | (((UINTN) dev) << 16) | \
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| 116 | (((UINTN) func) << 8) | \
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| 117 | (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
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| 118 | #endif
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| 119 |
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| 120 | typedef struct {
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| 121 | UINT8 Register;
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| 122 | UINT8 Function;
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| 123 | UINT8 Device;
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| 124 | UINT8 Bus;
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| 125 | UINT32 ExtendedRegister;
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| 126 | } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;
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| 127 |
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| 128 | /**
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| 129 | Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
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| 130 | satisfied or after a defined duration.
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| 131 |
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| 132 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 133 | @param Width Signifies the width of the memory or I/O operations.
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| 134 | @param Address The base address of the memory or I/O operations.
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| 135 | @param Mask Mask used for the polling criteria.
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| 136 | @param Value The comparison value used for the polling exit criteria.
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| 137 | @param Delay The number of 100 ns units to poll.
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| 138 | @param Result Pointer to the last value read from the memory location.
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| 139 |
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| 140 | @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
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| 141 | @retval EFI_TIMEOUT Delay expired before a match occurred.
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| 142 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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| 143 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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| 144 |
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| 145 | **/
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| 146 | typedef
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| 147 | EFI_STATUS
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| 148 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)(
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| 149 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 150 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
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| 151 | IN UINT64 Address,
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| 152 | IN UINT64 Mask,
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| 153 | IN UINT64 Value,
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| 154 | IN UINT64 Delay,
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| 155 | OUT UINT64 *Result
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| 156 | );
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| 157 |
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| 158 | /**
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| 159 | Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
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| 160 |
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| 161 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 162 | @param Width Signifies the width of the memory operations.
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| 163 | @param Address The base address of the memory operations.
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| 164 | @param Count The number of memory operations to perform.
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| 165 | @param Buffer For read operations, the destination buffer to store the results. For write
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| 166 | operations, the source buffer to write data from.
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| 167 |
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| 168 | @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
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| 169 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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| 170 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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| 171 |
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| 172 | **/
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| 173 | typedef
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| 174 | EFI_STATUS
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| 175 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)(
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| 176 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 177 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
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| 178 | IN UINT64 Address,
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| 179 | IN UINTN Count,
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| 180 | IN OUT VOID *Buffer
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| 181 | );
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| 182 |
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| 183 | typedef struct {
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| 184 | ///
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| 185 | /// Read PCI controller registers in the PCI root bridge memory space.
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| 186 | ///
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| 187 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;
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| 188 | ///
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| 189 | /// Write PCI controller registers in the PCI root bridge memory space.
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| 190 | ///
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| 191 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;
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| 192 | } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;
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| 193 |
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| 194 | /**
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| 195 | Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI
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| 196 | root bridge memory space.
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| 197 |
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| 198 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.
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| 199 | @param Width Signifies the width of the memory operations.
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| 200 | @param DestAddress The destination address of the memory operation.
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| 201 | @param SrcAddress The source address of the memory operation.
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| 202 | @param Count The number of memory operations to perform.
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| 203 |
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| 204 | @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
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| 205 | @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
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| 206 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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| 207 |
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| 208 | **/
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| 209 | typedef
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| 210 | EFI_STATUS
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| 211 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)(
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| 212 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 213 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
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| 214 | IN UINT64 DestAddress,
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| 215 | IN UINT64 SrcAddress,
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| 216 | IN UINTN Count
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| 217 | );
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| 218 |
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| 219 | /**
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| 220 | Provides the PCI controller-specific addresses required to access system memory from a
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| 221 | DMA bus master.
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| 222 |
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| 223 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 224 | @param Operation Indicates if the bus master is going to read or write to system memory.
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| 225 | @param HostAddress The system memory address to map to the PCI controller.
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| 226 | @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
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| 227 | that were mapped.
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| 228 | @param DeviceAddress The resulting map address for the bus master PCI controller to use to
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| 229 | access the hosts HostAddress.
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| 230 | @param Mapping A resulting value to pass to Unmap().
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| 231 |
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| 232 | @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
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| 233 | @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
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| 234 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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| 235 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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| 236 | @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
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| 237 |
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| 238 | **/
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| 239 | typedef
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| 240 | EFI_STATUS
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| 241 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)(
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| 242 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 243 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,
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| 244 | IN VOID *HostAddress,
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| 245 | IN OUT UINTN *NumberOfBytes,
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| 246 | OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
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| 247 | OUT VOID **Mapping
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| 248 | );
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| 249 |
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| 250 | /**
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| 251 | Completes the Map() operation and releases any corresponding resources.
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| 252 |
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| 253 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 254 | @param Mapping The mapping value returned from Map().
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| 255 |
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| 256 | @retval EFI_SUCCESS The range was unmapped.
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| 257 | @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
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| 258 | @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
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| 259 |
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| 260 | **/
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| 261 | typedef
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| 262 | EFI_STATUS
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| 263 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)(
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| 264 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 265 | IN VOID *Mapping
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| 266 | );
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| 267 |
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| 268 | /**
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| 269 | Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
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| 270 | EfiPciOperationBusMasterCommonBuffer64 mapping.
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| 271 |
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| 272 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 273 | @param Type This parameter is not used and must be ignored.
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| 274 | @param MemoryType The type of memory to allocate, EfiBootServicesData or
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| 275 | EfiRuntimeServicesData.
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| 276 | @param Pages The number of pages to allocate.
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| 277 | @param HostAddress A pointer to store the base system memory address of the
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| 278 | allocated range.
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| 279 | @param Attributes The requested bit mask of attributes for the allocated range.
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| 280 |
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| 281 | @retval EFI_SUCCESS The requested memory pages were allocated.
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| 282 | @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
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| 283 | MEMORY_WRITE_COMBINE and MEMORY_CACHED.
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| 284 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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| 285 | @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
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| 286 |
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| 287 | **/
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| 288 | typedef
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| 289 | EFI_STATUS
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| 290 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)(
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| 291 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 292 | IN EFI_ALLOCATE_TYPE Type,
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| 293 | IN EFI_MEMORY_TYPE MemoryType,
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| 294 | IN UINTN Pages,
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| 295 | IN OUT VOID **HostAddress,
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| 296 | IN UINT64 Attributes
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| 297 | );
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| 298 |
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| 299 | /**
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| 300 | Frees memory that was allocated with AllocateBuffer().
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| 301 |
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| 302 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 303 | @param Pages The number of pages to free.
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| 304 | @param HostAddress The base system memory address of the allocated range.
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| 305 |
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| 306 | @retval EFI_SUCCESS The requested memory pages were freed.
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| 307 | @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
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| 308 | was not allocated with AllocateBuffer().
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| 309 |
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| 310 | **/
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| 311 | typedef
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| 312 | EFI_STATUS
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| 313 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)(
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| 314 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 315 | IN UINTN Pages,
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| 316 | IN VOID *HostAddress
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| 317 | );
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| 318 |
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| 319 | /**
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| 320 | Flushes all PCI posted write transactions from a PCI host bridge to system memory.
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| 321 |
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| 322 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 323 |
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| 324 | @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
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| 325 | bridge to system memory.
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| 326 | @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
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| 327 | host bridge due to a hardware error.
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| 328 |
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| 329 | **/
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| 330 | typedef
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| 331 | EFI_STATUS
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| 332 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)(
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| 333 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This
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| 334 | );
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| 335 |
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| 336 | /**
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| 337 | Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
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| 338 | attributes that a PCI root bridge is currently using.
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| 339 |
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| 340 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 341 | @param Supports A pointer to the mask of attributes that this PCI root bridge supports
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| 342 | setting with SetAttributes().
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| 343 | @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently
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| 344 | using.
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| 345 |
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| 346 | @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root
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| 347 | bridge supports is returned in Supports. If Attributes is
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| 348 | not NULL, then the attributes that the PCI root bridge is currently
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| 349 | using is returned in Attributes.
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| 350 | @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
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| 351 |
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| 352 |
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| 353 | **/
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| 354 | typedef
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| 355 | EFI_STATUS
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| 356 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)(
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| 357 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 358 | OUT UINT64 *Supports,
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| 359 | OUT UINT64 *Attributes
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| 360 | );
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| 361 |
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| 362 | /**
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| 363 | Sets attributes for a resource range on a PCI root bridge.
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| 364 |
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| 365 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 366 | @param Attributes The mask of attributes to set.
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| 367 | @param ResourceBase A pointer to the base address of the resource range to be modified by the
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| 368 | attributes specified by Attributes.
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| 369 | @param ResourceLength A pointer to the length of the resource range to be modified by the
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| 370 | attributes specified by Attributes.
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| 371 |
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| 372 | @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
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| 373 | range specified by ResourceBase and ResourceLength
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| 374 | were set on the PCI root bridge, and the actual resource range is
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| 375 | returned in ResuourceBase and ResourceLength.
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| 376 | @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root
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| 377 | Bridge.
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| 378 | @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
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| 379 | resource range specified by BaseAddress and Length.
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| 380 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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| 381 |
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| 382 | **/
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| 383 | typedef
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| 384 | EFI_STATUS
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| 385 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)(
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| 386 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 387 | IN UINT64 Attributes,
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| 388 | IN OUT UINT64 *ResourceBase,
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| 389 | IN OUT UINT64 *ResourceLength
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| 390 | );
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| 391 |
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| 392 | /**
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| 393 | Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI
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| 394 | resource descriptors.
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| 395 |
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| 396 | @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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| 397 | @param Resources A pointer to the resource descriptors that describe the current
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| 398 | configuration of this PCI root bridge.
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| 399 |
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| 400 | @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in
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| 401 | Resources.
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| 402 | @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be
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| 403 | retrieved.
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| 404 |
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| 405 | **/
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| 406 | typedef
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| 407 | EFI_STATUS
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| 408 | (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)(
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| 409 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
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| 410 | OUT VOID **Resources
|
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| 411 | );
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| 412 |
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| 413 | ///
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| 414 | /// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are
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| 415 | /// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller.
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| 416 | ///
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| 417 | struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {
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| 418 | ///
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| 419 | /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
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| 420 | ///
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| 421 | EFI_HANDLE ParentHandle;
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| 422 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem;
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| 423 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo;
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| 424 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem;
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| 425 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io;
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| 426 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci;
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| 427 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem;
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| 428 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map;
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| 429 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap;
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|---|
| 430 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
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|---|
| 431 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
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|---|
| 432 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush;
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| 433 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes;
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|---|
| 434 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes;
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|---|
| 435 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration;
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|---|
| 436 |
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|---|
| 437 | ///
|
|---|
| 438 | /// The segment number that this PCI root bridge resides.
|
|---|
| 439 | ///
|
|---|
| 440 | UINT32 SegmentNumber;
|
|---|
| 441 | };
|
|---|
| 442 |
|
|---|
| 443 | extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;
|
|---|
| 444 |
|
|---|
| 445 | #endif
|
|---|
