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source: vbox/trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Protocol/PciRootBridgeIo.h@ 62180

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1/** @file
2 PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.
3
4 PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
5 and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
6 defferent types of bus mastering DMA.
7
8 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
9 This program and the accompanying materials
10 are licensed and made available under the terms and conditions of the BSD License
11 which accompanies this distribution. The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php
13
14 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
15 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16
17**/
18
19#ifndef __PCI_ROOT_BRIDGE_IO_H__
20#define __PCI_ROOT_BRIDGE_IO_H__
21
22#include <Library/BaseLib.h>
23
24#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
25 { \
26 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
27 }
28
29typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;
30
31///
32/// *******************************************************
33/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
34/// *******************************************************
35///
36typedef enum {
37 EfiPciWidthUint8,
38 EfiPciWidthUint16,
39 EfiPciWidthUint32,
40 EfiPciWidthUint64,
41 EfiPciWidthFifoUint8,
42 EfiPciWidthFifoUint16,
43 EfiPciWidthFifoUint32,
44 EfiPciWidthFifoUint64,
45 EfiPciWidthFillUint8,
46 EfiPciWidthFillUint16,
47 EfiPciWidthFillUint32,
48 EfiPciWidthFillUint64,
49 EfiPciWidthMaximum
50} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;
51
52///
53/// *******************************************************
54/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
55/// *******************************************************
56///
57typedef enum {
58 ///
59 /// A read operation from system memory by a bus master that is not capable of producing
60 /// PCI dual address cycles.
61 ///
62 EfiPciOperationBusMasterRead,
63 ///
64 /// A write operation from system memory by a bus master that is not capable of producing
65 /// PCI dual address cycles.
66 ///
67 EfiPciOperationBusMasterWrite,
68 ///
69 /// Provides both read and write access to system memory by both the processor and a bus
70 /// master that is not capable of producing PCI dual address cycles.
71 ///
72 EfiPciOperationBusMasterCommonBuffer,
73 ///
74 /// A read operation from system memory by a bus master that is capable of producing PCI
75 /// dual address cycles.
76 ///
77 EfiPciOperationBusMasterRead64,
78 ///
79 /// A write operation to system memory by a bus master that is capable of producing PCI
80 /// dual address cycles.
81 ///
82 EfiPciOperationBusMasterWrite64,
83 ///
84 /// Provides both read and write access to system memory by both the processor and a bus
85 /// master that is capable of producing PCI dual address cycles.
86 ///
87 EfiPciOperationBusMasterCommonBuffer64,
88 EfiPciOperationMaximum
89} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;
90
91#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
92#define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002
93#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004
94#define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008
95#define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010
96#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
97#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
98#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
99#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
100#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
101#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
102#define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000
103#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000
104#define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000
105
106#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
107
108#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
109
110#if defined(__GNUC__) && defined(VBOX) /* VBox: work around: warning: comparison is always false due to limited range of data type */
111#define EFI_PCI_ADDRESS(bus, dev, func, reg) \
112 (UINT64) ( \
113 (((UINTN) bus) << 24) | \
114 (((UINTN) dev) << 16) | \
115 (((UINTN) func) << 8) | \
116 ((512U + (UINTN) (reg)) < (256U + 512U) ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
117#else
118#define EFI_PCI_ADDRESS(bus, dev, func, reg) \
119 (UINT64) ( \
120 (((UINTN) bus) << 24) | \
121 (((UINTN) dev) << 16) | \
122 (((UINTN) func) << 8) | \
123 (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
124#endif
125
126typedef struct {
127 UINT8 Register;
128 UINT8 Function;
129 UINT8 Device;
130 UINT8 Bus;
131 UINT32 ExtendedRegister;
132} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;
133
134/**
135 Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
136 satisfied or after a defined duration.
137
138 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
139 @param Width Signifies the width of the memory or I/O operations.
140 @param Address The base address of the memory or I/O operations.
141 @param Mask Mask used for the polling criteria.
142 @param Value The comparison value used for the polling exit criteria.
143 @param Delay The number of 100 ns units to poll.
144 @param Result Pointer to the last value read from the memory location.
145
146 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
147 @retval EFI_TIMEOUT Delay expired before a match occurred.
148 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
149 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
150
151**/
152typedef
153EFI_STATUS
154(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)(
155 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
156 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
157 IN UINT64 Address,
158 IN UINT64 Mask,
159 IN UINT64 Value,
160 IN UINT64 Delay,
161 OUT UINT64 *Result
162 );
163
164/**
165 Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
166
167 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
168 @param Width Signifies the width of the memory operations.
169 @param Address The base address of the memory operations.
170 @param Count The number of memory operations to perform.
171 @param Buffer For read operations, the destination buffer to store the results. For write
172 operations, the source buffer to write data from.
173
174 @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
175 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
176 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
177
178**/
179typedef
180EFI_STATUS
181(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)(
182 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
183 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
184 IN UINT64 Address,
185 IN UINTN Count,
186 IN OUT VOID *Buffer
187 );
188
189typedef struct {
190 ///
191 /// Read PCI controller registers in the PCI root bridge memory space.
192 ///
193 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;
194 ///
195 /// Write PCI controller registers in the PCI root bridge memory space.
196 ///
197 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;
198} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;
199
200/**
201 Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI
202 root bridge memory space.
203
204 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.
205 @param Width Signifies the width of the memory operations.
206 @param DestAddress The destination address of the memory operation.
207 @param SrcAddress The source address of the memory operation.
208 @param Count The number of memory operations to perform.
209
210 @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
211 @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
212 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
213
214**/
215typedef
216EFI_STATUS
217(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)(
218 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
219 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
220 IN UINT64 DestAddress,
221 IN UINT64 SrcAddress,
222 IN UINTN Count
223 );
224
225/**
226 Provides the PCI controller-specific addresses required to access system memory from a
227 DMA bus master.
228
229 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
230 @param Operation Indicates if the bus master is going to read or write to system memory.
231 @param HostAddress The system memory address to map to the PCI controller.
232 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
233 that were mapped.
234 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
235 access the hosts HostAddress.
236 @param Mapping A resulting value to pass to Unmap().
237
238 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
239 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
240 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
241 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
242 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
243
244**/
245typedef
246EFI_STATUS
247(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)(
248 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
249 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,
250 IN VOID *HostAddress,
251 IN OUT UINTN *NumberOfBytes,
252 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
253 OUT VOID **Mapping
254 );
255
256/**
257 Completes the Map() operation and releases any corresponding resources.
258
259 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
260 @param Mapping The mapping value returned from Map().
261
262 @retval EFI_SUCCESS The range was unmapped.
263 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
264 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
265
266**/
267typedef
268EFI_STATUS
269(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)(
270 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
271 IN VOID *Mapping
272 );
273
274/**
275 Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
276 EfiPciOperationBusMasterCommonBuffer64 mapping.
277
278 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
279 @param Type This parameter is not used and must be ignored.
280 @param MemoryType The type of memory to allocate, EfiBootServicesData or
281 EfiRuntimeServicesData.
282 @param Pages The number of pages to allocate.
283 @param HostAddress A pointer to store the base system memory address of the
284 allocated range.
285 @param Attributes The requested bit mask of attributes for the allocated range.
286
287 @retval EFI_SUCCESS The requested memory pages were allocated.
288 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
289 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
290 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
291 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
292
293**/
294typedef
295EFI_STATUS
296(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)(
297 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
298 IN EFI_ALLOCATE_TYPE Type,
299 IN EFI_MEMORY_TYPE MemoryType,
300 IN UINTN Pages,
301 IN OUT VOID **HostAddress,
302 IN UINT64 Attributes
303 );
304
305/**
306 Frees memory that was allocated with AllocateBuffer().
307
308 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
309 @param Pages The number of pages to free.
310 @param HostAddress The base system memory address of the allocated range.
311
312 @retval EFI_SUCCESS The requested memory pages were freed.
313 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
314 was not allocated with AllocateBuffer().
315
316**/
317typedef
318EFI_STATUS
319(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)(
320 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
321 IN UINTN Pages,
322 IN VOID *HostAddress
323 );
324
325/**
326 Flushes all PCI posted write transactions from a PCI host bridge to system memory.
327
328 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
329
330 @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
331 bridge to system memory.
332 @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
333 host bridge due to a hardware error.
334
335**/
336typedef
337EFI_STATUS
338(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)(
339 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This
340 );
341
342/**
343 Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
344 attributes that a PCI root bridge is currently using.
345
346 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
347 @param Supports A pointer to the mask of attributes that this PCI root bridge supports
348 setting with SetAttributes().
349 @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently
350 using.
351
352 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root
353 bridge supports is returned in Supports. If Attributes is
354 not NULL, then the attributes that the PCI root bridge is currently
355 using is returned in Attributes.
356 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
357
358
359**/
360typedef
361EFI_STATUS
362(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)(
363 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
364 OUT UINT64 *Supports,
365 OUT UINT64 *Attributes
366 );
367
368/**
369 Sets attributes for a resource range on a PCI root bridge.
370
371 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
372 @param Attributes The mask of attributes to set.
373 @param ResourceBase A pointer to the base address of the resource range to be modified by the
374 attributes specified by Attributes.
375 @param ResourceLength A pointer to the length of the resource range to be modified by the
376 attributes specified by Attributes.
377
378 @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
379 range specified by ResourceBase and ResourceLength
380 were set on the PCI root bridge, and the actual resource range is
381 returned in ResuourceBase and ResourceLength.
382 @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root
383 Bridge.
384 @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
385 resource range specified by BaseAddress and Length.
386 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
387
388**/
389typedef
390EFI_STATUS
391(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)(
392 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
393 IN UINT64 Attributes,
394 IN OUT UINT64 *ResourceBase,
395 IN OUT UINT64 *ResourceLength
396 );
397
398/**
399 Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0
400 resource descriptors.
401
402 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
403 @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
404 configuration of this PCI root bridge.
405
406 @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in
407 Resources.
408 @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be
409 retrieved.
410
411**/
412typedef
413EFI_STATUS
414(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)(
415 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
416 OUT VOID **Resources
417 );
418
419///
420/// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are
421/// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller.
422///
423struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {
424 ///
425 /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
426 ///
427 EFI_HANDLE ParentHandle;
428 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem;
429 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo;
430 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem;
431 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io;
432 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci;
433 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem;
434 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map;
435 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap;
436 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
437 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
438 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush;
439 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes;
440 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes;
441 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration;
442
443 ///
444 /// The segment number that this PCI root bridge resides.
445 ///
446 UINT32 SegmentNumber;
447};
448
449extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;
450
451#endif
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