| 1 | /** @file
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| 2 | EFI SMM CPU Protocol as defined in the PI 1.2 specification.
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| 3 |
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| 4 | This protocol allows SMM drivers to access architecture-standard registers from any of the CPU
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| 5 | save state areas. In some cases, difference processors provide the same information in the save state,
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| 6 | but not in the same format. These so-called pseudo-registers provide this information in a standard
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| 7 | format.
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| 8 |
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| 9 | Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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| 10 | SPDX-License-Identifier: BSD-2-Clause-Patent
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| 11 |
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| 12 | **/
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| 13 |
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| 14 | #ifndef _SMM_CPU_H_
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| 15 | #define _SMM_CPU_H_
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| 16 |
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| 17 | #include <Protocol/MmCpu.h>
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| 18 |
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| 19 | #define EFI_SMM_CPU_PROTOCOL_GUID EFI_MM_CPU_PROTOCOL_GUID
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| 20 |
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| 21 | #define EFI_SMM_SAVE_STATE_REGISTER_GDTBASE EFI_MM_SAVE_STATE_REGISTER_GDTBASE
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| 22 | #define EFI_SMM_SAVE_STATE_REGISTER_IDTBASE EFI_MM_SAVE_STATE_REGISTER_IDTBASE
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| 23 | #define EFI_SMM_SAVE_STATE_REGISTER_LDTBASE EFI_MM_SAVE_STATE_REGISTER_LDTBASE
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| 24 | #define EFI_SMM_SAVE_STATE_REGISTER_GDTLIMIT EFI_MM_SAVE_STATE_REGISTER_GDTLIMIT
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| 25 | #define EFI_SMM_SAVE_STATE_REGISTER_IDTLIMIT EFI_MM_SAVE_STATE_REGISTER_IDTLIMIT
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| 26 | #define EFI_SMM_SAVE_STATE_REGISTER_LDTLIMIT EFI_MM_SAVE_STATE_REGISTER_LDTLIMIT
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| 27 | #define EFI_SMM_SAVE_STATE_REGISTER_LDTINFO EFI_MM_SAVE_STATE_REGISTER_LDTINFO
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| 28 | #define EFI_SMM_SAVE_STATE_REGISTER_ES EFI_MM_SAVE_STATE_REGISTER_ES
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| 29 | #define EFI_SMM_SAVE_STATE_REGISTER_CS EFI_MM_SAVE_STATE_REGISTER_CS
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| 30 | #define EFI_SMM_SAVE_STATE_REGISTER_SS EFI_MM_SAVE_STATE_REGISTER_SS
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| 31 | #define EFI_SMM_SAVE_STATE_REGISTER_DS EFI_MM_SAVE_STATE_REGISTER_DS
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| 32 | #define EFI_SMM_SAVE_STATE_REGISTER_FS EFI_MM_SAVE_STATE_REGISTER_FS
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| 33 | #define EFI_SMM_SAVE_STATE_REGISTER_GS EFI_MM_SAVE_STATE_REGISTER_GS
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| 34 | #define EFI_SMM_SAVE_STATE_REGISTER_LDTR_SEL EFI_MM_SAVE_STATE_REGISTER_LDTR_SEL
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| 35 | #define EFI_SMM_SAVE_STATE_REGISTER_TR_SEL EFI_MM_SAVE_STATE_REGISTER_TR_SEL
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| 36 | #define EFI_SMM_SAVE_STATE_REGISTER_DR7 EFI_MM_SAVE_STATE_REGISTER_DR7
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| 37 | #define EFI_SMM_SAVE_STATE_REGISTER_DR6 EFI_MM_SAVE_STATE_REGISTER_DR6
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| 38 | #define EFI_SMM_SAVE_STATE_REGISTER_R8 EFI_MM_SAVE_STATE_REGISTER_R8
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| 39 | #define EFI_SMM_SAVE_STATE_REGISTER_R9 EFI_MM_SAVE_STATE_REGISTER_R9
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| 40 | #define EFI_SMM_SAVE_STATE_REGISTER_R10 EFI_MM_SAVE_STATE_REGISTER_R10
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| 41 | #define EFI_SMM_SAVE_STATE_REGISTER_R11 EFI_MM_SAVE_STATE_REGISTER_R11
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| 42 | #define EFI_SMM_SAVE_STATE_REGISTER_R12 EFI_MM_SAVE_STATE_REGISTER_R12
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| 43 | #define EFI_SMM_SAVE_STATE_REGISTER_R13 EFI_MM_SAVE_STATE_REGISTER_R13
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| 44 | #define EFI_SMM_SAVE_STATE_REGISTER_R14 EFI_MM_SAVE_STATE_REGISTER_R14
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| 45 | #define EFI_SMM_SAVE_STATE_REGISTER_R15 EFI_MM_SAVE_STATE_REGISTER_R15
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| 46 | #define EFI_SMM_SAVE_STATE_REGISTER_RAX EFI_MM_SAVE_STATE_REGISTER_RAX
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| 47 | #define EFI_SMM_SAVE_STATE_REGISTER_RBX EFI_MM_SAVE_STATE_REGISTER_RBX
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| 48 | #define EFI_SMM_SAVE_STATE_REGISTER_RCX EFI_MM_SAVE_STATE_REGISTER_RCX
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| 49 | #define EFI_SMM_SAVE_STATE_REGISTER_RDX EFI_MM_SAVE_STATE_REGISTER_RDX
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| 50 | #define EFI_SMM_SAVE_STATE_REGISTER_RSP EFI_MM_SAVE_STATE_REGISTER_RSP
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| 51 | #define EFI_SMM_SAVE_STATE_REGISTER_RBP EFI_MM_SAVE_STATE_REGISTER_RBP
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| 52 | #define EFI_SMM_SAVE_STATE_REGISTER_RSI EFI_MM_SAVE_STATE_REGISTER_RSI
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| 53 | #define EFI_SMM_SAVE_STATE_REGISTER_RDI EFI_MM_SAVE_STATE_REGISTER_RDI
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| 54 | #define EFI_SMM_SAVE_STATE_REGISTER_RIP EFI_MM_SAVE_STATE_REGISTER_RIP
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| 55 | #define EFI_SMM_SAVE_STATE_REGISTER_RFLAGS EFI_MM_SAVE_STATE_REGISTER_RFLAGS
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| 56 | #define EFI_SMM_SAVE_STATE_REGISTER_CR0 EFI_MM_SAVE_STATE_REGISTER_CR0
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| 57 | #define EFI_SMM_SAVE_STATE_REGISTER_CR3 EFI_MM_SAVE_STATE_REGISTER_CR3
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| 58 | #define EFI_SMM_SAVE_STATE_REGISTER_CR4 EFI_MM_SAVE_STATE_REGISTER_CR4
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| 59 | #define EFI_SMM_SAVE_STATE_REGISTER_FCW EFI_MM_SAVE_STATE_REGISTER_FCW
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| 60 | #define EFI_SMM_SAVE_STATE_REGISTER_FSW EFI_MM_SAVE_STATE_REGISTER_FSW
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| 61 | #define EFI_SMM_SAVE_STATE_REGISTER_FTW EFI_MM_SAVE_STATE_REGISTER_FTW
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| 62 | #define EFI_SMM_SAVE_STATE_REGISTER_OPCODE EFI_MM_SAVE_STATE_REGISTER_OPCODE
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| 63 | #define EFI_SMM_SAVE_STATE_REGISTER_FP_EIP EFI_MM_SAVE_STATE_REGISTER_FP_EIP
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| 64 | #define EFI_SMM_SAVE_STATE_REGISTER_FP_CS EFI_MM_SAVE_STATE_REGISTER_FP_CS
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| 65 | #define EFI_SMM_SAVE_STATE_REGISTER_DATAOFFSET EFI_MM_SAVE_STATE_REGISTER_DATAOFFSET
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| 66 | #define EFI_SMM_SAVE_STATE_REGISTER_FP_DS EFI_MM_SAVE_STATE_REGISTER_FP_DS
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| 67 | #define EFI_SMM_SAVE_STATE_REGISTER_MM0 EFI_MM_SAVE_STATE_REGISTER_MM0
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| 68 | #define EFI_SMM_SAVE_STATE_REGISTER_MM1 EFI_MM_SAVE_STATE_REGISTER_MM1
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| 69 | #define EFI_SMM_SAVE_STATE_REGISTER_MM2 EFI_MM_SAVE_STATE_REGISTER_MM2
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| 70 | #define EFI_SMM_SAVE_STATE_REGISTER_MM3 EFI_MM_SAVE_STATE_REGISTER_MM3
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| 71 | #define EFI_SMM_SAVE_STATE_REGISTER_MM4 EFI_MM_SAVE_STATE_REGISTER_MM4
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| 72 | #define EFI_SMM_SAVE_STATE_REGISTER_MM5 EFI_MM_SAVE_STATE_REGISTER_MM5
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| 73 | #define EFI_SMM_SAVE_STATE_REGISTER_MM6 EFI_MM_SAVE_STATE_REGISTER_MM6
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| 74 | #define EFI_SMM_SAVE_STATE_REGISTER_MM7 EFI_MM_SAVE_STATE_REGISTER_MM7
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| 75 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM0 EFI_MM_SAVE_STATE_REGISTER_XMM0
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| 76 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM1 EFI_MM_SAVE_STATE_REGISTER_XMM1
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| 77 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM2 EFI_MM_SAVE_STATE_REGISTER_XMM2
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| 78 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM3 EFI_MM_SAVE_STATE_REGISTER_XMM3
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| 79 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM4 EFI_MM_SAVE_STATE_REGISTER_XMM4
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| 80 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM5 EFI_MM_SAVE_STATE_REGISTER_XMM5
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| 81 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM6 EFI_MM_SAVE_STATE_REGISTER_XMM6
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| 82 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM7 EFI_MM_SAVE_STATE_REGISTER_XMM7
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| 83 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM8 EFI_MM_SAVE_STATE_REGISTER_XMM8
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| 84 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM9 EFI_MM_SAVE_STATE_REGISTER_XMM9
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| 85 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM10 EFI_MM_SAVE_STATE_REGISTER_XMM10
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| 86 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM11 EFI_MM_SAVE_STATE_REGISTER_XMM11
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| 87 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM12 EFI_MM_SAVE_STATE_REGISTER_XMM12
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| 88 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM13 EFI_MM_SAVE_STATE_REGISTER_XMM13
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| 89 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM14 EFI_MM_SAVE_STATE_REGISTER_XMM14
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| 90 | #define EFI_SMM_SAVE_STATE_REGISTER_XMM15 EFI_MM_SAVE_STATE_REGISTER_XMM15
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| 91 | #define EFI_SMM_SAVE_STATE_REGISTER_IO EFI_MM_SAVE_STATE_REGISTER_IO
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| 92 | #define EFI_SMM_SAVE_STATE_REGISTER_LMA EFI_MM_SAVE_STATE_REGISTER_LMA
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| 93 | #define EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID EFI_MM_SAVE_STATE_REGISTER_PROCESSOR_ID
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| 94 |
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| 95 | typedef EFI_MM_SAVE_STATE_REGISTER EFI_SMM_SAVE_STATE_REGISTER;
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| 96 |
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| 97 | #define EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT
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| 98 | #define EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT
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| 99 |
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| 100 | ///
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| 101 | /// Size width of I/O instruction
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| 102 | ///
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| 103 | #define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT8 EFI_MM_SAVE_STATE_IO_WIDTH_UINT8
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| 104 | #define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT16 EFI_MM_SAVE_STATE_IO_WIDTH_UINT16
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| 105 | #define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT32 EFI_MM_SAVE_STATE_IO_WIDTH_UINT32
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| 106 | #define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT64 EFI_MM_SAVE_STATE_IO_WIDTH_UINT64
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| 107 | typedef EFI_MM_SAVE_STATE_IO_WIDTH EFI_SMM_SAVE_STATE_IO_WIDTH;
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| 108 |
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| 109 | ///
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| 110 | /// Types of I/O instruction
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| 111 | ///
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| 112 | #define EFI_SMM_SAVE_STATE_IO_TYPE_INPUT EFI_MM_SAVE_STATE_IO_TYPE_INPUT
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| 113 | #define EFI_SMM_SAVE_STATE_IO_TYPE_OUTPUT EFI_MM_SAVE_STATE_IO_TYPE_OUTPUT
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| 114 | #define EFI_SMM_SAVE_STATE_IO_TYPE_STRING EFI_MM_SAVE_STATE_IO_TYPE_STRING
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| 115 | #define EFI_SMM_SAVE_STATE_IO_TYPE_REP_PREFIX EFI_MM_SAVE_STATE_IO_TYPE_REP_PREFIX
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| 116 | typedef EFI_MM_SAVE_STATE_IO_TYPE EFI_SMM_SAVE_STATE_IO_TYPE;
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| 117 |
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| 118 | typedef EFI_MM_SAVE_STATE_IO_INFO EFI_SMM_SAVE_STATE_IO_INFO;
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| 119 |
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| 120 | typedef EFI_MM_CPU_PROTOCOL EFI_SMM_CPU_PROTOCOL;
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| 121 |
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| 122 | typedef EFI_MM_READ_SAVE_STATE EFI_SMM_READ_SAVE_STATE;
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| 123 |
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| 124 | typedef EFI_MM_WRITE_SAVE_STATE EFI_SMM_WRITE_SAVE_STATE;
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| 125 | extern EFI_GUID gEfiSmmCpuProtocolGuid;
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| 126 |
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| 127 | #endif
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