1 | /** @file
|
---|
2 | Macro and type definitions corresponding to the QEMU fw_cfg interface.
|
---|
3 |
|
---|
4 | Refer to "docs/specs/fw_cfg.txt" in the QEMU source directory.
|
---|
5 |
|
---|
6 | Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
|
---|
7 | Copyright (C) 2013 - 2017, Red Hat, Inc.
|
---|
8 |
|
---|
9 | SPDX-License-Identifier: BSD-2-Clause-Patent
|
---|
10 | **/
|
---|
11 |
|
---|
12 | #ifndef __FW_CFG_H__
|
---|
13 | #define __FW_CFG_H__
|
---|
14 |
|
---|
15 | #include <Base.h>
|
---|
16 |
|
---|
17 | //
|
---|
18 | // The size, in bytes, of names of firmware configuration files, including at
|
---|
19 | // least one terminating NUL byte.
|
---|
20 | //
|
---|
21 | #define QEMU_FW_CFG_FNAME_SIZE 56
|
---|
22 |
|
---|
23 | //
|
---|
24 | // If the following bit is set in the UINT32 fw_cfg revision / feature bitmap
|
---|
25 | // -- read from key 0x0001 with the basic IO Port or MMIO method --, then the
|
---|
26 | // DMA interface is available.
|
---|
27 | //
|
---|
28 | #define FW_CFG_F_DMA BIT1
|
---|
29 |
|
---|
30 | //
|
---|
31 | // Macros for the FW_CFG_DMA_ACCESS.Control bitmap (in native encoding).
|
---|
32 | //
|
---|
33 | #define FW_CFG_DMA_CTL_ERROR BIT0
|
---|
34 | #define FW_CFG_DMA_CTL_READ BIT1
|
---|
35 | #define FW_CFG_DMA_CTL_SKIP BIT2
|
---|
36 | #define FW_CFG_DMA_CTL_SELECT BIT3
|
---|
37 | #define FW_CFG_DMA_CTL_WRITE BIT4
|
---|
38 |
|
---|
39 | //
|
---|
40 | // The fw_cfg registers can be found at these IO Ports, on the IO-mapped
|
---|
41 | // platforms (Ia32 and X64).
|
---|
42 | //
|
---|
43 | #define FW_CFG_IO_SELECTOR 0x510
|
---|
44 | #define FW_CFG_IO_DATA 0x511
|
---|
45 | #define FW_CFG_IO_DMA_ADDRESS 0x514
|
---|
46 |
|
---|
47 | //
|
---|
48 | // Numerically defined keys.
|
---|
49 | //
|
---|
50 | typedef enum {
|
---|
51 | QemuFwCfgItemSignature = 0x0000,
|
---|
52 | QemuFwCfgItemInterfaceVersion = 0x0001,
|
---|
53 | QemuFwCfgItemSystemUuid = 0x0002,
|
---|
54 | QemuFwCfgItemRamSize = 0x0003,
|
---|
55 | QemuFwCfgItemGraphicsEnabled = 0x0004,
|
---|
56 | QemuFwCfgItemSmpCpuCount = 0x0005,
|
---|
57 | QemuFwCfgItemMachineId = 0x0006,
|
---|
58 | QemuFwCfgItemKernelAddress = 0x0007,
|
---|
59 | QemuFwCfgItemKernelSize = 0x0008,
|
---|
60 | QemuFwCfgItemKernelCommandLine = 0x0009,
|
---|
61 | QemuFwCfgItemInitrdAddress = 0x000a,
|
---|
62 | QemuFwCfgItemInitrdSize = 0x000b,
|
---|
63 | QemuFwCfgItemBootDevice = 0x000c,
|
---|
64 | QemuFwCfgItemNumaData = 0x000d,
|
---|
65 | QemuFwCfgItemBootMenu = 0x000e,
|
---|
66 | QemuFwCfgItemMaximumCpuCount = 0x000f,
|
---|
67 | QemuFwCfgItemKernelEntry = 0x0010,
|
---|
68 | QemuFwCfgItemKernelData = 0x0011,
|
---|
69 | QemuFwCfgItemInitrdData = 0x0012,
|
---|
70 | QemuFwCfgItemCommandLineAddress = 0x0013,
|
---|
71 | QemuFwCfgItemCommandLineSize = 0x0014,
|
---|
72 | QemuFwCfgItemCommandLineData = 0x0015,
|
---|
73 | QemuFwCfgItemKernelSetupAddress = 0x0016,
|
---|
74 | QemuFwCfgItemKernelSetupSize = 0x0017,
|
---|
75 | QemuFwCfgItemKernelSetupData = 0x0018,
|
---|
76 | QemuFwCfgItemFileDir = 0x0019,
|
---|
77 |
|
---|
78 | QemuFwCfgItemX86AcpiTables = 0x8000,
|
---|
79 | QemuFwCfgItemX86SmbiosTables = 0x8001,
|
---|
80 | QemuFwCfgItemX86Irq0Override = 0x8002,
|
---|
81 | QemuFwCfgItemX86E820Table = 0x8003,
|
---|
82 | QemuFwCfgItemX86HpetData = 0x8004,
|
---|
83 | } FIRMWARE_CONFIG_ITEM;
|
---|
84 |
|
---|
85 | //
|
---|
86 | // Communication structure for the DMA access method. All fields are encoded in
|
---|
87 | // big endian.
|
---|
88 | //
|
---|
89 | #pragma pack (1)
|
---|
90 | typedef struct {
|
---|
91 | UINT32 Control;
|
---|
92 | UINT32 Length;
|
---|
93 | UINT64 Address;
|
---|
94 | } FW_CFG_DMA_ACCESS;
|
---|
95 | #pragma pack ()
|
---|
96 |
|
---|
97 | #endif
|
---|