| 1 | ;------------------------------------------------------------------------------ ;
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| 2 | ; Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
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| 3 | ; SPDX-License-Identifier: BSD-2-Clause-Patent
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| 4 | ;
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| 5 | ; Module Name:
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| 6 | ;
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| 7 | ; ExceptionHandlerAsm.Asm
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| 8 | ;
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| 9 | ; Abstract:
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| 10 | ;
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| 11 | ; IA32 CPU Exception Handler
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| 12 | ;
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| 13 | ; Notes:
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| 14 | ;
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| 15 | ;------------------------------------------------------------------------------
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| 16 |
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| 17 | ;
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| 18 | ; CommonExceptionHandler()
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| 19 | ;
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| 20 | extern ASM_PFX(CommonExceptionHandler)
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| 21 |
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| 22 | SECTION .data
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| 23 |
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| 24 | extern ASM_PFX(mErrorCodeFlag) ; Error code flags for exceptions
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| 25 | extern ASM_PFX(mDoFarReturnFlag) ; Do far return flag
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| 26 |
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| 27 | SECTION .text
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| 28 |
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| 29 | ALIGN 8
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| 30 |
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| 31 | ;
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| 32 | ; exception handler stub table
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| 33 | ;
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| 34 | AsmIdtVectorBegin:
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| 35 | %assign Vector 0
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| 36 | %rep 256
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| 37 | push strict dword %[Vector];
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| 38 | push eax
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| 39 | mov eax, ASM_PFX(CommonInterruptEntry)
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| 40 | jmp eax
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| 41 | %assign Vector Vector+1
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| 42 | %endrep
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| 43 | AsmIdtVectorEnd:
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| 44 |
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| 45 | HookAfterStubBegin:
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| 46 | push strict dword 0 ; 0 will be fixed
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| 47 | VectorNum:
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| 48 | push eax
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| 49 | mov eax, HookAfterStubHeaderEnd
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| 50 | jmp eax
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| 51 | HookAfterStubHeaderEnd:
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| 52 | pop eax
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| 53 | sub esp, 8 ; reserve room for filling exception data later
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| 54 | push dword [esp + 8]
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| 55 | xchg ecx, [esp] ; get vector number
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| 56 | bt [ASM_PFX(mErrorCodeFlag)], ecx
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| 57 | jnc .0
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| 58 | push dword [esp] ; addition push if exception data needed
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| 59 | .0:
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| 60 | xchg ecx, [esp] ; restore ecx
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| 61 | push eax
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| 62 |
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| 63 | ;----------------------------------------------------------------------------;
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| 64 | ; CommonInterruptEntry ;
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| 65 | ;----------------------------------------------------------------------------;
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| 66 | ; The follow algorithm is used for the common interrupt routine.
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| 67 | ; Entry from each interrupt with a push eax and eax=interrupt number
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| 68 | ; Stack:
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| 69 | ; +---------------------+
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| 70 | ; + EFlags +
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| 71 | ; +---------------------+
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| 72 | ; + CS +
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| 73 | ; +---------------------+
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| 74 | ; + EIP +
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| 75 | ; +---------------------+
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| 76 | ; + Error Code +
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| 77 | ; +---------------------+
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| 78 | ; + Vector Number +
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| 79 | ; +---------------------+
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| 80 | ; + EBP +
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| 81 | ; +---------------------+ <-- EBP
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| 82 | global ASM_PFX(CommonInterruptEntry)
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| 83 | ASM_PFX(CommonInterruptEntry):
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| 84 | cli
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| 85 | pop eax
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| 86 | ;
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| 87 | ; All interrupt handlers are invoked through interrupt gates, so
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| 88 | ; IF flag automatically cleared at the entry point
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| 89 | ;
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| 90 |
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| 91 | ;
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| 92 | ; Get vector number from top of stack
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| 93 | ;
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| 94 | xchg ecx, [esp]
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| 95 | and ecx, 0xFF ; Vector number should be less than 256
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| 96 | cmp ecx, 32 ; Intel reserved vector for exceptions?
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| 97 | jae NoErrorCode
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| 98 | bt [ASM_PFX(mErrorCodeFlag)], ecx
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| 99 | jc HasErrorCode
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| 100 |
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| 101 | NoErrorCode:
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| 102 |
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| 103 | ;
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| 104 | ; Stack:
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| 105 | ; +---------------------+
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| 106 | ; + EFlags +
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| 107 | ; +---------------------+
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| 108 | ; + CS +
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| 109 | ; +---------------------+
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| 110 | ; + EIP +
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| 111 | ; +---------------------+
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| 112 | ; + ECX +
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| 113 | ; +---------------------+ <-- ESP
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| 114 | ;
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| 115 | ; Registers:
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| 116 | ; ECX - Vector Number
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| 117 | ;
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| 118 |
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| 119 | ;
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| 120 | ; Put Vector Number on stack
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| 121 | ;
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| 122 | push ecx
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| 123 |
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| 124 | ;
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| 125 | ; Put 0 (dummy) error code on stack, and restore ECX
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| 126 | ;
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| 127 | xor ecx, ecx ; ECX = 0
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| 128 | xchg ecx, [esp+4]
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| 129 |
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| 130 | jmp ErrorCodeAndVectorOnStack
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| 131 |
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| 132 | HasErrorCode:
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| 133 |
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| 134 | ;
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| 135 | ; Stack:
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| 136 | ; +---------------------+
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| 137 | ; + EFlags +
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| 138 | ; +---------------------+
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| 139 | ; + CS +
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| 140 | ; +---------------------+
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| 141 | ; + EIP +
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| 142 | ; +---------------------+
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| 143 | ; + Error Code +
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| 144 | ; +---------------------+
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| 145 | ; + ECX +
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| 146 | ; +---------------------+ <-- ESP
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| 147 | ;
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| 148 | ; Registers:
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| 149 | ; ECX - Vector Number
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| 150 | ;
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| 151 |
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| 152 | ;
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| 153 | ; Put Vector Number on stack and restore ECX
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| 154 | ;
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| 155 | xchg ecx, [esp]
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| 156 |
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| 157 | ErrorCodeAndVectorOnStack:
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| 158 | push ebp
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| 159 | mov ebp, esp
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| 160 |
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| 161 | ;
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| 162 | ; Stack:
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| 163 | ; +---------------------+
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| 164 | ; + EFlags +
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| 165 | ; +---------------------+
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| 166 | ; + CS +
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| 167 | ; +---------------------+
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| 168 | ; + EIP +
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| 169 | ; +---------------------+
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| 170 | ; + Error Code +
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| 171 | ; +---------------------+
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| 172 | ; + Vector Number +
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| 173 | ; +---------------------+
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| 174 | ; + EBP +
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| 175 | ; +---------------------+ <-- EBP
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| 176 | ;
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| 177 |
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| 178 | ;
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| 179 | ; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
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| 180 | ; is 16-byte aligned
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| 181 | ;
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| 182 | and esp, 0xfffffff0
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| 183 | sub esp, 12
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| 184 |
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| 185 | sub esp, 8
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| 186 | push 0 ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
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| 187 | push 0 ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
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| 188 |
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| 189 | ;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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| 190 | push eax
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| 191 | push ecx
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| 192 | push edx
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| 193 | push ebx
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| 194 | lea ecx, [ebp + 6 * 4]
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| 195 | push ecx ; ESP
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| 196 | push dword [ebp] ; EBP
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| 197 | push esi
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| 198 | push edi
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| 199 |
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| 200 | ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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| 201 | mov eax, ss
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| 202 | push eax
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| 203 | movzx eax, word [ebp + 4 * 4]
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| 204 | push eax
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| 205 | mov eax, ds
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| 206 | push eax
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| 207 | mov eax, es
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| 208 | push eax
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| 209 | mov eax, fs
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| 210 | push eax
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| 211 | mov eax, gs
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| 212 | push eax
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| 213 |
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| 214 | ;; UINT32 Eip;
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| 215 | mov eax, [ebp + 3 * 4]
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| 216 | push eax
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| 217 |
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| 218 | ;; UINT32 Gdtr[2], Idtr[2];
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| 219 | sub esp, 8
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| 220 | sidt [esp]
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| 221 | mov eax, [esp + 2]
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| 222 | xchg eax, [esp]
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| 223 | and eax, 0xFFFF
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| 224 | mov [esp+4], eax
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| 225 |
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| 226 | sub esp, 8
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| 227 | sgdt [esp]
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| 228 | mov eax, [esp + 2]
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| 229 | xchg eax, [esp]
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| 230 | and eax, 0xFFFF
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| 231 | mov [esp+4], eax
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| 232 |
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| 233 | ;; UINT32 Ldtr, Tr;
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| 234 | xor eax, eax
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| 235 | str ax
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| 236 | push eax
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| 237 | sldt ax
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| 238 | push eax
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| 239 |
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| 240 | ;; UINT32 EFlags;
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| 241 | mov eax, [ebp + 5 * 4]
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| 242 | push eax
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| 243 |
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| 244 | ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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| 245 | mov eax, 1
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| 246 | push ebx ; temporarily save value of ebx on stack
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| 247 | cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and DE
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| 248 | ; are supported
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| 249 | pop ebx ; retore value of ebx that was overwritten by CPUID
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| 250 | mov eax, cr4
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| 251 | push eax ; push cr4 firstly
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| 252 | test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
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| 253 | jz .1
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| 254 | or eax, BIT9 ; Set CR4.OSFXSR
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| 255 | .1:
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| 256 | test edx, BIT2 ; Test for Debugging Extensions support
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| 257 | jz .2
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| 258 | or eax, BIT3 ; Set CR4.DE
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| 259 | .2:
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| 260 | mov cr4, eax
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| 261 | mov eax, cr3
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| 262 | push eax
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| 263 | mov eax, cr2
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| 264 | push eax
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| 265 | xor eax, eax
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| 266 | push eax
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| 267 | mov eax, cr0
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| 268 | push eax
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| 269 |
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| 270 | ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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| 271 | mov eax, dr7
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| 272 | push eax
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| 273 | mov eax, dr6
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| 274 | push eax
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| 275 | mov eax, dr3
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| 276 | push eax
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| 277 | mov eax, dr2
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| 278 | push eax
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| 279 | mov eax, dr1
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| 280 | push eax
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| 281 | mov eax, dr0
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| 282 | push eax
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| 283 |
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| 284 | ;; FX_SAVE_STATE_IA32 FxSaveState;
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| 285 | sub esp, 512
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| 286 | mov edi, esp
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| 287 | test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.
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| 288 | ; edx still contains result from CPUID above
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| 289 | jz .3
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| 290 | fxsave [edi]
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| 291 | .3:
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| 292 |
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| 293 | ;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
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| 294 | cld
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| 295 |
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| 296 | ;; UINT32 ExceptionData;
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| 297 | push dword [ebp + 2 * 4]
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| 298 |
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| 299 | ;; Prepare parameter and call
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| 300 | mov edx, esp
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| 301 | push edx
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| 302 | mov edx, dword [ebp + 1 * 4]
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| 303 | push edx
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| 304 |
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| 305 | ;
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| 306 | ; Call External Exception Handler
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| 307 | ;
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| 308 | mov eax, ASM_PFX(CommonExceptionHandler)
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| 309 | call eax
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| 310 | add esp, 8
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| 311 |
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| 312 | cli
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| 313 | ;; UINT32 ExceptionData;
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| 314 | add esp, 4
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| 315 |
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| 316 | ;; FX_SAVE_STATE_IA32 FxSaveState;
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| 317 | mov esi, esp
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| 318 | mov eax, 1
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| 319 | cpuid ; use CPUID to determine if FXSAVE/FXRESTOR
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| 320 | ; are supported
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| 321 | test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
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| 322 | jz .4
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| 323 | fxrstor [esi]
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| 324 | .4:
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| 325 | add esp, 512
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| 326 |
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| 327 | ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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| 328 | ;; Skip restoration of DRx registers to support in-circuit emualators
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| 329 | ;; or debuggers set breakpoint in interrupt/exception context
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| 330 | add esp, 4 * 6
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| 331 |
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| 332 | ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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| 333 | pop eax
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| 334 | mov cr0, eax
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| 335 | add esp, 4 ; not for Cr1
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| 336 | pop eax
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| 337 | mov cr2, eax
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| 338 | pop eax
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| 339 | mov cr3, eax
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| 340 | pop eax
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| 341 | mov cr4, eax
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| 342 |
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| 343 | ;; UINT32 EFlags;
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| 344 | pop dword [ebp + 5 * 4]
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| 345 |
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| 346 | ;; UINT32 Ldtr, Tr;
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| 347 | ;; UINT32 Gdtr[2], Idtr[2];
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| 348 | ;; Best not let anyone mess with these particular registers...
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| 349 | add esp, 24
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| 350 |
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| 351 | ;; UINT32 Eip;
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| 352 | pop dword [ebp + 3 * 4]
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| 353 |
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| 354 | ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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| 355 | ;; NOTE - modified segment registers could hang the debugger... We
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| 356 | ;; could attempt to insulate ourselves against this possibility,
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| 357 | ;; but that poses risks as well.
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| 358 | ;;
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| 359 | pop gs
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| 360 | pop fs
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| 361 | pop es
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| 362 | pop ds
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| 363 | pop dword [ebp + 4 * 4]
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| 364 | pop ss
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| 365 |
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| 366 | ;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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| 367 | pop edi
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| 368 | pop esi
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| 369 | add esp, 4 ; not for ebp
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| 370 | add esp, 4 ; not for esp
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| 371 | pop ebx
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| 372 | pop edx
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| 373 | pop ecx
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| 374 | pop eax
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| 375 |
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| 376 | pop dword [ebp - 8]
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| 377 | pop dword [ebp - 4]
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| 378 | mov esp, ebp
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| 379 | pop ebp
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| 380 | add esp, 8
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| 381 | cmp dword [esp - 16], 0 ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
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| 382 | jz DoReturn
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| 383 | cmp dword [esp - 20], 1 ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
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| 384 | jz ErrorCode
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| 385 | jmp dword [esp - 16]
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| 386 | ErrorCode:
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| 387 | sub esp, 4
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| 388 | jmp dword [esp - 12]
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| 389 |
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| 390 | DoReturn:
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| 391 | cmp dword [ASM_PFX(mDoFarReturnFlag)], 0 ; Check if need to do far return instead of IRET
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| 392 | jz DoIret
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| 393 | push dword [esp + 8] ; save EFLAGS
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| 394 | add esp, 16
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| 395 | push dword [esp - 8] ; save CS in new location
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| 396 | push dword [esp - 8] ; save EIP in new location
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| 397 | push dword [esp - 8] ; save EFLAGS in new location
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| 398 | popfd ; restore EFLAGS
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| 399 | retf ; far return
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| 400 |
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| 401 | DoIret:
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| 402 | iretd
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| 403 |
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| 404 | ;---------------------------------------;
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| 405 | ; _AsmGetTemplateAddressMap ;
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| 406 | ;----------------------------------------------------------------------------;
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| 407 | ;
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| 408 | ; Protocol prototype
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| 409 | ; AsmGetTemplateAddressMap (
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| 410 | ; EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
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| 411 | ; );
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| 412 | ;
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| 413 | ; Routine Description:
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| 414 | ;
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| 415 | ; Return address map of interrupt handler template so that C code can generate
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| 416 | ; interrupt table.
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| 417 | ;
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| 418 | ; Arguments:
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| 419 | ;
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| 420 | ;
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| 421 | ; Returns:
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| 422 | ;
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| 423 | ; Nothing
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| 424 | ;
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| 425 | ;
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| 426 | ; Input: [ebp][0] = Original ebp
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| 427 | ; [ebp][4] = Return address
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| 428 | ;
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| 429 | ; Output: Nothing
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| 430 | ;
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| 431 | ; Destroys: Nothing
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| 432 | ;-----------------------------------------------------------------------------;
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| 433 | global ASM_PFX(AsmGetTemplateAddressMap)
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| 434 | ASM_PFX(AsmGetTemplateAddressMap):
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| 435 | push ebp ; C prolog
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| 436 | mov ebp, esp
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| 437 | pushad
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| 438 |
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| 439 | mov ebx, dword [ebp + 0x8]
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| 440 | mov dword [ebx], AsmIdtVectorBegin
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| 441 | mov dword [ebx + 0x4], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256
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| 442 | mov dword [ebx + 0x8], HookAfterStubBegin
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| 443 |
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| 444 | popad
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| 445 | pop ebp
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| 446 | ret
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| 447 |
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| 448 | ;-------------------------------------------------------------------------------------
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| 449 | ; AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
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| 450 | ;-------------------------------------------------------------------------------------
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| 451 | global ASM_PFX(AsmVectorNumFixup)
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| 452 | ASM_PFX(AsmVectorNumFixup):
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| 453 | mov eax, dword [esp + 8]
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| 454 | mov ecx, [esp + 4]
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| 455 | mov [ecx + (VectorNum - 4 - HookAfterStubBegin)], al
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| 456 | ret
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