svga3d_reg.h@ 52970

最後變更在這個檔案從52970是 52970,由 vboxsync 提交於 10 年前
Devices/Graphics: added original vmsvga and vmsvga_glext headers (2009-04)
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1	/**********************************************************
2	* Copyright 1998-2009 VMware, Inc. All rights reserved.
3	*
4	* Permission is hereby granted, free of charge, to any person
5	* obtaining a copy of this software and associated documentation
6	* files (the "Software"), to deal in the Software without
7	* restriction, including without limitation the rights to use, copy,
8	* modify, merge, publish, distribute, sublicense, and/or sell copies
9	* of the Software, and to permit persons to whom the Software is
10	* furnished to do so, subject to the following conditions:
11	*
12	* The above copyright notice and this permission notice shall be
13	* included in all copies or substantial portions of the Software.
14	*
15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22	* SOFTWARE.
23	*
24	**********************************************************/
25
26	/*
27	* svga3d_reg.h --
28	*
29	* SVGA 3D hardware definitions
30	*/
31
32	#ifndef _SVGA3D_REG_H_
33	#define _SVGA3D_REG_H_
34
35	#include "svga_reg.h"
36
37
38	/*
39	* 3D Hardware Version
40	*
41	* The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo
42	* register. Is set by the host and read by the guest. This lets
43	* us make new guest drivers which are backwards-compatible with old
44	* SVGA hardware revisions. It does not let us support old guest
45	* drivers. Good enough for now.
46	*
47	*/
48
49	#define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) \| ((minor) & 0xFF))
50	#define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16)
51	#define SVGA3D_MINOR_HWVERSION(version) ((version) & 0xFF)
52
53	typedef enum {
54	SVGA3D_HWVERSION_WS5_RC1 = SVGA3D_MAKE_HWVERSION(0, 1),
55	SVGA3D_HWVERSION_WS5_RC2 = SVGA3D_MAKE_HWVERSION(0, 2),
56	SVGA3D_HWVERSION_WS51_RC1 = SVGA3D_MAKE_HWVERSION(0, 3),
57	SVGA3D_HWVERSION_WS6_B1 = SVGA3D_MAKE_HWVERSION(1, 1),
58	SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),
59	SVGA3D_HWVERSION_WS65_B1 = SVGA3D_MAKE_HWVERSION(2, 0),
60	SVGA3D_HWVERSION_WS8_B1 = SVGA3D_MAKE_HWVERSION(2, 1),
61	SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS8_B1
62	} SVGA3dHardwareVersion;
63
64	/*
65	* Generic Types
66	*/
67
68	typedef uint32_t SVGA3dBool; /* 32-bit Bool definition */
69	#define SVGA3D_NUM_CLIPPLANES 6
70	#define SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS 8
71	#define SVGA3D_MAX_CONTEXT_IDS 256
72	#define SVGA3D_MAX_SURFACE_IDS (32 * 1024)
73
74	/*
75	* Surface formats.
76	*
77	* If you modify this list, be sure to keep GLUtil.c in sync. It
78	* includes the internal format definition of each surface in
79	* GLUtil_ConvertSurfaceFormat, and it contains a table of
80	* human-readable names in GLUtil_GetFormatName.
81	*/
82
83	typedef enum SVGA3dSurfaceFormat {
84	SVGA3D_FORMAT_INVALID = 0,
85
86	SVGA3D_X8R8G8B8 = 1,
87	SVGA3D_A8R8G8B8 = 2,
88
89	SVGA3D_R5G6B5 = 3,
90	SVGA3D_X1R5G5B5 = 4,
91	SVGA3D_A1R5G5B5 = 5,
92	SVGA3D_A4R4G4B4 = 6,
93
94	SVGA3D_Z_D32 = 7,
95	SVGA3D_Z_D16 = 8,
96	SVGA3D_Z_D24S8 = 9,
97	SVGA3D_Z_D15S1 = 10,
98
99	SVGA3D_LUMINANCE8 = 11,
100	SVGA3D_LUMINANCE4_ALPHA4 = 12,
101	SVGA3D_LUMINANCE16 = 13,
102	SVGA3D_LUMINANCE8_ALPHA8 = 14,
103
104	SVGA3D_DXT1 = 15,
105	SVGA3D_DXT2 = 16,
106	SVGA3D_DXT3 = 17,
107	SVGA3D_DXT4 = 18,
108	SVGA3D_DXT5 = 19,
109
110	SVGA3D_BUMPU8V8 = 20,
111	SVGA3D_BUMPL6V5U5 = 21,
112	SVGA3D_BUMPX8L8V8U8 = 22,
113	SVGA3D_BUMPL8V8U8 = 23,
114
115	SVGA3D_ARGB_S10E5 = 24, /* 16-bit floating-point ARGB */
116	SVGA3D_ARGB_S23E8 = 25, /* 32-bit floating-point ARGB */
117
118	SVGA3D_A2R10G10B10 = 26,
119
120	/* signed formats */
121	SVGA3D_V8U8 = 27,
122	SVGA3D_Q8W8V8U8 = 28,
123	SVGA3D_CxV8U8 = 29,
124
125	/* mixed formats */
126	SVGA3D_X8L8V8U8 = 30,
127	SVGA3D_A2W10V10U10 = 31,
128
129	SVGA3D_ALPHA8 = 32,
130
131	/* Single- and dual-component floating point formats */
132	SVGA3D_R_S10E5 = 33,
133	SVGA3D_R_S23E8 = 34,
134	SVGA3D_RG_S10E5 = 35,
135	SVGA3D_RG_S23E8 = 36,
136
137	/*
138	* Any surface can be used as a buffer object, but SVGA3D_BUFFER is
139	* the most efficient format to use when creating new surfaces
140	* expressly for index or vertex data.
141	*/
142
143	SVGA3D_BUFFER = 37,
144
145	SVGA3D_Z_D24X8 = 38,
146
147	SVGA3D_V16U16 = 39,
148
149	SVGA3D_G16R16 = 40,
150	SVGA3D_A16B16G16R16 = 41,
151
152	/* Packed Video formats */
153	SVGA3D_UYVY = 42,
154	SVGA3D_YUY2 = 43,
155
156	/* Planar video formats */
157	SVGA3D_NV12 = 44,
158
159	/* Video format with alpha */
160	SVGA3D_AYUV = 45,
161
162	SVGA3D_BC4_UNORM = 108,
163	SVGA3D_BC5_UNORM = 111,
164
165	/* Advanced D3D9 depth formats. */
166	SVGA3D_Z_DF16 = 118,
167	SVGA3D_Z_DF24 = 119,
168	SVGA3D_Z_D24S8_INT = 120,
169
170	SVGA3D_FORMAT_MAX
171	} SVGA3dSurfaceFormat;
172
173	typedef uint32_t SVGA3dColor; /* a, r, g, b */
174
175	/*
176	* These match the D3DFORMAT_OP definitions used by Direct3D. We need
177	* them so that we can query the host for what the supported surface
178	* operations are (when we're using the D3D backend, in particular),
179	* and so we can send those operations to the guest.
180	*/
181	typedef enum {
182	SVGA3DFORMAT_OP_TEXTURE = 0x00000001,
183	SVGA3DFORMAT_OP_VOLUMETEXTURE = 0x00000002,
184	SVGA3DFORMAT_OP_CUBETEXTURE = 0x00000004,
185	SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET = 0x00000008,
186	SVGA3DFORMAT_OP_SAME_FORMAT_RENDERTARGET = 0x00000010,
187	SVGA3DFORMAT_OP_ZSTENCIL = 0x00000040,
188	SVGA3DFORMAT_OP_ZSTENCIL_WITH_ARBITRARY_COLOR_DEPTH = 0x00000080,
189
190	/*
191	* This format can be used as a render target if the current display mode
192	* is the same depth if the alpha channel is ignored. e.g. if the device
193	* can render to A8R8G8B8 when the display mode is X8R8G8B8, then the
194	* format op list entry for A8R8G8B8 should have this cap.
195	*/
196	SVGA3DFORMAT_OP_SAME_FORMAT_UP_TO_ALPHA_RENDERTARGET = 0x00000100,
197
198	/*
199	* This format contains DirectDraw support (including Flip). This flag
200	* should not to be set on alpha formats.
201	*/
202	SVGA3DFORMAT_OP_DISPLAYMODE = 0x00000400,
203
204	/*
205	* The rasterizer can support some level of Direct3D support in this format
206	* and implies that the driver can create a Context in this mode (for some
207	* render target format). When this flag is set, the SVGA3DFORMAT_OP_DISPLAYMODE
208	* flag must also be set.
209	*/
210	SVGA3DFORMAT_OP_3DACCELERATION = 0x00000800,
211
212	/*
213	* This is set for a private format when the driver has put the bpp in
214	* the structure.
215	*/
216	SVGA3DFORMAT_OP_PIXELSIZE = 0x00001000,
217
218	/*
219	* Indicates that this format can be converted to any RGB format for which
220	* SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB is specified
221	*/
222	SVGA3DFORMAT_OP_CONVERT_TO_ARGB = 0x00002000,
223
224	/*
225	* Indicates that this format can be used to create offscreen plain surfaces.
226	*/
227	SVGA3DFORMAT_OP_OFFSCREENPLAIN = 0x00004000,
228
229	/*
230	* Indicated that this format can be read as an SRGB texture (meaning that the
231	* sampler will linearize the looked up data)
232	*/
233	SVGA3DFORMAT_OP_SRGBREAD = 0x00008000,
234
235	/*
236	* Indicates that this format can be used in the bumpmap instructions
237	*/
238	SVGA3DFORMAT_OP_BUMPMAP = 0x00010000,
239
240	/*
241	* Indicates that this format can be sampled by the displacement map sampler
242	*/
243	SVGA3DFORMAT_OP_DMAP = 0x00020000,
244
245	/*
246	* Indicates that this format cannot be used with texture filtering
247	*/
248	SVGA3DFORMAT_OP_NOFILTER = 0x00040000,
249
250	/*
251	* Indicates that format conversions are supported to this RGB format if
252	* SVGA3DFORMAT_OP_CONVERT_TO_ARGB is specified in the source format.
253	*/
254	SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB = 0x00080000,
255
256	/*
257	* Indicated that this format can be written as an SRGB target (meaning that the
258	* pixel pipe will DE-linearize data on output to format)
259	*/
260	SVGA3DFORMAT_OP_SRGBWRITE = 0x00100000,
261
262	/*
263	* Indicates that this format cannot be used with alpha blending
264	*/
265	SVGA3DFORMAT_OP_NOALPHABLEND = 0x00200000,
266
267	/*
268	* Indicates that the device can auto-generated sublevels for resources
269	* of this format
270	*/
271	SVGA3DFORMAT_OP_AUTOGENMIPMAP = 0x00400000,
272
273	/*
274	* Indicates that this format can be used by vertex texture sampler
275	*/
276	SVGA3DFORMAT_OP_VERTEXTEXTURE = 0x00800000,
277
278	/*
279	* Indicates that this format supports neither texture coordinate wrap
280	* modes, nor mipmapping
281	*/
282	SVGA3DFORMAT_OP_NOTEXCOORDWRAPNORMIP = 0x01000000
283	} SVGA3dFormatOp;
284
285	/*
286	* This structure is a conversion of SVGA3DFORMAT_OP_*.
287	* Entries must be located at the same position.
288	*/
289	typedef union {
290	uint32_t value;
291	struct {
292	uint32_t texture : 1;
293	uint32_t volumeTexture : 1;
294	uint32_t cubeTexture : 1;
295	uint32_t offscreenRenderTarget : 1;
296	uint32_t sameFormatRenderTarget : 1;
297	uint32_t unknown1 : 1;
298	uint32_t zStencil : 1;
299	uint32_t zStencilArbitraryDepth : 1;
300	uint32_t sameFormatUpToAlpha : 1;
301	uint32_t unknown2 : 1;
302	uint32_t displayMode : 1;
303	uint32_t acceleration3d : 1;
304	uint32_t pixelSize : 1;
305	uint32_t convertToARGB : 1;
306	uint32_t offscreenPlain : 1;
307	uint32_t sRGBRead : 1;
308	uint32_t bumpMap : 1;
309	uint32_t dmap : 1;
310	uint32_t noFilter : 1;
311	uint32_t memberOfGroupARGB : 1;
312	uint32_t sRGBWrite : 1;
313	uint32_t noAlphaBlend : 1;
314	uint32_t autoGenMipMap : 1;
315	uint32_t vertexTexture : 1;
316	uint32_t noTexCoordWrapNorMip : 1;
317	} s;
318	} SVGA3dSurfaceFormatCaps;
319
320	/*
321	* SVGA_3D_CMD_SETRENDERSTATE Types. All value types
322	* must fit in a uint32_t.
323	*/
324
325	typedef enum {
326	SVGA3D_RS_INVALID = 0,
327	SVGA3D_RS_ZENABLE = 1, /* SVGA3dBool */
328	SVGA3D_RS_ZWRITEENABLE = 2, /* SVGA3dBool */
329	SVGA3D_RS_ALPHATESTENABLE = 3, /* SVGA3dBool */
330	SVGA3D_RS_DITHERENABLE = 4, /* SVGA3dBool */
331	SVGA3D_RS_BLENDENABLE = 5, /* SVGA3dBool */
332	SVGA3D_RS_FOGENABLE = 6, /* SVGA3dBool */
333	SVGA3D_RS_SPECULARENABLE = 7, /* SVGA3dBool */
334	SVGA3D_RS_STENCILENABLE = 8, /* SVGA3dBool */
335	SVGA3D_RS_LIGHTINGENABLE = 9, /* SVGA3dBool */
336	SVGA3D_RS_NORMALIZENORMALS = 10, /* SVGA3dBool */
337	SVGA3D_RS_POINTSPRITEENABLE = 11, /* SVGA3dBool */
338	SVGA3D_RS_POINTSCALEENABLE = 12, /* SVGA3dBool */
339	SVGA3D_RS_STENCILREF = 13, /* uint32_t */
340	SVGA3D_RS_STENCILMASK = 14, /* uint32_t */
341	SVGA3D_RS_STENCILWRITEMASK = 15, /* uint32_t */
342	SVGA3D_RS_FOGSTART = 16, /* float */
343	SVGA3D_RS_FOGEND = 17, /* float */
344	SVGA3D_RS_FOGDENSITY = 18, /* float */
345	SVGA3D_RS_POINTSIZE = 19, /* float */
346	SVGA3D_RS_POINTSIZEMIN = 20, /* float */
347	SVGA3D_RS_POINTSIZEMAX = 21, /* float */
348	SVGA3D_RS_POINTSCALE_A = 22, /* float */
349	SVGA3D_RS_POINTSCALE_B = 23, /* float */
350	SVGA3D_RS_POINTSCALE_C = 24, /* float */
351	SVGA3D_RS_FOGCOLOR = 25, /* SVGA3dColor */
352	SVGA3D_RS_AMBIENT = 26, /* SVGA3dColor */
353	SVGA3D_RS_CLIPPLANEENABLE = 27, /* SVGA3dClipPlanes */
354	SVGA3D_RS_FOGMODE = 28, /* SVGA3dFogMode */
355	SVGA3D_RS_FILLMODE = 29, /* SVGA3dFillMode */
356	SVGA3D_RS_SHADEMODE = 30, /* SVGA3dShadeMode */
357	SVGA3D_RS_LINEPATTERN = 31, /* SVGA3dLinePattern */
358	SVGA3D_RS_SRCBLEND = 32, /* SVGA3dBlendOp */
359	SVGA3D_RS_DSTBLEND = 33, /* SVGA3dBlendOp */
360	SVGA3D_RS_BLENDEQUATION = 34, /* SVGA3dBlendEquation */
361	SVGA3D_RS_CULLMODE = 35, /* SVGA3dFace */
362	SVGA3D_RS_ZFUNC = 36, /* SVGA3dCmpFunc */
363	SVGA3D_RS_ALPHAFUNC = 37, /* SVGA3dCmpFunc */
364	SVGA3D_RS_STENCILFUNC = 38, /* SVGA3dCmpFunc */
365	SVGA3D_RS_STENCILFAIL = 39, /* SVGA3dStencilOp */
366	SVGA3D_RS_STENCILZFAIL = 40, /* SVGA3dStencilOp */
367	SVGA3D_RS_STENCILPASS = 41, /* SVGA3dStencilOp */
368	SVGA3D_RS_ALPHAREF = 42, /* float (0.0 .. 1.0) */
369	SVGA3D_RS_FRONTWINDING = 43, /* SVGA3dFrontWinding */
370	SVGA3D_RS_COORDINATETYPE = 44, /* SVGA3dCoordinateType */
371	SVGA3D_RS_ZBIAS = 45, /* float */
372	SVGA3D_RS_RANGEFOGENABLE = 46, /* SVGA3dBool */
373	SVGA3D_RS_COLORWRITEENABLE = 47, /* SVGA3dColorMask */
374	SVGA3D_RS_VERTEXMATERIALENABLE = 48, /* SVGA3dBool */
375	SVGA3D_RS_DIFFUSEMATERIALSOURCE = 49, /* SVGA3dVertexMaterial */
376	SVGA3D_RS_SPECULARMATERIALSOURCE = 50, /* SVGA3dVertexMaterial */
377	SVGA3D_RS_AMBIENTMATERIALSOURCE = 51, /* SVGA3dVertexMaterial */
378	SVGA3D_RS_EMISSIVEMATERIALSOURCE = 52, /* SVGA3dVertexMaterial */
379	SVGA3D_RS_TEXTUREFACTOR = 53, /* SVGA3dColor */
380	SVGA3D_RS_LOCALVIEWER = 54, /* SVGA3dBool */
381	SVGA3D_RS_SCISSORTESTENABLE = 55, /* SVGA3dBool */
382	SVGA3D_RS_BLENDCOLOR = 56, /* SVGA3dColor */
383	SVGA3D_RS_STENCILENABLE2SIDED = 57, /* SVGA3dBool */
384	SVGA3D_RS_CCWSTENCILFUNC = 58, /* SVGA3dCmpFunc */
385	SVGA3D_RS_CCWSTENCILFAIL = 59, /* SVGA3dStencilOp */
386	SVGA3D_RS_CCWSTENCILZFAIL = 60, /* SVGA3dStencilOp */
387	SVGA3D_RS_CCWSTENCILPASS = 61, /* SVGA3dStencilOp */
388	SVGA3D_RS_VERTEXBLEND = 62, /* SVGA3dVertexBlendFlags */
389	SVGA3D_RS_SLOPESCALEDEPTHBIAS = 63, /* float */
390	SVGA3D_RS_DEPTHBIAS = 64, /* float */
391
392
393	/*
394	* Output Gamma Level
395	*
396	* Output gamma effects the gamma curve of colors that are output from the
397	* rendering pipeline. A value of 1.0 specifies a linear color space. If the
398	* value is <= 0.0, gamma correction is ignored and linear color space is
399	* used.
400	*/
401
402	SVGA3D_RS_OUTPUTGAMMA = 65, /* float */
403	SVGA3D_RS_ZVISIBLE = 66, /* SVGA3dBool */
404	SVGA3D_RS_LASTPIXEL = 67, /* SVGA3dBool */
405	SVGA3D_RS_CLIPPING = 68, /* SVGA3dBool */
406	SVGA3D_RS_WRAP0 = 69, /* SVGA3dWrapFlags */
407	SVGA3D_RS_WRAP1 = 70, /* SVGA3dWrapFlags */
408	SVGA3D_RS_WRAP2 = 71, /* SVGA3dWrapFlags */
409	SVGA3D_RS_WRAP3 = 72, /* SVGA3dWrapFlags */
410	SVGA3D_RS_WRAP4 = 73, /* SVGA3dWrapFlags */
411	SVGA3D_RS_WRAP5 = 74, /* SVGA3dWrapFlags */
412	SVGA3D_RS_WRAP6 = 75, /* SVGA3dWrapFlags */
413	SVGA3D_RS_WRAP7 = 76, /* SVGA3dWrapFlags */
414	SVGA3D_RS_WRAP8 = 77, /* SVGA3dWrapFlags */
415	SVGA3D_RS_WRAP9 = 78, /* SVGA3dWrapFlags */
416	SVGA3D_RS_WRAP10 = 79, /* SVGA3dWrapFlags */
417	SVGA3D_RS_WRAP11 = 80, /* SVGA3dWrapFlags */
418	SVGA3D_RS_WRAP12 = 81, /* SVGA3dWrapFlags */
419	SVGA3D_RS_WRAP13 = 82, /* SVGA3dWrapFlags */
420	SVGA3D_RS_WRAP14 = 83, /* SVGA3dWrapFlags */
421	SVGA3D_RS_WRAP15 = 84, /* SVGA3dWrapFlags */
422	SVGA3D_RS_MULTISAMPLEANTIALIAS = 85, /* SVGA3dBool */
423	SVGA3D_RS_MULTISAMPLEMASK = 86, /* uint32_t */
424	SVGA3D_RS_INDEXEDVERTEXBLENDENABLE = 87, /* SVGA3dBool */
425	SVGA3D_RS_TWEENFACTOR = 88, /* float */
426	SVGA3D_RS_ANTIALIASEDLINEENABLE = 89, /* SVGA3dBool */
427	SVGA3D_RS_COLORWRITEENABLE1 = 90, /* SVGA3dColorMask */
428	SVGA3D_RS_COLORWRITEENABLE2 = 91, /* SVGA3dColorMask */
429	SVGA3D_RS_COLORWRITEENABLE3 = 92, /* SVGA3dColorMask */
430	SVGA3D_RS_SEPARATEALPHABLENDENABLE = 93, /* SVGA3dBool */
431	SVGA3D_RS_SRCBLENDALPHA = 94, /* SVGA3dBlendOp */
432	SVGA3D_RS_DSTBLENDALPHA = 95, /* SVGA3dBlendOp */
433	SVGA3D_RS_BLENDEQUATIONALPHA = 96, /* SVGA3dBlendEquation */
434	SVGA3D_RS_TRANSPARENCYANTIALIAS = 97, /* SVGA3dTransparencyAntialiasType */
435	SVGA3D_RS_LINEAA = 98, /* SVGA3dBool */
436	SVGA3D_RS_LINEWIDTH = 99, /* float */
437	SVGA3D_RS_MAX
438	} SVGA3dRenderStateName;
439
440	typedef enum {
441	SVGA3D_TRANSPARENCYANTIALIAS_NORMAL = 0,
442	SVGA3D_TRANSPARENCYANTIALIAS_ALPHATOCOVERAGE = 1,
443	SVGA3D_TRANSPARENCYANTIALIAS_SUPERSAMPLE = 2,
444	SVGA3D_TRANSPARENCYANTIALIAS_MAX
445	} SVGA3dTransparencyAntialiasType;
446
447	typedef enum {
448	SVGA3D_VERTEXMATERIAL_NONE = 0, /* Use the value in the current material */
449	SVGA3D_VERTEXMATERIAL_DIFFUSE = 1, /* Use the value in the diffuse component */
450	SVGA3D_VERTEXMATERIAL_SPECULAR = 2 /* Use the value in the specular component */
451	} SVGA3dVertexMaterial;
452
453	typedef enum {
454	SVGA3D_FILLMODE_INVALID = 0,
455	SVGA3D_FILLMODE_POINT = 1,
456	SVGA3D_FILLMODE_LINE = 2,
457	SVGA3D_FILLMODE_FILL = 3,
458	SVGA3D_FILLMODE_MAX
459	} SVGA3dFillModeType;
460
461
462	typedef
463	union {
464	struct {
465	uint16_t mode; /* SVGA3dFillModeType */
466	uint16_t face; /* SVGA3dFace */
467	} s;
468	uint32_t uintValue;
469	} SVGA3dFillMode;
470
471	typedef enum {
472	SVGA3D_SHADEMODE_INVALID = 0,
473	SVGA3D_SHADEMODE_FLAT = 1,
474	SVGA3D_SHADEMODE_SMOOTH = 2,
475	SVGA3D_SHADEMODE_PHONG = 3, /* Not supported */
476	SVGA3D_SHADEMODE_MAX
477	} SVGA3dShadeMode;
478
479	typedef
480	union {
481	struct {
482	uint16_t repeat;
483	uint16_t pattern;
484	} s;
485	uint32_t uintValue;
486	} SVGA3dLinePattern;
487
488	typedef enum {
489	SVGA3D_BLENDOP_INVALID = 0,
490	SVGA3D_BLENDOP_ZERO = 1,
491	SVGA3D_BLENDOP_ONE = 2,
492	SVGA3D_BLENDOP_SRCCOLOR = 3,
493	SVGA3D_BLENDOP_INVSRCCOLOR = 4,
494	SVGA3D_BLENDOP_SRCALPHA = 5,
495	SVGA3D_BLENDOP_INVSRCALPHA = 6,
496	SVGA3D_BLENDOP_DESTALPHA = 7,
497	SVGA3D_BLENDOP_INVDESTALPHA = 8,
498	SVGA3D_BLENDOP_DESTCOLOR = 9,
499	SVGA3D_BLENDOP_INVDESTCOLOR = 10,
500	SVGA3D_BLENDOP_SRCALPHASAT = 11,
501	SVGA3D_BLENDOP_BLENDFACTOR = 12,
502	SVGA3D_BLENDOP_INVBLENDFACTOR = 13,
503	SVGA3D_BLENDOP_MAX
504	} SVGA3dBlendOp;
505
506	typedef enum {
507	SVGA3D_BLENDEQ_INVALID = 0,
508	SVGA3D_BLENDEQ_ADD = 1,
509	SVGA3D_BLENDEQ_SUBTRACT = 2,
510	SVGA3D_BLENDEQ_REVSUBTRACT = 3,
511	SVGA3D_BLENDEQ_MINIMUM = 4,
512	SVGA3D_BLENDEQ_MAXIMUM = 5,
513	SVGA3D_BLENDEQ_MAX
514	} SVGA3dBlendEquation;
515
516	typedef enum {
517	SVGA3D_FRONTWINDING_INVALID = 0,
518	SVGA3D_FRONTWINDING_CW = 1,
519	SVGA3D_FRONTWINDING_CCW = 2,
520	SVGA3D_FRONTWINDING_MAX
521	} SVGA3dFrontWinding;
522
523	typedef enum {
524	SVGA3D_FACE_INVALID = 0,
525	SVGA3D_FACE_NONE = 1,
526	SVGA3D_FACE_FRONT = 2,
527	SVGA3D_FACE_BACK = 3,
528	SVGA3D_FACE_FRONT_BACK = 4,
529	SVGA3D_FACE_MAX
530	} SVGA3dFace;
531
532	/*
533	* The order and the values should not be changed
534	*/
535
536	typedef enum {
537	SVGA3D_CMP_INVALID = 0,
538	SVGA3D_CMP_NEVER = 1,
539	SVGA3D_CMP_LESS = 2,
540	SVGA3D_CMP_EQUAL = 3,
541	SVGA3D_CMP_LESSEQUAL = 4,
542	SVGA3D_CMP_GREATER = 5,
543	SVGA3D_CMP_NOTEQUAL = 6,
544	SVGA3D_CMP_GREATEREQUAL = 7,
545	SVGA3D_CMP_ALWAYS = 8,
546	SVGA3D_CMP_MAX
547	} SVGA3dCmpFunc;
548
549	/*
550	* SVGA3D_FOGFUNC_* specifies the fog equation, or PER_VERTEX which allows
551	* the fog factor to be specified in the alpha component of the specular
552	* (a.k.a. secondary) vertex color.
553	*/
554	typedef enum {
555	SVGA3D_FOGFUNC_INVALID = 0,
556	SVGA3D_FOGFUNC_EXP = 1,
557	SVGA3D_FOGFUNC_EXP2 = 2,
558	SVGA3D_FOGFUNC_LINEAR = 3,
559	SVGA3D_FOGFUNC_PER_VERTEX = 4
560	} SVGA3dFogFunction;
561
562	/*
563	* SVGA3D_FOGTYPE_* specifies if fog factors are computed on a per-vertex
564	* or per-pixel basis.
565	*/
566	typedef enum {
567	SVGA3D_FOGTYPE_INVALID = 0,
568	SVGA3D_FOGTYPE_VERTEX = 1,
569	SVGA3D_FOGTYPE_PIXEL = 2,
570	SVGA3D_FOGTYPE_MAX = 3
571	} SVGA3dFogType;
572
573	/*
574	* SVGA3D_FOGBASE_* selects depth or range-based fog. Depth-based fog is
575	* computed using the eye Z value of each pixel (or vertex), whereas range-
576	* based fog is computed using the actual distance (range) to the eye.
577	*/
578	typedef enum {
579	SVGA3D_FOGBASE_INVALID = 0,
580	SVGA3D_FOGBASE_DEPTHBASED = 1,
581	SVGA3D_FOGBASE_RANGEBASED = 2,
582	SVGA3D_FOGBASE_MAX = 3
583	} SVGA3dFogBase;
584
585	typedef enum {
586	SVGA3D_STENCILOP_INVALID = 0,
587	SVGA3D_STENCILOP_KEEP = 1,
588	SVGA3D_STENCILOP_ZERO = 2,
589	SVGA3D_STENCILOP_REPLACE = 3,
590	SVGA3D_STENCILOP_INCRSAT = 4,
591	SVGA3D_STENCILOP_DECRSAT = 5,
592	SVGA3D_STENCILOP_INVERT = 6,
593	SVGA3D_STENCILOP_INCR = 7,
594	SVGA3D_STENCILOP_DECR = 8,
595	SVGA3D_STENCILOP_MAX
596	} SVGA3dStencilOp;
597
598	typedef enum {
599	SVGA3D_CLIPPLANE_0 = (1 << 0),
600	SVGA3D_CLIPPLANE_1 = (1 << 1),
601	SVGA3D_CLIPPLANE_2 = (1 << 2),
602	SVGA3D_CLIPPLANE_3 = (1 << 3),
603	SVGA3D_CLIPPLANE_4 = (1 << 4),
604	SVGA3D_CLIPPLANE_5 = (1 << 5),
605	SVGA3D_CLIPPLANE_MAX = SVGA3D_CLIPPLANE_5
606	} SVGA3dClipPlanes;
607
608	typedef enum {
609	SVGA3D_CLEAR_COLOR = 0x1,
610	SVGA3D_CLEAR_DEPTH = 0x2,
611	SVGA3D_CLEAR_STENCIL = 0x4
612	} SVGA3dClearFlag;
613
614	typedef enum {
615	SVGA3D_RT_DEPTH = 0,
616	SVGA3D_RT_STENCIL = 1,
617	SVGA3D_RT_COLOR0 = 2,
618	SVGA3D_RT_COLOR1 = 3,
619	SVGA3D_RT_COLOR2 = 4,
620	SVGA3D_RT_COLOR3 = 5,
621	SVGA3D_RT_COLOR4 = 6,
622	SVGA3D_RT_COLOR5 = 7,
623	SVGA3D_RT_COLOR6 = 8,
624	SVGA3D_RT_COLOR7 = 9,
625	SVGA3D_RT_MAX,
626	SVGA3D_RT_INVALID = ((uint32_t)-1)
627	} SVGA3dRenderTargetType;
628
629	#define SVGA3D_MAX_RT_COLOR (SVGA3D_RT_COLOR7 - SVGA3D_RT_COLOR0 + 1)
630
631	typedef
632	union {
633	struct {
634	uint32_t red : 1;
635	uint32_t green : 1;
636	uint32_t blue : 1;
637	uint32_t alpha : 1;
638	} s;
639	uint32_t uintValue;
640	} SVGA3dColorMask;
641
642	typedef enum {
643	SVGA3D_VBLEND_DISABLE = 0,
644	SVGA3D_VBLEND_1WEIGHT = 1,
645	SVGA3D_VBLEND_2WEIGHT = 2,
646	SVGA3D_VBLEND_3WEIGHT = 3
647	} SVGA3dVertexBlendFlags;
648
649	typedef enum {
650	SVGA3D_WRAPCOORD_0 = 1 << 0,
651	SVGA3D_WRAPCOORD_1 = 1 << 1,
652	SVGA3D_WRAPCOORD_2 = 1 << 2,
653	SVGA3D_WRAPCOORD_3 = 1 << 3,
654	SVGA3D_WRAPCOORD_ALL = 0xF
655	} SVGA3dWrapFlags;
656
657	/*
658	* SVGA_3D_CMD_TEXTURESTATE Types. All value types
659	* must fit in a uint32_t.
660	*/
661
662	typedef enum {
663	SVGA3D_TS_INVALID = 0,
664	SVGA3D_TS_BIND_TEXTURE = 1, /* SVGA3dSurfaceId */
665	SVGA3D_TS_COLOROP = 2, /* SVGA3dTextureCombiner */
666	SVGA3D_TS_COLORARG1 = 3, /* SVGA3dTextureArgData */
667	SVGA3D_TS_COLORARG2 = 4, /* SVGA3dTextureArgData */
668	SVGA3D_TS_ALPHAOP = 5, /* SVGA3dTextureCombiner */
669	SVGA3D_TS_ALPHAARG1 = 6, /* SVGA3dTextureArgData */
670	SVGA3D_TS_ALPHAARG2 = 7, /* SVGA3dTextureArgData */
671	SVGA3D_TS_ADDRESSU = 8, /* SVGA3dTextureAddress */
672	SVGA3D_TS_ADDRESSV = 9, /* SVGA3dTextureAddress */
673	SVGA3D_TS_MIPFILTER = 10, /* SVGA3dTextureFilter */
674	SVGA3D_TS_MAGFILTER = 11, /* SVGA3dTextureFilter */
675	SVGA3D_TS_MINFILTER = 12, /* SVGA3dTextureFilter */
676	SVGA3D_TS_BORDERCOLOR = 13, /* SVGA3dColor */
677	SVGA3D_TS_TEXCOORDINDEX = 14, /* uint32_t */
678	SVGA3D_TS_TEXTURETRANSFORMFLAGS = 15, /* SVGA3dTexTransformFlags */
679	SVGA3D_TS_TEXCOORDGEN = 16, /* SVGA3dTextureCoordGen */
680	SVGA3D_TS_BUMPENVMAT00 = 17, /* float */
681	SVGA3D_TS_BUMPENVMAT01 = 18, /* float */
682	SVGA3D_TS_BUMPENVMAT10 = 19, /* float */
683	SVGA3D_TS_BUMPENVMAT11 = 20, /* float */
684	SVGA3D_TS_TEXTURE_MIPMAP_LEVEL = 21, /* uint32_t */
685	SVGA3D_TS_TEXTURE_LOD_BIAS = 22, /* float */
686	SVGA3D_TS_TEXTURE_ANISOTROPIC_LEVEL = 23, /* uint32_t */
687	SVGA3D_TS_ADDRESSW = 24, /* SVGA3dTextureAddress */
688
689
690	/*
691	* Sampler Gamma Level
692	*
693	* Sampler gamma effects the color of samples taken from the sampler. A
694	* value of 1.0 will produce linear samples. If the value is <= 0.0 the
695	* gamma value is ignored and a linear space is used.
696	*/
697
698	SVGA3D_TS_GAMMA = 25, /* float */
699	SVGA3D_TS_BUMPENVLSCALE = 26, /* float */
700	SVGA3D_TS_BUMPENVLOFFSET = 27, /* float */
701	SVGA3D_TS_COLORARG0 = 28, /* SVGA3dTextureArgData */
702	SVGA3D_TS_ALPHAARG0 = 29, /* SVGA3dTextureArgData */
703	SVGA3D_TS_MAX
704	} SVGA3dTextureStateName;
705
706	typedef enum {
707	SVGA3D_TC_INVALID = 0,
708	SVGA3D_TC_DISABLE = 1,
709	SVGA3D_TC_SELECTARG1 = 2,
710	SVGA3D_TC_SELECTARG2 = 3,
711	SVGA3D_TC_MODULATE = 4,
712	SVGA3D_TC_ADD = 5,
713	SVGA3D_TC_ADDSIGNED = 6,
714	SVGA3D_TC_SUBTRACT = 7,
715	SVGA3D_TC_BLENDTEXTUREALPHA = 8,
716	SVGA3D_TC_BLENDDIFFUSEALPHA = 9,
717	SVGA3D_TC_BLENDCURRENTALPHA = 10,
718	SVGA3D_TC_BLENDFACTORALPHA = 11,
719	SVGA3D_TC_MODULATE2X = 12,
720	SVGA3D_TC_MODULATE4X = 13,
721	SVGA3D_TC_DSDT = 14,
722	SVGA3D_TC_DOTPRODUCT3 = 15,
723	SVGA3D_TC_BLENDTEXTUREALPHAPM = 16,
724	SVGA3D_TC_ADDSIGNED2X = 17,
725	SVGA3D_TC_ADDSMOOTH = 18,
726	SVGA3D_TC_PREMODULATE = 19,
727	SVGA3D_TC_MODULATEALPHA_ADDCOLOR = 20,
728	SVGA3D_TC_MODULATECOLOR_ADDALPHA = 21,
729	SVGA3D_TC_MODULATEINVALPHA_ADDCOLOR = 22,
730	SVGA3D_TC_MODULATEINVCOLOR_ADDALPHA = 23,
731	SVGA3D_TC_BUMPENVMAPLUMINANCE = 24,
732	SVGA3D_TC_MULTIPLYADD = 25,
733	SVGA3D_TC_LERP = 26,
734	SVGA3D_TC_MAX
735	} SVGA3dTextureCombiner;
736
737	#define SVGA3D_TC_CAP_BIT(svga3d_tc_op) (svga3d_tc_op ? (1 << (svga3d_tc_op - 1)) : 0)
738
739	typedef enum {
740	SVGA3D_TEX_ADDRESS_INVALID = 0,
741	SVGA3D_TEX_ADDRESS_WRAP = 1,
742	SVGA3D_TEX_ADDRESS_MIRROR = 2,
743	SVGA3D_TEX_ADDRESS_CLAMP = 3,
744	SVGA3D_TEX_ADDRESS_BORDER = 4,
745	SVGA3D_TEX_ADDRESS_MIRRORONCE = 5,
746	SVGA3D_TEX_ADDRESS_EDGE = 6,
747	SVGA3D_TEX_ADDRESS_MAX
748	} SVGA3dTextureAddress;
749
750	/*
751	* SVGA3D_TEX_FILTER_NONE as the minification filter means mipmapping is
752	* disabled, and the rasterizer should use the magnification filter instead.
753	*/
754	typedef enum {
755	SVGA3D_TEX_FILTER_NONE = 0,
756	SVGA3D_TEX_FILTER_NEAREST = 1,
757	SVGA3D_TEX_FILTER_LINEAR = 2,
758	SVGA3D_TEX_FILTER_ANISOTROPIC = 3,
759	SVGA3D_TEX_FILTER_FLATCUBIC = 4, // Deprecated, not implemented
760	SVGA3D_TEX_FILTER_GAUSSIANCUBIC = 5, // Deprecated, not implemented
761	SVGA3D_TEX_FILTER_PYRAMIDALQUAD = 6, // Not currently implemented
762	SVGA3D_TEX_FILTER_GAUSSIANQUAD = 7, // Not currently implemented
763	SVGA3D_TEX_FILTER_MAX
764	} SVGA3dTextureFilter;
765
766	typedef enum {
767	SVGA3D_TEX_TRANSFORM_OFF = 0,
768	SVGA3D_TEX_TRANSFORM_S = (1 << 0),
769	SVGA3D_TEX_TRANSFORM_T = (1 << 1),
770	SVGA3D_TEX_TRANSFORM_R = (1 << 2),
771	SVGA3D_TEX_TRANSFORM_Q = (1 << 3),
772	SVGA3D_TEX_PROJECTED = (1 << 15)
773	} SVGA3dTexTransformFlags;
774
775	typedef enum {
776	SVGA3D_TEXCOORD_GEN_OFF = 0,
777	SVGA3D_TEXCOORD_GEN_EYE_POSITION = 1,
778	SVGA3D_TEXCOORD_GEN_EYE_NORMAL = 2,
779	SVGA3D_TEXCOORD_GEN_REFLECTIONVECTOR = 3,
780	SVGA3D_TEXCOORD_GEN_SPHERE = 4,
781	SVGA3D_TEXCOORD_GEN_MAX
782	} SVGA3dTextureCoordGen;
783
784	/*
785	* Texture argument constants for texture combiner
786	*/
787	typedef enum {
788	SVGA3D_TA_INVALID = 0,
789	SVGA3D_TA_CONSTANT = 1,
790	SVGA3D_TA_PREVIOUS = 2,
791	SVGA3D_TA_DIFFUSE = 3,
792	SVGA3D_TA_TEXTURE = 4,
793	SVGA3D_TA_SPECULAR = 5,
794	SVGA3D_TA_MAX
795	} SVGA3dTextureArgData;
796
797	#define SVGA3D_TM_MASK_LEN 4
798
799	/* Modifiers for texture argument constants defined above. */
800	typedef enum {
801	SVGA3D_TM_NONE = 0,
802	SVGA3D_TM_ALPHA = (1 << SVGA3D_TM_MASK_LEN),
803	SVGA3D_TM_ONE_MINUS = (2 << SVGA3D_TM_MASK_LEN)
804	} SVGA3dTextureArgModifier;
805
806	#define SVGA3D_INVALID_ID ((uint32_t)-1)
807	#define SVGA3D_MAX_CLIP_PLANES 6
808
809	/*
810	* This is the limit to the number of fixed-function texture
811	* transforms and texture coordinates we can support. It does not
812	* correspond to the number of texture image units (samplers) we
813	* support!
814	*/
815	#define SVGA3D_MAX_TEXTURE_COORDS 8
816
817	/*
818	* Vertex declarations
819	*
820	* Notes:
821	*
822	* SVGA3D_DECLUSAGE_POSITIONT is for pre-transformed vertices. If you
823	* draw with any POSITIONT vertex arrays, the programmable vertex
824	* pipeline will be implicitly disabled. Drawing will take place as if
825	* no vertex shader was bound.
826	*/
827
828	typedef enum {
829	SVGA3D_DECLUSAGE_POSITION = 0,
830	SVGA3D_DECLUSAGE_BLENDWEIGHT, // 1
831	SVGA3D_DECLUSAGE_BLENDINDICES, // 2
832	SVGA3D_DECLUSAGE_NORMAL, // 3
833	SVGA3D_DECLUSAGE_PSIZE, // 4
834	SVGA3D_DECLUSAGE_TEXCOORD, // 5
835	SVGA3D_DECLUSAGE_TANGENT, // 6
836	SVGA3D_DECLUSAGE_BINORMAL, // 7
837	SVGA3D_DECLUSAGE_TESSFACTOR, // 8
838	SVGA3D_DECLUSAGE_POSITIONT, // 9
839	SVGA3D_DECLUSAGE_COLOR, // 10
840	SVGA3D_DECLUSAGE_FOG, // 11
841	SVGA3D_DECLUSAGE_DEPTH, // 12
842	SVGA3D_DECLUSAGE_SAMPLE, // 13
843	SVGA3D_DECLUSAGE_MAX
844	} SVGA3dDeclUsage;
845
846	typedef enum {
847	SVGA3D_DECLMETHOD_DEFAULT = 0,
848	SVGA3D_DECLMETHOD_PARTIALU,
849	SVGA3D_DECLMETHOD_PARTIALV,
850	SVGA3D_DECLMETHOD_CROSSUV, // Normal
851	SVGA3D_DECLMETHOD_UV,
852	SVGA3D_DECLMETHOD_LOOKUP, // Lookup a displacement map
853	SVGA3D_DECLMETHOD_LOOKUPPRESAMPLED // Lookup a pre-sampled displacement map
854	} SVGA3dDeclMethod;
855
856	typedef enum {
857	SVGA3D_DECLTYPE_FLOAT1 = 0,
858	SVGA3D_DECLTYPE_FLOAT2 = 1,
859	SVGA3D_DECLTYPE_FLOAT3 = 2,
860	SVGA3D_DECLTYPE_FLOAT4 = 3,
861	SVGA3D_DECLTYPE_D3DCOLOR = 4,
862	SVGA3D_DECLTYPE_UBYTE4 = 5,
863	SVGA3D_DECLTYPE_SHORT2 = 6,
864	SVGA3D_DECLTYPE_SHORT4 = 7,
865	SVGA3D_DECLTYPE_UBYTE4N = 8,
866	SVGA3D_DECLTYPE_SHORT2N = 9,
867	SVGA3D_DECLTYPE_SHORT4N = 10,
868	SVGA3D_DECLTYPE_USHORT2N = 11,
869	SVGA3D_DECLTYPE_USHORT4N = 12,
870	SVGA3D_DECLTYPE_UDEC3 = 13,
871	SVGA3D_DECLTYPE_DEC3N = 14,
872	SVGA3D_DECLTYPE_FLOAT16_2 = 15,
873	SVGA3D_DECLTYPE_FLOAT16_4 = 16,
874	SVGA3D_DECLTYPE_MAX
875	} SVGA3dDeclType;
876
877	/*
878	* This structure is used for the divisor for geometry instancing;
879	* it's a direct translation of the Direct3D equivalent.
880	*/
881	typedef union {
882	struct {
883	/*
884	* For index data, this number represents the number of instances to draw.
885	* For instance data, this number represents the number of
886	* instances/vertex in this stream
887	*/
888	uint32_t count : 30;
889
890	/*
891	* This is 1 if this is supposed to be the data that is repeated for
892	* every instance.
893	*/
894	uint32_t indexedData : 1;
895
896	/*
897	* This is 1 if this is supposed to be the per-instance data.
898	*/
899	uint32_t instanceData : 1;
900	} s;
901
902	uint32_t value;
903	} SVGA3dVertexDivisor;
904
905	typedef enum {
906	SVGA3D_PRIMITIVE_INVALID = 0,
907	SVGA3D_PRIMITIVE_TRIANGLELIST = 1,
908	SVGA3D_PRIMITIVE_POINTLIST = 2,
909	SVGA3D_PRIMITIVE_LINELIST = 3,
910	SVGA3D_PRIMITIVE_LINESTRIP = 4,
911	SVGA3D_PRIMITIVE_TRIANGLESTRIP = 5,
912	SVGA3D_PRIMITIVE_TRIANGLEFAN = 6,
913	SVGA3D_PRIMITIVE_MAX
914	} SVGA3dPrimitiveType;
915
916	typedef enum {
917	SVGA3D_COORDINATE_INVALID = 0,
918	SVGA3D_COORDINATE_LEFTHANDED = 1,
919	SVGA3D_COORDINATE_RIGHTHANDED = 2,
920	SVGA3D_COORDINATE_MAX
921	} SVGA3dCoordinateType;
922
923	typedef enum {
924	SVGA3D_TRANSFORM_INVALID = 0,
925	SVGA3D_TRANSFORM_WORLD = 1,
926	SVGA3D_TRANSFORM_VIEW = 2,
927	SVGA3D_TRANSFORM_PROJECTION = 3,
928	SVGA3D_TRANSFORM_TEXTURE0 = 4,
929	SVGA3D_TRANSFORM_TEXTURE1 = 5,
930	SVGA3D_TRANSFORM_TEXTURE2 = 6,
931	SVGA3D_TRANSFORM_TEXTURE3 = 7,
932	SVGA3D_TRANSFORM_TEXTURE4 = 8,
933	SVGA3D_TRANSFORM_TEXTURE5 = 9,
934	SVGA3D_TRANSFORM_TEXTURE6 = 10,
935	SVGA3D_TRANSFORM_TEXTURE7 = 11,
936	SVGA3D_TRANSFORM_WORLD1 = 12,
937	SVGA3D_TRANSFORM_WORLD2 = 13,
938	SVGA3D_TRANSFORM_WORLD3 = 14,
939	SVGA3D_TRANSFORM_MAX
940	} SVGA3dTransformType;
941
942	typedef enum {
943	SVGA3D_LIGHTTYPE_INVALID = 0,
944	SVGA3D_LIGHTTYPE_POINT = 1,
945	SVGA3D_LIGHTTYPE_SPOT1 = 2, /* 1-cone, in degrees */
946	SVGA3D_LIGHTTYPE_SPOT2 = 3, /* 2-cone, in radians */
947	SVGA3D_LIGHTTYPE_DIRECTIONAL = 4,
948	SVGA3D_LIGHTTYPE_MAX
949	} SVGA3dLightType;
950
951	typedef enum {
952	SVGA3D_CUBEFACE_POSX = 0,
953	SVGA3D_CUBEFACE_NEGX = 1,
954	SVGA3D_CUBEFACE_POSY = 2,
955	SVGA3D_CUBEFACE_NEGY = 3,
956	SVGA3D_CUBEFACE_POSZ = 4,
957	SVGA3D_CUBEFACE_NEGZ = 5
958	} SVGA3dCubeFace;
959
960	typedef enum {
961	SVGA3D_SHADERTYPE_VS = 1,
962	SVGA3D_SHADERTYPE_PS = 2,
963	SVGA3D_SHADERTYPE_MAX
964	} SVGA3dShaderType;
965
966	typedef enum {
967	SVGA3D_CONST_TYPE_FLOAT = 0,
968	SVGA3D_CONST_TYPE_INT = 1,
969	SVGA3D_CONST_TYPE_BOOL = 2
970	} SVGA3dShaderConstType;
971
972	#define SVGA3D_MAX_SURFACE_FACES 6
973
974	typedef enum {
975	SVGA3D_STRETCH_BLT_POINT = 0,
976	SVGA3D_STRETCH_BLT_LINEAR = 1,
977	SVGA3D_STRETCH_BLT_MAX
978	} SVGA3dStretchBltMode;
979
980	typedef enum {
981	SVGA3D_QUERYTYPE_OCCLUSION = 0,
982	SVGA3D_QUERYTYPE_MAX
983	} SVGA3dQueryType;
984
985	typedef enum {
986	SVGA3D_QUERYSTATE_PENDING = 0, /* Waiting on the host (set by guest) */
987	SVGA3D_QUERYSTATE_SUCCEEDED = 1, /* Completed successfully (set by host) */
988	SVGA3D_QUERYSTATE_FAILED = 2, /* Completed unsuccessfully (set by host) */
989	SVGA3D_QUERYSTATE_NEW = 3 /* Never submitted (For guest use only) */
990	} SVGA3dQueryState;
991
992	typedef enum {
993	SVGA3D_WRITE_HOST_VRAM = 1,
994	SVGA3D_READ_HOST_VRAM = 2
995	} SVGA3dTransferType;
996
997	/*
998	* The maximum number of vertex arrays we're guaranteed to support in
999	* SVGA_3D_CMD_DRAWPRIMITIVES.
1000	*/
1001	#define SVGA3D_MAX_VERTEX_ARRAYS 32
1002
1003	/*
1004	* The maximum number of primitive ranges we're guaranteed to support
1005	* in SVGA_3D_CMD_DRAWPRIMITIVES.
1006	*/
1007	#define SVGA3D_MAX_DRAW_PRIMITIVE_RANGES 32
1008
1009	/*
1010	* Identifiers for commands in the command FIFO.
1011	*
1012	* IDs between 1000 and 1039 (inclusive) were used by obsolete versions of
1013	* the SVGA3D protocol and remain reserved; they should not be used in the
1014	* future.
1015	*
1016	* IDs between 1040 and 1999 (inclusive) are available for use by the
1017	* current SVGA3D protocol.
1018	*
1019	* FIFO clients other than SVGA3D should stay below 1000, or at 2000
1020	* and up.
1021	*/
1022
1023	#define SVGA_3D_CMD_LEGACY_BASE 1000
1024	#define SVGA_3D_CMD_BASE 1040
1025
1026	#define SVGA_3D_CMD_SURFACE_DEFINE SVGA_3D_CMD_BASE + 0 // Deprecated
1027	#define SVGA_3D_CMD_SURFACE_DESTROY SVGA_3D_CMD_BASE + 1
1028	#define SVGA_3D_CMD_SURFACE_COPY SVGA_3D_CMD_BASE + 2
1029	#define SVGA_3D_CMD_SURFACE_STRETCHBLT SVGA_3D_CMD_BASE + 3
1030	#define SVGA_3D_CMD_SURFACE_DMA SVGA_3D_CMD_BASE + 4
1031	#define SVGA_3D_CMD_CONTEXT_DEFINE SVGA_3D_CMD_BASE + 5
1032	#define SVGA_3D_CMD_CONTEXT_DESTROY SVGA_3D_CMD_BASE + 6
1033	#define SVGA_3D_CMD_SETTRANSFORM SVGA_3D_CMD_BASE + 7
1034	#define SVGA_3D_CMD_SETZRANGE SVGA_3D_CMD_BASE + 8
1035	#define SVGA_3D_CMD_SETRENDERSTATE SVGA_3D_CMD_BASE + 9
1036	#define SVGA_3D_CMD_SETRENDERTARGET SVGA_3D_CMD_BASE + 10
1037	#define SVGA_3D_CMD_SETTEXTURESTATE SVGA_3D_CMD_BASE + 11
1038	#define SVGA_3D_CMD_SETMATERIAL SVGA_3D_CMD_BASE + 12
1039	#define SVGA_3D_CMD_SETLIGHTDATA SVGA_3D_CMD_BASE + 13
1040	#define SVGA_3D_CMD_SETLIGHTENABLED SVGA_3D_CMD_BASE + 14
1041	#define SVGA_3D_CMD_SETVIEWPORT SVGA_3D_CMD_BASE + 15
1042	#define SVGA_3D_CMD_SETCLIPPLANE SVGA_3D_CMD_BASE + 16
1043	#define SVGA_3D_CMD_CLEAR SVGA_3D_CMD_BASE + 17
1044	#define SVGA_3D_CMD_PRESENT SVGA_3D_CMD_BASE + 18 // Deprecated
1045	#define SVGA_3D_CMD_SHADER_DEFINE SVGA_3D_CMD_BASE + 19
1046	#define SVGA_3D_CMD_SHADER_DESTROY SVGA_3D_CMD_BASE + 20
1047	#define SVGA_3D_CMD_SET_SHADER SVGA_3D_CMD_BASE + 21
1048	#define SVGA_3D_CMD_SET_SHADER_CONST SVGA_3D_CMD_BASE + 22
1049	#define SVGA_3D_CMD_DRAW_PRIMITIVES SVGA_3D_CMD_BASE + 23
1050	#define SVGA_3D_CMD_SETSCISSORRECT SVGA_3D_CMD_BASE + 24
1051	#define SVGA_3D_CMD_BEGIN_QUERY SVGA_3D_CMD_BASE + 25
1052	#define SVGA_3D_CMD_END_QUERY SVGA_3D_CMD_BASE + 26
1053	#define SVGA_3D_CMD_WAIT_FOR_QUERY SVGA_3D_CMD_BASE + 27
1054	#define SVGA_3D_CMD_PRESENT_READBACK SVGA_3D_CMD_BASE + 28 // Deprecated
1055	#define SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN SVGA_3D_CMD_BASE + 29
1056	#define SVGA_3D_CMD_SURFACE_DEFINE_V2 SVGA_3D_CMD_BASE + 30
1057	#define SVGA_3D_CMD_GENERATE_MIPMAPS SVGA_3D_CMD_BASE + 31
1058	#define SVGA_3D_CMD_ACTIVATE_SURFACE SVGA_3D_CMD_BASE + 40
1059	#define SVGA_3D_CMD_DEACTIVATE_SURFACE SVGA_3D_CMD_BASE + 41
1060	#define SVGA_3D_CMD_MAX SVGA_3D_CMD_BASE + 42
1061
1062	#define SVGA_3D_CMD_FUTURE_MAX 2000
1063
1064	/*
1065	* Common substructures used in multiple FIFO commands:
1066	*/
1067
1068	typedef struct {
1069	union {
1070	struct {
1071	uint16_t function; // SVGA3dFogFunction
1072	uint8_t type; // SVGA3dFogType
1073	uint8_t base; // SVGA3dFogBase
1074	} s;
1075	uint32_t uintValue;
1076	};
1077	} SVGA3dFogMode;
1078
1079	/*
1080	* Uniquely identify one image (a 1D/2D/3D array) from a surface. This
1081	* is a surface ID as well as face/mipmap indices.
1082	*/
1083
1084	typedef
1085	struct SVGA3dSurfaceImageId {
1086	uint32_t sid;
1087	uint32_t face;
1088	uint32_t mipmap;
1089	} SVGA3dSurfaceImageId;
1090
1091	typedef
1092	struct SVGA3dGuestImage {
1093	SVGAGuestPtr ptr;
1094
1095	/*
1096	* A note on interpretation of pitch: This value of pitch is the
1097	* number of bytes between vertically adjacent image
1098	* blocks. Normally this is the number of bytes between the first
1099	* pixel of two adjacent scanlines. With compressed textures,
1100	* however, this may represent the number of bytes between
1101	* compression blocks rather than between rows of pixels.
1102	*
1103	* XXX: Compressed textures currently must be tightly packed in guest memory.
1104	*
1105	* If the image is 1-dimensional, pitch is ignored.
1106	*
1107	* If 'pitch' is zero, the SVGA3D device calculates a pitch value
1108	* assuming each row of blocks is tightly packed.
1109	*/
1110	uint32_t pitch;
1111	} SVGA3dGuestImage;
1112
1113
1114	/*
1115	* FIFO command format definitions:
1116	*/
1117
1118	/*
1119	* The data size header following cmdNum for every 3d command
1120	*/
1121	typedef
1122	struct {
1123	/* uint32_t id; duplicate*/
1124	uint32_t size;
1125	} SVGA3dCmdHeader;
1126
1127	/*
1128	* A surface is a hierarchy of host VRAM surfaces: 1D, 2D, or 3D, with
1129	* optional mipmaps and cube faces.
1130	*/
1131
1132	typedef
1133	struct {
1134	uint32_t width;
1135	uint32_t height;
1136	uint32_t depth;
1137	} SVGA3dSize;
1138
1139	typedef enum {
1140	SVGA3D_SURFACE_CUBEMAP = (1 << 0),
1141	SVGA3D_SURFACE_HINT_STATIC = (1 << 1),
1142	SVGA3D_SURFACE_HINT_DYNAMIC = (1 << 2),
1143	SVGA3D_SURFACE_HINT_INDEXBUFFER = (1 << 3),
1144	SVGA3D_SURFACE_HINT_VERTEXBUFFER = (1 << 4),
1145	SVGA3D_SURFACE_HINT_TEXTURE = (1 << 5),
1146	SVGA3D_SURFACE_HINT_RENDERTARGET = (1 << 6),
1147	SVGA3D_SURFACE_HINT_DEPTHSTENCIL = (1 << 7),
1148	SVGA3D_SURFACE_HINT_WRITEONLY = (1 << 8),
1149	SVGA3D_SURFACE_MASKABLE_ANTIALIAS = (1 << 9),
1150	SVGA3D_SURFACE_AUTOGENMIPMAPS = (1 << 10)
1151	} SVGA3dSurfaceFlags;
1152
1153	typedef
1154	struct {
1155	uint32_t numMipLevels;
1156	} SVGA3dSurfaceFace;
1157
1158	typedef
1159	struct {
1160	uint32_t sid;
1161	SVGA3dSurfaceFlags surfaceFlags;
1162	SVGA3dSurfaceFormat format;
1163	/*
1164	* If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
1165	* structures must have the same value of numMipLevels field.
1166	* Otherwise, all but the first SVGA3dSurfaceFace structures must have the
1167	* numMipLevels set to 0.
1168	*/
1169	SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
1170	/*
1171	* Followed by an SVGA3dSize structure for each mip level in each face.
1172	*
1173	* A note on surface sizes: Sizes are always specified in pixels,
1174	* even if the true surface size is not a multiple of the minimum
1175	* block size of the surface's format. For example, a 3x3x1 DXT1
1176	* compressed texture would actually be stored as a 4x4x1 image in
1177	* memory.
1178	*/
1179	} SVGA3dCmdDefineSurface; /* SVGA_3D_CMD_SURFACE_DEFINE */
1180
1181	typedef
1182	struct {
1183	uint32_t sid;
1184	SVGA3dSurfaceFlags surfaceFlags;
1185	SVGA3dSurfaceFormat format;
1186	/*
1187	* If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
1188	* structures must have the same value of numMipLevels field.
1189	* Otherwise, all but the first SVGA3dSurfaceFace structures must have the
1190	* numMipLevels set to 0.
1191	*/
1192	SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
1193	uint32_t multisampleCount;
1194	SVGA3dTextureFilter autogenFilter;
1195	/*
1196	* Followed by an SVGA3dSize structure for each mip level in each face.
1197	*
1198	* A note on surface sizes: Sizes are always specified in pixels,
1199	* even if the true surface size is not a multiple of the minimum
1200	* block size of the surface's format. For example, a 3x3x1 DXT1
1201	* compressed texture would actually be stored as a 4x4x1 image in
1202	* memory.
1203	*/
1204	} SVGA3dCmdDefineSurface_v2; /* SVGA_3D_CMD_SURFACE_DEFINE_V2 */
1205
1206	typedef
1207	struct {
1208	uint32_t sid;
1209	} SVGA3dCmdDestroySurface; /* SVGA_3D_CMD_SURFACE_DESTROY */
1210
1211	typedef
1212	struct {
1213	uint32_t cid;
1214	} SVGA3dCmdDefineContext; /* SVGA_3D_CMD_CONTEXT_DEFINE */
1215
1216	typedef
1217	struct {
1218	uint32_t cid;
1219	} SVGA3dCmdDestroyContext; /* SVGA_3D_CMD_CONTEXT_DESTROY */
1220
1221	typedef
1222	struct {
1223	uint32_t cid;
1224	SVGA3dClearFlag clearFlag;
1225	uint32_t color;
1226	float depth;
1227	uint32_t stencil;
1228	/* Followed by variable number of SVGA3dRect structures */
1229	} SVGA3dCmdClear; /* SVGA_3D_CMD_CLEAR */
1230
1231	typedef
1232	struct SVGA3dCopyRect {
1233	uint32_t x;
1234	uint32_t y;
1235	uint32_t w;
1236	uint32_t h;
1237	uint32_t srcx;
1238	uint32_t srcy;
1239	} SVGA3dCopyRect;
1240
1241	typedef
1242	struct SVGA3dCopyBox {
1243	uint32_t x;
1244	uint32_t y;
1245	uint32_t z;
1246	uint32_t w;
1247	uint32_t h;
1248	uint32_t d;
1249	uint32_t srcx;
1250	uint32_t srcy;
1251	uint32_t srcz;
1252	} SVGA3dCopyBox;
1253
1254	typedef
1255	struct {
1256	uint32_t x;
1257	uint32_t y;
1258	uint32_t w;
1259	uint32_t h;
1260	} SVGA3dRect;
1261
1262	typedef
1263	struct {
1264	uint32_t x;
1265	uint32_t y;
1266	uint32_t z;
1267	uint32_t w;
1268	uint32_t h;
1269	uint32_t d;
1270	} SVGA3dBox;
1271
1272	typedef
1273	struct {
1274	uint32_t x;
1275	uint32_t y;
1276	uint32_t z;
1277	} SVGA3dPoint;
1278
1279	typedef
1280	struct {
1281	SVGA3dLightType type;
1282	SVGA3dBool inWorldSpace;
1283	float diffuse[4];
1284	float specular[4];
1285	float ambient[4];
1286	float position[4];
1287	float direction[4];
1288	float range;
1289	float falloff;
1290	float attenuation0;
1291	float attenuation1;
1292	float attenuation2;
1293	float theta;
1294	float phi;
1295	} SVGA3dLightData;
1296
1297	typedef
1298	struct {
1299	uint32_t sid;
1300	/* Followed by variable number of SVGA3dCopyRect structures */
1301	} SVGA3dCmdPresent; /* SVGA_3D_CMD_PRESENT */
1302
1303	typedef
1304	struct {
1305	SVGA3dRenderStateName state;
1306	union {
1307	uint32_t uintValue;
1308	float floatValue;
1309	};
1310	} SVGA3dRenderState;
1311
1312	typedef
1313	struct {
1314	uint32_t cid;
1315	/* Followed by variable number of SVGA3dRenderState structures */
1316	} SVGA3dCmdSetRenderState; /* SVGA_3D_CMD_SETRENDERSTATE */
1317
1318	typedef
1319	struct {
1320	uint32_t cid;
1321	SVGA3dRenderTargetType type;
1322	SVGA3dSurfaceImageId target;
1323	} SVGA3dCmdSetRenderTarget; /* SVGA_3D_CMD_SETRENDERTARGET */
1324
1325	typedef
1326	struct {
1327	SVGA3dSurfaceImageId src;
1328	SVGA3dSurfaceImageId dest;
1329	/* Followed by variable number of SVGA3dCopyBox structures */
1330	} SVGA3dCmdSurfaceCopy; /* SVGA_3D_CMD_SURFACE_COPY */
1331
1332	typedef
1333	struct {
1334	SVGA3dSurfaceImageId src;
1335	SVGA3dSurfaceImageId dest;
1336	SVGA3dBox boxSrc;
1337	SVGA3dBox boxDest;
1338	SVGA3dStretchBltMode mode;
1339	} SVGA3dCmdSurfaceStretchBlt; /* SVGA_3D_CMD_SURFACE_STRETCHBLT */
1340
1341	typedef
1342	struct {
1343	/*
1344	* If the discard flag is present in a surface DMA operation, the host may
1345	* discard the contents of the current mipmap level and face of the target
1346	* surface before applying the surface DMA contents.
1347	*/
1348	uint32_t discard : 1;
1349
1350	/*
1351	* If the unsynchronized flag is present, the host may perform this upload
1352	* without syncing to pending reads on this surface.
1353	*/
1354	uint32_t unsynchronized : 1;
1355
1356	/*
1357	* Guests MUST set the reserved bits to 0 before submitting the command
1358	* suffix as future flags may occupy these bits.
1359	*/
1360	uint32_t reserved : 30;
1361	} SVGA3dSurfaceDMAFlags;
1362
1363	typedef
1364	struct {
1365	SVGA3dGuestImage guest;
1366	SVGA3dSurfaceImageId host;
1367	SVGA3dTransferType transfer;
1368	/*
1369	* Followed by variable number of SVGA3dCopyBox structures. For consistency
1370	* in all clipping logic and coordinate translation, we define the
1371	* "source" in each copyBox as the guest image and the
1372	* "destination" as the host image, regardless of transfer
1373	* direction.
1374	*
1375	* For efficiency, the SVGA3D device is free to copy more data than
1376	* specified. For example, it may round copy boxes outwards such
1377	* that they lie on particular alignment boundaries.
1378	*/
1379	} SVGA3dCmdSurfaceDMA; /* SVGA_3D_CMD_SURFACE_DMA */
1380
1381	/*
1382	* SVGA3dCmdSurfaceDMASuffix --
1383	*
1384	* This is a command suffix that will appear after a SurfaceDMA command in
1385	* the FIFO. It contains some extra information that hosts may use to
1386	* optimize performance or protect the guest. This suffix exists to preserve
1387	* backwards compatibility while also allowing for new functionality to be
1388	* implemented.
1389	*/
1390
1391	typedef
1392	struct {
1393	uint32_t suffixSize;
1394
1395	/*
1396	* The maximum offset is used to determine the maximum offset from the
1397	* guestPtr base address that will be accessed or written to during this
1398	* surfaceDMA. If the suffix is supported, the host will respect this
1399	* boundary while performing surface DMAs.
1400	*
1401	* Defaults to MAX_uint32_t
1402	*/
1403	uint32_t maximumOffset;
1404
1405	/*
1406	* A set of flags that describes optimizations that the host may perform
1407	* while performing this surface DMA operation. The guest should never rely
1408	* on behaviour that is different when these flags are set for correctness.
1409	*
1410	* Defaults to 0
1411	*/
1412	SVGA3dSurfaceDMAFlags flags;
1413	} SVGA3dCmdSurfaceDMASuffix;
1414
1415	/*
1416	* SVGA_3D_CMD_DRAW_PRIMITIVES --
1417	*
1418	* This command is the SVGA3D device's generic drawing entry point.
1419	* It can draw multiple ranges of primitives, optionally using an
1420	* index buffer, using an arbitrary collection of vertex buffers.
1421	*
1422	* Each SVGA3dVertexDecl defines a distinct vertex array to bind
1423	* during this draw call. The declarations specify which surface
1424	* the vertex data lives in, what that vertex data is used for,
1425	* and how to interpret it.
1426	*
1427	* Each SVGA3dPrimitiveRange defines a collection of primitives
1428	* to render using the same vertex arrays. An index buffer is
1429	* optional.
1430	*/
1431
1432	typedef
1433	struct {
1434	/*
1435	* A range hint is an optional specification for the range of indices
1436	* in an SVGA3dArray that will be used. If 'last' is zero, it is assumed
1437	* that the entire array will be used.
1438	*
1439	* These are only hints. The SVGA3D device may use them for
1440	* performance optimization if possible, but it's also allowed to
1441	* ignore these values.
1442	*/
1443	uint32_t first;
1444	uint32_t last;
1445	} SVGA3dArrayRangeHint;
1446
1447	typedef
1448	struct {
1449	/*
1450	* Define the origin and shape of a vertex or index array. Both
1451	* 'offset' and 'stride' are in bytes. The provided surface will be
1452	* reinterpreted as a flat array of bytes in the same format used
1453	* by surface DMA operations. To avoid unnecessary conversions, the
1454	* surface should be created with the SVGA3D_BUFFER format.
1455	*
1456	* Index 0 in the array starts 'offset' bytes into the surface.
1457	* Index 1 begins at byte 'offset + stride', etc. Array indices may
1458	* not be negative.
1459	*/
1460	uint32_t surfaceId;
1461	uint32_t offset;
1462	uint32_t stride;
1463	} SVGA3dArray;
1464
1465	typedef
1466	struct {
1467	/*
1468	* Describe a vertex array's data type, and define how it is to be
1469	* used by the fixed function pipeline or the vertex shader. It
1470	* isn't useful to have two VertexDecls with the same
1471	* VertexArrayIdentity in one draw call.
1472	*/
1473	SVGA3dDeclType type;
1474	SVGA3dDeclMethod method;
1475	SVGA3dDeclUsage usage;
1476	uint32_t usageIndex;
1477	} SVGA3dVertexArrayIdentity;
1478
1479	typedef
1480	struct {
1481	SVGA3dVertexArrayIdentity identity;
1482	SVGA3dArray array;
1483	SVGA3dArrayRangeHint rangeHint;
1484	} SVGA3dVertexDecl;
1485
1486	typedef
1487	struct {
1488	/*
1489	* Define a group of primitives to render, from sequential indices.
1490	*
1491	* The value of 'primitiveType' and 'primitiveCount' imply the
1492	* total number of vertices that will be rendered.
1493	*/
1494	SVGA3dPrimitiveType primType;
1495	uint32_t primitiveCount;
1496
1497	/*
1498	* Optional index buffer. If indexArray.surfaceId is
1499	* SVGA3D_INVALID_ID, we render without an index buffer. Rendering
1500	* without an index buffer is identical to rendering with an index
1501	* buffer containing the sequence [0, 1, 2, 3, ...].
1502	*
1503	* If an index buffer is in use, indexWidth specifies the width in
1504	* bytes of each index value. It must be less than or equal to
1505	* indexArray.stride.
1506	*
1507	* (Currently, the SVGA3D device requires index buffers to be tightly
1508	* packed. In other words, indexWidth == indexArray.stride)
1509	*/
1510	SVGA3dArray indexArray;
1511	uint32_t indexWidth;
1512
1513	/*
1514	* Optional index bias. This number is added to all indices from
1515	* indexArray before they are used as vertex array indices. This
1516	* can be used in multiple ways:
1517	*
1518	* - When not using an indexArray, this bias can be used to
1519	* specify where in the vertex arrays to begin rendering.
1520	*
1521	* - A positive number here is equivalent to increasing the
1522	* offset in each vertex array.
1523	*
1524	* - A negative number can be used to render using a small
1525	* vertex array and an index buffer that contains large
1526	* values. This may be used by some applications that
1527	* crop a vertex buffer without modifying their index
1528	* buffer.
1529	*
1530	* Note that rendering with a negative bias value may be slower and
1531	* use more memory than rendering with a positive or zero bias.
1532	*/
1533	int32_t indexBias;
1534	} SVGA3dPrimitiveRange;
1535
1536	typedef
1537	struct {
1538	uint32_t cid;
1539	uint32_t numVertexDecls;
1540	uint32_t numRanges;
1541
1542	/*
1543	* There are two variable size arrays after the
1544	* SVGA3dCmdDrawPrimitives structure. In order,
1545	* they are:
1546	*
1547	* 1. SVGA3dVertexDecl, quantity 'numVertexDecls', but no more than
1548	* SVGA3D_MAX_VERTEX_ARRAYS;
1549	* 2. SVGA3dPrimitiveRange, quantity 'numRanges', but no more than
1550	* SVGA3D_MAX_DRAW_PRIMITIVE_RANGES;
1551	* 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains
1552	* the frequency divisor for the corresponding vertex decl).
1553	*/
1554	} SVGA3dCmdDrawPrimitives; /* SVGA_3D_CMD_DRAWPRIMITIVES */
1555
1556	typedef
1557	struct {
1558	uint32_t stage;
1559	SVGA3dTextureStateName name;
1560	union {
1561	uint32_t value;
1562	float floatValue;
1563	};
1564	} SVGA3dTextureState;
1565
1566	typedef
1567	struct {
1568	uint32_t cid;
1569	/* Followed by variable number of SVGA3dTextureState structures */
1570	} SVGA3dCmdSetTextureState; /* SVGA_3D_CMD_SETTEXTURESTATE */
1571
1572	typedef
1573	struct {
1574	uint32_t cid;
1575	SVGA3dTransformType type;
1576	float matrix[16];
1577	} SVGA3dCmdSetTransform; /* SVGA_3D_CMD_SETTRANSFORM */
1578
1579	typedef
1580	struct {
1581	float min;
1582	float max;
1583	} SVGA3dZRange;
1584
1585	typedef
1586	struct {
1587	uint32_t cid;
1588	SVGA3dZRange zRange;
1589	} SVGA3dCmdSetZRange; /* SVGA_3D_CMD_SETZRANGE */
1590
1591	typedef
1592	struct {
1593	float diffuse[4];
1594	float ambient[4];
1595	float specular[4];
1596	float emissive[4];
1597	float shininess;
1598	} SVGA3dMaterial;
1599
1600	typedef
1601	struct {
1602	uint32_t cid;
1603	SVGA3dFace face;
1604	SVGA3dMaterial material;
1605	} SVGA3dCmdSetMaterial; /* SVGA_3D_CMD_SETMATERIAL */
1606
1607	typedef
1608	struct {
1609	uint32_t cid;
1610	uint32_t index;
1611	SVGA3dLightData data;
1612	} SVGA3dCmdSetLightData; /* SVGA_3D_CMD_SETLIGHTDATA */
1613
1614	typedef
1615	struct {
1616	uint32_t cid;
1617	uint32_t index;
1618	uint32_t enabled;
1619	} SVGA3dCmdSetLightEnabled; /* SVGA_3D_CMD_SETLIGHTENABLED */
1620
1621	typedef
1622	struct {
1623	uint32_t cid;
1624	SVGA3dRect rect;
1625	} SVGA3dCmdSetViewport; /* SVGA_3D_CMD_SETVIEWPORT */
1626
1627	typedef
1628	struct {
1629	uint32_t cid;
1630	SVGA3dRect rect;
1631	} SVGA3dCmdSetScissorRect; /* SVGA_3D_CMD_SETSCISSORRECT */
1632
1633	typedef
1634	struct {
1635	uint32_t cid;
1636	uint32_t index;
1637	float plane[4];
1638	} SVGA3dCmdSetClipPlane; /* SVGA_3D_CMD_SETCLIPPLANE */
1639
1640	typedef
1641	struct {
1642	uint32_t cid;
1643	uint32_t shid;
1644	SVGA3dShaderType type;
1645	/* Followed by variable number of DWORDs for shader bycode */
1646	} SVGA3dCmdDefineShader; /* SVGA_3D_CMD_SHADER_DEFINE */
1647
1648	typedef
1649	struct {
1650	uint32_t cid;
1651	uint32_t shid;
1652	SVGA3dShaderType type;
1653	} SVGA3dCmdDestroyShader; /* SVGA_3D_CMD_SHADER_DESTROY */
1654
1655	typedef
1656	struct {
1657	uint32_t cid;
1658	uint32_t reg; /* register number */
1659	SVGA3dShaderType type;
1660	SVGA3dShaderConstType ctype;
1661	uint32_t values[4];
1662	} SVGA3dCmdSetShaderConst; /* SVGA_3D_CMD_SET_SHADER_CONST */
1663
1664	typedef
1665	struct {
1666	uint32_t cid;
1667	SVGA3dShaderType type;
1668	uint32_t shid;
1669	} SVGA3dCmdSetShader; /* SVGA_3D_CMD_SET_SHADER */
1670
1671	typedef
1672	struct {
1673	uint32_t cid;
1674	SVGA3dQueryType type;
1675	} SVGA3dCmdBeginQuery; /* SVGA_3D_CMD_BEGIN_QUERY */
1676
1677	typedef
1678	struct {
1679	uint32_t cid;
1680	SVGA3dQueryType type;
1681	SVGAGuestPtr guestResult; /* Points to an SVGA3dQueryResult structure */
1682	} SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */
1683
1684	typedef
1685	struct {
1686	uint32_t cid; /* Same parameters passed to END_QUERY */
1687	SVGA3dQueryType type;
1688	SVGAGuestPtr guestResult;
1689	} SVGA3dCmdWaitForQuery; /* SVGA_3D_CMD_WAIT_FOR_QUERY */
1690
1691	typedef
1692	struct {
1693	uint32_t totalSize; /* Set by guest before query is ended. */
1694	SVGA3dQueryState state; /* Set by host or guest. See SVGA3dQueryState. */
1695	union { /* Set by host on exit from PENDING state */
1696	uint32_t result32;
1697	};
1698	} SVGA3dQueryResult;
1699
1700	/*
1701	* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN --
1702	*
1703	* This is a blit from an SVGA3D surface to a Screen Object. Just
1704	* like GMR-to-screen blits, this blit may be directed at a
1705	* specific screen or to the virtual coordinate space.
1706	*
1707	* The blit copies from a rectangular region of an SVGA3D surface
1708	* image to a rectangular region of a screen or screens.
1709	*
1710	* This command takes an optional variable-length list of clipping
1711	* rectangles after the body of the command. If no rectangles are
1712	* specified, there is no clipping region. The entire destRect is
1713	* drawn to. If one or more rectangles are included, they describe
1714	* a clipping region. The clip rectangle coordinates are measured
1715	* relative to the top-left corner of destRect.
1716	*
1717	* This clipping region serves multiple purposes:
1718	*
1719	* - It can be used to perform an irregularly shaped blit more
1720	* efficiently than by issuing many separate blit commands.
1721	*
1722	* - It is equivalent to allowing blits with non-integer
1723	* source coordinates. You could blit just one half-pixel
1724	* of a source, for example, by specifying a larger
1725	* destination rectangle than you need, then removing
1726	* part of it using a clip rectangle.
1727	*
1728	* Availability:
1729	* SVGA_FIFO_CAP_SCREEN_OBJECT
1730	*
1731	* Limitations:
1732	*
1733	* - Currently, no backend supports blits from a mipmap or face
1734	* other than the first one.
1735	*/
1736
1737	typedef
1738	struct {
1739	SVGA3dSurfaceImageId srcImage;
1740	SVGASignedRect srcRect;
1741	uint32_t destScreenId; /* Screen ID or SVGA_ID_INVALID for virt. coords */
1742	SVGASignedRect destRect; /* Supports scaling if src/rest different size */
1743	/* Clipping: zero or more SVGASignedRects follow */
1744	} SVGA3dCmdBlitSurfaceToScreen; /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */
1745
1746	typedef
1747	struct {
1748	uint32_t sid;
1749	SVGA3dTextureFilter filter;
1750	} SVGA3dCmdGenerateMipmaps; /* SVGA_3D_CMD_GENERATE_MIPMAPS */
1751
1752
1753	/*
1754	* Capability query index.
1755	*
1756	* Notes:
1757	*
1758	* 1. SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of
1759	* fixed-function texture units available. Each of these units
1760	* work in both FFP and Shader modes, and they support texture
1761	* transforms and texture coordinates. The host may have additional
1762	* texture image units that are only usable with shaders.
1763	*
1764	* 2. The BUFFER_FORMAT capabilities are deprecated, and they always
1765	* return TRUE. Even on physical hardware that does not support
1766	* these formats natively, the SVGA3D device will provide an emulation
1767	* which should be invisible to the guest OS.
1768	*
1769	* In general, the SVGA3D device should support any operation on
1770	* any surface format, it just may perform some of these
1771	* operations in software depending on the capabilities of the
1772	* available physical hardware.
1773	*
1774	* XXX: In the future, we will add capabilities that describe in
1775	* detail what formats are supported in hardware for what kinds
1776	* of operations.
1777	*/
1778
1779	typedef enum {
1780	SVGA3D_DEVCAP_3D = 0,
1781	SVGA3D_DEVCAP_MAX_LIGHTS = 1,
1782	SVGA3D_DEVCAP_MAX_TEXTURES = 2, /* See note (1) */
1783	SVGA3D_DEVCAP_MAX_CLIP_PLANES = 3,
1784	SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = 4,
1785	SVGA3D_DEVCAP_VERTEX_SHADER = 5,
1786	SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = 6,
1787	SVGA3D_DEVCAP_FRAGMENT_SHADER = 7,
1788	SVGA3D_DEVCAP_MAX_RENDER_TARGETS = 8,
1789	SVGA3D_DEVCAP_S23E8_TEXTURES = 9,
1790	SVGA3D_DEVCAP_S10E5_TEXTURES = 10,
1791	SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = 11,
1792	SVGA3D_DEVCAP_D16_BUFFER_FORMAT = 12, /* See note (2) */
1793	SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = 13, /* See note (2) */
1794	SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = 14, /* See note (2) */
1795	SVGA3D_DEVCAP_QUERY_TYPES = 15,
1796	SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = 16,
1797	SVGA3D_DEVCAP_MAX_POINT_SIZE = 17,
1798	SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = 18,
1799	SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = 19,
1800	SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = 20,
1801	SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = 21,
1802	SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = 22,
1803	SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = 23,
1804	SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = 24,
1805	SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = 25,
1806	SVGA3D_DEVCAP_MAX_VERTEX_INDEX = 26,
1807	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = 27,
1808	SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = 28,
1809	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = 29,
1810	SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = 30,
1811	SVGA3D_DEVCAP_TEXTURE_OPS = 31,
1812	SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = 32,
1813	SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = 33,
1814	SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = 34,
1815	SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = 35,
1816	SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = 36,
1817	SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = 37,
1818	SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = 38,
1819	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = 39,
1820	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = 40,
1821	SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = 41,
1822	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = 42,
1823	SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = 43,
1824	SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = 44,
1825	SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = 45,
1826	SVGA3D_DEVCAP_SURFACEFMT_DXT1 = 46,
1827	SVGA3D_DEVCAP_SURFACEFMT_DXT2 = 47,
1828	SVGA3D_DEVCAP_SURFACEFMT_DXT3 = 48,
1829	SVGA3D_DEVCAP_SURFACEFMT_DXT4 = 49,
1830	SVGA3D_DEVCAP_SURFACEFMT_DXT5 = 50,
1831	SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = 51,
1832	SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = 52,
1833	SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = 53,
1834	SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = 54,
1835	SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = 55,
1836	SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = 56,
1837	SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = 57,
1838	SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = 58,
1839	SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = 59,
1840	SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = 60,
1841	SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = 61,
1842	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = 63,
1843
1844	/*
1845	* Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color
1846	* render targets. This does no include the depth or stencil targets.
1847	*/
1848	SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = 64,
1849
1850	SVGA3D_DEVCAP_SURFACEFMT_V16U16 = 65,
1851	SVGA3D_DEVCAP_SURFACEFMT_G16R16 = 66,
1852	SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = 67,
1853	SVGA3D_DEVCAP_SURFACEFMT_UYVY = 68,
1854	SVGA3D_DEVCAP_SURFACEFMT_YUY2 = 69,
1855	SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES = 70,
1856	SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES = 71,
1857	SVGA3D_DEVCAP_ALPHATOCOVERAGE = 72,
1858	SVGA3D_DEVCAP_SUPERSAMPLE = 73,
1859	SVGA3D_DEVCAP_AUTOGENMIPMAPS = 74,
1860	SVGA3D_DEVCAP_SURFACEFMT_NV12 = 75,
1861	SVGA3D_DEVCAP_SURFACEFMT_AYUV = 76,
1862
1863	/*
1864	* This is the maximum number of SVGA context IDs that the guest
1865	* can define using SVGA_3D_CMD_CONTEXT_DEFINE.
1866	*/
1867	SVGA3D_DEVCAP_MAX_CONTEXT_IDS = 77,
1868
1869	/*
1870	* This is the maximum number of SVGA surface IDs that the guest
1871	* can define using SVGA_3D_CMD_SURFACE_DEFINE*.
1872	*/
1873	SVGA3D_DEVCAP_MAX_SURFACE_IDS = 78,
1874
1875	SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 = 79,
1876	SVGA3D_DEVCAP_SURFACEFMT_Z_DF24 = 80,
1877	SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT = 81,
1878
1879	SVGA3D_DEVCAP_SURFACEFMT_BC4_UNORM = 82,
1880	SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM = 83,
1881
1882	/*
1883	* Don't add new caps into the previous section; the values in this
1884	* enumeration must not change. You can put new values right before
1885	* SVGA3D_DEVCAP_MAX.
1886	*/
1887	SVGA3D_DEVCAP_MAX /* This must be the last index. */
1888	} SVGA3dDevCapIndex;
1889
1890	typedef union {
1891	bool b;
1892	uint32_t u;
1893	int32_t i;
1894	float f;
1895	} SVGA3dDevCapResult;
1896
1897	#endif /* _SVGA3D_REG_H_ */

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