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source: vbox/trunk/src/VBox/Devices/Graphics/vmsvga/svga3d_reg.h@ 69163

最後變更 在這個檔案從69163是 69163,由 vboxsync 提交於 7 年 前

Devices/Graphics: VMSVGA: texture and sampler states.
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1/**********************************************************
2 * Copyright 1998-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26/*
27 * svga3d_reg.h --
28 *
29 * SVGA 3D hardware definitions
30 */
31
32#ifndef _SVGA3D_REG_H_
33#define _SVGA3D_REG_H_
34
35#include "svga_reg.h"
36
37
38/*
39 * 3D Hardware Version
40 *
41 * The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo
42 * register. Is set by the host and read by the guest. This lets
43 * us make new guest drivers which are backwards-compatible with old
44 * SVGA hardware revisions. It does not let us support old guest
45 * drivers. Good enough for now.
46 *
47 */
48
49#define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
50#define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16)
51#define SVGA3D_MINOR_HWVERSION(version) ((version) & 0xFF)
52
53typedef enum {
54 SVGA3D_HWVERSION_WS5_RC1 = SVGA3D_MAKE_HWVERSION(0, 1),
55 SVGA3D_HWVERSION_WS5_RC2 = SVGA3D_MAKE_HWVERSION(0, 2),
56 SVGA3D_HWVERSION_WS51_RC1 = SVGA3D_MAKE_HWVERSION(0, 3),
57 SVGA3D_HWVERSION_WS6_B1 = SVGA3D_MAKE_HWVERSION(1, 1),
58 SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),
59 SVGA3D_HWVERSION_WS65_B1 = SVGA3D_MAKE_HWVERSION(2, 0),
60 SVGA3D_HWVERSION_WS8_B1 = SVGA3D_MAKE_HWVERSION(2, 1),
61 SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS8_B1
62} SVGA3dHardwareVersion;
63
64/*
65 * Generic Types
66 */
67
68typedef uint32_t SVGA3dBool; /* 32-bit Bool definition */
69#define SVGA3D_NUM_CLIPPLANES 6
70#define SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS 8
71#define SVGA3D_MAX_CONTEXT_IDS 256
72#define SVGA3D_MAX_SURFACE_IDS (32 * 1024)
73
74/*
75 * Surface formats.
76 *
77 * If you modify this list, be sure to keep GLUtil.c in sync. It
78 * includes the internal format definition of each surface in
79 * GLUtil_ConvertSurfaceFormat, and it contains a table of
80 * human-readable names in GLUtil_GetFormatName.
81 */
82
83typedef enum SVGA3dSurfaceFormat {
84 SVGA3D_FORMAT_INVALID = 0,
85
86 SVGA3D_X8R8G8B8 = 1,
87 SVGA3D_A8R8G8B8 = 2,
88
89 SVGA3D_R5G6B5 = 3,
90 SVGA3D_X1R5G5B5 = 4,
91 SVGA3D_A1R5G5B5 = 5,
92 SVGA3D_A4R4G4B4 = 6,
93
94 SVGA3D_Z_D32 = 7,
95 SVGA3D_Z_D16 = 8,
96 SVGA3D_Z_D24S8 = 9,
97 SVGA3D_Z_D15S1 = 10,
98
99 SVGA3D_LUMINANCE8 = 11,
100 SVGA3D_LUMINANCE4_ALPHA4 = 12,
101 SVGA3D_LUMINANCE16 = 13,
102 SVGA3D_LUMINANCE8_ALPHA8 = 14,
103
104 SVGA3D_DXT1 = 15,
105 SVGA3D_DXT2 = 16,
106 SVGA3D_DXT3 = 17,
107 SVGA3D_DXT4 = 18,
108 SVGA3D_DXT5 = 19,
109
110 SVGA3D_BUMPU8V8 = 20,
111 SVGA3D_BUMPL6V5U5 = 21,
112 SVGA3D_BUMPX8L8V8U8 = 22,
113 SVGA3D_BUMPL8V8U8 = 23,
114
115 SVGA3D_ARGB_S10E5 = 24, /* 16-bit floating-point ARGB */
116 SVGA3D_ARGB_S23E8 = 25, /* 32-bit floating-point ARGB */
117
118 SVGA3D_A2R10G10B10 = 26,
119
120 /* signed formats */
121 SVGA3D_V8U8 = 27,
122 SVGA3D_Q8W8V8U8 = 28,
123 SVGA3D_CxV8U8 = 29,
124
125 /* mixed formats */
126 SVGA3D_X8L8V8U8 = 30,
127 SVGA3D_A2W10V10U10 = 31,
128
129 SVGA3D_ALPHA8 = 32,
130
131 /* Single- and dual-component floating point formats */
132 SVGA3D_R_S10E5 = 33,
133 SVGA3D_R_S23E8 = 34,
134 SVGA3D_RG_S10E5 = 35,
135 SVGA3D_RG_S23E8 = 36,
136
137 /*
138 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
139 * the most efficient format to use when creating new surfaces
140 * expressly for index or vertex data.
141 */
142
143 SVGA3D_BUFFER = 37,
144
145 SVGA3D_Z_D24X8 = 38,
146
147 SVGA3D_V16U16 = 39,
148
149 SVGA3D_G16R16 = 40,
150 SVGA3D_A16B16G16R16 = 41,
151
152 /* Packed Video formats */
153 SVGA3D_UYVY = 42,
154 SVGA3D_YUY2 = 43,
155
156 /* Planar video formats */
157 SVGA3D_NV12 = 44,
158
159 /* Video format with alpha */
160 SVGA3D_AYUV = 45,
161
162 SVGA3D_BC4_UNORM = 108,
163 SVGA3D_BC5_UNORM = 111,
164
165 /* Advanced D3D9 depth formats. */
166 SVGA3D_Z_DF16 = 118,
167 SVGA3D_Z_DF24 = 119,
168 SVGA3D_Z_D24S8_INT = 120,
169
170 SVGA3D_R8G8B8A8_SNORM = 127, ///@todo use headers from newer Mesa
171 SVGA3D_R16G16_UNORM = 129, ///@todo use headers from newer Mesa
172
173 SVGA3D_FORMAT_MAX
174} SVGA3dSurfaceFormat;
175
176typedef uint32_t SVGA3dColor; /* a, r, g, b */
177
178/*
179 * These match the D3DFORMAT_OP definitions used by Direct3D. We need
180 * them so that we can query the host for what the supported surface
181 * operations are (when we're using the D3D backend, in particular),
182 * and so we can send those operations to the guest.
183 */
184typedef enum {
185 SVGA3DFORMAT_OP_TEXTURE = 0x00000001,
186 SVGA3DFORMAT_OP_VOLUMETEXTURE = 0x00000002,
187 SVGA3DFORMAT_OP_CUBETEXTURE = 0x00000004,
188 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET = 0x00000008,
189 SVGA3DFORMAT_OP_SAME_FORMAT_RENDERTARGET = 0x00000010,
190 SVGA3DFORMAT_OP_ZSTENCIL = 0x00000040,
191 SVGA3DFORMAT_OP_ZSTENCIL_WITH_ARBITRARY_COLOR_DEPTH = 0x00000080,
192
193/*
194 * This format can be used as a render target if the current display mode
195 * is the same depth if the alpha channel is ignored. e.g. if the device
196 * can render to A8R8G8B8 when the display mode is X8R8G8B8, then the
197 * format op list entry for A8R8G8B8 should have this cap.
198 */
199 SVGA3DFORMAT_OP_SAME_FORMAT_UP_TO_ALPHA_RENDERTARGET = 0x00000100,
200
201/*
202 * This format contains DirectDraw support (including Flip). This flag
203 * should not to be set on alpha formats.
204 */
205 SVGA3DFORMAT_OP_DISPLAYMODE = 0x00000400,
206
207/*
208 * The rasterizer can support some level of Direct3D support in this format
209 * and implies that the driver can create a Context in this mode (for some
210 * render target format). When this flag is set, the SVGA3DFORMAT_OP_DISPLAYMODE
211 * flag must also be set.
212 */
213 SVGA3DFORMAT_OP_3DACCELERATION = 0x00000800,
214
215/*
216 * This is set for a private format when the driver has put the bpp in
217 * the structure.
218 */
219 SVGA3DFORMAT_OP_PIXELSIZE = 0x00001000,
220
221/*
222 * Indicates that this format can be converted to any RGB format for which
223 * SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB is specified
224 */
225 SVGA3DFORMAT_OP_CONVERT_TO_ARGB = 0x00002000,
226
227/*
228 * Indicates that this format can be used to create offscreen plain surfaces.
229 */
230 SVGA3DFORMAT_OP_OFFSCREENPLAIN = 0x00004000,
231
232/*
233 * Indicated that this format can be read as an SRGB texture (meaning that the
234 * sampler will linearize the looked up data)
235 */
236 SVGA3DFORMAT_OP_SRGBREAD = 0x00008000,
237
238/*
239 * Indicates that this format can be used in the bumpmap instructions
240 */
241 SVGA3DFORMAT_OP_BUMPMAP = 0x00010000,
242
243/*
244 * Indicates that this format can be sampled by the displacement map sampler
245 */
246 SVGA3DFORMAT_OP_DMAP = 0x00020000,
247
248/*
249 * Indicates that this format cannot be used with texture filtering
250 */
251 SVGA3DFORMAT_OP_NOFILTER = 0x00040000,
252
253/*
254 * Indicates that format conversions are supported to this RGB format if
255 * SVGA3DFORMAT_OP_CONVERT_TO_ARGB is specified in the source format.
256 */
257 SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB = 0x00080000,
258
259/*
260 * Indicated that this format can be written as an SRGB target (meaning that the
261 * pixel pipe will DE-linearize data on output to format)
262 */
263 SVGA3DFORMAT_OP_SRGBWRITE = 0x00100000,
264
265/*
266 * Indicates that this format cannot be used with alpha blending
267 */
268 SVGA3DFORMAT_OP_NOALPHABLEND = 0x00200000,
269
270/*
271 * Indicates that the device can auto-generated sublevels for resources
272 * of this format
273 */
274 SVGA3DFORMAT_OP_AUTOGENMIPMAP = 0x00400000,
275
276/*
277 * Indicates that this format can be used by vertex texture sampler
278 */
279 SVGA3DFORMAT_OP_VERTEXTEXTURE = 0x00800000,
280
281/*
282 * Indicates that this format supports neither texture coordinate wrap
283 * modes, nor mipmapping
284 */
285 SVGA3DFORMAT_OP_NOTEXCOORDWRAPNORMIP = 0x01000000
286} SVGA3dFormatOp;
287
288/*
289 * This structure is a conversion of SVGA3DFORMAT_OP_*.
290 * Entries must be located at the same position.
291 */
292typedef union {
293 uint32_t value;
294 struct {
295 uint32_t texture : 1;
296 uint32_t volumeTexture : 1;
297 uint32_t cubeTexture : 1;
298 uint32_t offscreenRenderTarget : 1;
299 uint32_t sameFormatRenderTarget : 1;
300 uint32_t unknown1 : 1;
301 uint32_t zStencil : 1;
302 uint32_t zStencilArbitraryDepth : 1;
303 uint32_t sameFormatUpToAlpha : 1;
304 uint32_t unknown2 : 1;
305 uint32_t displayMode : 1;
306 uint32_t acceleration3d : 1;
307 uint32_t pixelSize : 1;
308 uint32_t convertToARGB : 1;
309 uint32_t offscreenPlain : 1;
310 uint32_t sRGBRead : 1;
311 uint32_t bumpMap : 1;
312 uint32_t dmap : 1;
313 uint32_t noFilter : 1;
314 uint32_t memberOfGroupARGB : 1;
315 uint32_t sRGBWrite : 1;
316 uint32_t noAlphaBlend : 1;
317 uint32_t autoGenMipMap : 1;
318 uint32_t vertexTexture : 1;
319 uint32_t noTexCoordWrapNorMip : 1;
320 } s;
321} SVGA3dSurfaceFormatCaps;
322
323/*
324 * SVGA_3D_CMD_SETRENDERSTATE Types. All value types
325 * must fit in a uint32_t.
326 */
327
328typedef enum {
329 SVGA3D_RS_INVALID = 0,
330 SVGA3D_RS_ZENABLE = 1, /* SVGA3dBool */
331 SVGA3D_RS_ZWRITEENABLE = 2, /* SVGA3dBool */
332 SVGA3D_RS_ALPHATESTENABLE = 3, /* SVGA3dBool */
333 SVGA3D_RS_DITHERENABLE = 4, /* SVGA3dBool */
334 SVGA3D_RS_BLENDENABLE = 5, /* SVGA3dBool */
335 SVGA3D_RS_FOGENABLE = 6, /* SVGA3dBool */
336 SVGA3D_RS_SPECULARENABLE = 7, /* SVGA3dBool */
337 SVGA3D_RS_STENCILENABLE = 8, /* SVGA3dBool */
338 SVGA3D_RS_LIGHTINGENABLE = 9, /* SVGA3dBool */
339 SVGA3D_RS_NORMALIZENORMALS = 10, /* SVGA3dBool */
340 SVGA3D_RS_POINTSPRITEENABLE = 11, /* SVGA3dBool */
341 SVGA3D_RS_POINTSCALEENABLE = 12, /* SVGA3dBool */
342 SVGA3D_RS_STENCILREF = 13, /* uint32_t */
343 SVGA3D_RS_STENCILMASK = 14, /* uint32_t */
344 SVGA3D_RS_STENCILWRITEMASK = 15, /* uint32_t */
345 SVGA3D_RS_FOGSTART = 16, /* float */
346 SVGA3D_RS_FOGEND = 17, /* float */
347 SVGA3D_RS_FOGDENSITY = 18, /* float */
348 SVGA3D_RS_POINTSIZE = 19, /* float */
349 SVGA3D_RS_POINTSIZEMIN = 20, /* float */
350 SVGA3D_RS_POINTSIZEMAX = 21, /* float */
351 SVGA3D_RS_POINTSCALE_A = 22, /* float */
352 SVGA3D_RS_POINTSCALE_B = 23, /* float */
353 SVGA3D_RS_POINTSCALE_C = 24, /* float */
354 SVGA3D_RS_FOGCOLOR = 25, /* SVGA3dColor */
355 SVGA3D_RS_AMBIENT = 26, /* SVGA3dColor */
356 SVGA3D_RS_CLIPPLANEENABLE = 27, /* SVGA3dClipPlanes */
357 SVGA3D_RS_FOGMODE = 28, /* SVGA3dFogMode */
358 SVGA3D_RS_FILLMODE = 29, /* SVGA3dFillMode */
359 SVGA3D_RS_SHADEMODE = 30, /* SVGA3dShadeMode */
360 SVGA3D_RS_LINEPATTERN = 31, /* SVGA3dLinePattern */
361 SVGA3D_RS_SRCBLEND = 32, /* SVGA3dBlendOp */
362 SVGA3D_RS_DSTBLEND = 33, /* SVGA3dBlendOp */
363 SVGA3D_RS_BLENDEQUATION = 34, /* SVGA3dBlendEquation */
364 SVGA3D_RS_CULLMODE = 35, /* SVGA3dFace */
365 SVGA3D_RS_ZFUNC = 36, /* SVGA3dCmpFunc */
366 SVGA3D_RS_ALPHAFUNC = 37, /* SVGA3dCmpFunc */
367 SVGA3D_RS_STENCILFUNC = 38, /* SVGA3dCmpFunc */
368 SVGA3D_RS_STENCILFAIL = 39, /* SVGA3dStencilOp */
369 SVGA3D_RS_STENCILZFAIL = 40, /* SVGA3dStencilOp */
370 SVGA3D_RS_STENCILPASS = 41, /* SVGA3dStencilOp */
371 SVGA3D_RS_ALPHAREF = 42, /* float (0.0 .. 1.0) */
372 SVGA3D_RS_FRONTWINDING = 43, /* SVGA3dFrontWinding */
373 SVGA3D_RS_COORDINATETYPE = 44, /* SVGA3dCoordinateType */
374 SVGA3D_RS_ZBIAS = 45, /* float */
375 SVGA3D_RS_RANGEFOGENABLE = 46, /* SVGA3dBool */
376 SVGA3D_RS_COLORWRITEENABLE = 47, /* SVGA3dColorMask */
377 SVGA3D_RS_VERTEXMATERIALENABLE = 48, /* SVGA3dBool */
378 SVGA3D_RS_DIFFUSEMATERIALSOURCE = 49, /* SVGA3dVertexMaterial */
379 SVGA3D_RS_SPECULARMATERIALSOURCE = 50, /* SVGA3dVertexMaterial */
380 SVGA3D_RS_AMBIENTMATERIALSOURCE = 51, /* SVGA3dVertexMaterial */
381 SVGA3D_RS_EMISSIVEMATERIALSOURCE = 52, /* SVGA3dVertexMaterial */
382 SVGA3D_RS_TEXTUREFACTOR = 53, /* SVGA3dColor */
383 SVGA3D_RS_LOCALVIEWER = 54, /* SVGA3dBool */
384 SVGA3D_RS_SCISSORTESTENABLE = 55, /* SVGA3dBool */
385 SVGA3D_RS_BLENDCOLOR = 56, /* SVGA3dColor */
386 SVGA3D_RS_STENCILENABLE2SIDED = 57, /* SVGA3dBool */
387 SVGA3D_RS_CCWSTENCILFUNC = 58, /* SVGA3dCmpFunc */
388 SVGA3D_RS_CCWSTENCILFAIL = 59, /* SVGA3dStencilOp */
389 SVGA3D_RS_CCWSTENCILZFAIL = 60, /* SVGA3dStencilOp */
390 SVGA3D_RS_CCWSTENCILPASS = 61, /* SVGA3dStencilOp */
391 SVGA3D_RS_VERTEXBLEND = 62, /* SVGA3dVertexBlendFlags */
392 SVGA3D_RS_SLOPESCALEDEPTHBIAS = 63, /* float */
393 SVGA3D_RS_DEPTHBIAS = 64, /* float */
394
395
396 /*
397 * Output Gamma Level
398 *
399 * Output gamma effects the gamma curve of colors that are output from the
400 * rendering pipeline. A value of 1.0 specifies a linear color space. If the
401 * value is <= 0.0, gamma correction is ignored and linear color space is
402 * used.
403 */
404
405 SVGA3D_RS_OUTPUTGAMMA = 65, /* float */
406 SVGA3D_RS_ZVISIBLE = 66, /* SVGA3dBool */
407 SVGA3D_RS_LASTPIXEL = 67, /* SVGA3dBool */
408 SVGA3D_RS_CLIPPING = 68, /* SVGA3dBool */
409 SVGA3D_RS_WRAP0 = 69, /* SVGA3dWrapFlags */
410 SVGA3D_RS_WRAP1 = 70, /* SVGA3dWrapFlags */
411 SVGA3D_RS_WRAP2 = 71, /* SVGA3dWrapFlags */
412 SVGA3D_RS_WRAP3 = 72, /* SVGA3dWrapFlags */
413 SVGA3D_RS_WRAP4 = 73, /* SVGA3dWrapFlags */
414 SVGA3D_RS_WRAP5 = 74, /* SVGA3dWrapFlags */
415 SVGA3D_RS_WRAP6 = 75, /* SVGA3dWrapFlags */
416 SVGA3D_RS_WRAP7 = 76, /* SVGA3dWrapFlags */
417 SVGA3D_RS_WRAP8 = 77, /* SVGA3dWrapFlags */
418 SVGA3D_RS_WRAP9 = 78, /* SVGA3dWrapFlags */
419 SVGA3D_RS_WRAP10 = 79, /* SVGA3dWrapFlags */
420 SVGA3D_RS_WRAP11 = 80, /* SVGA3dWrapFlags */
421 SVGA3D_RS_WRAP12 = 81, /* SVGA3dWrapFlags */
422 SVGA3D_RS_WRAP13 = 82, /* SVGA3dWrapFlags */
423 SVGA3D_RS_WRAP14 = 83, /* SVGA3dWrapFlags */
424 SVGA3D_RS_WRAP15 = 84, /* SVGA3dWrapFlags */
425 SVGA3D_RS_MULTISAMPLEANTIALIAS = 85, /* SVGA3dBool */
426 SVGA3D_RS_MULTISAMPLEMASK = 86, /* uint32_t */
427 SVGA3D_RS_INDEXEDVERTEXBLENDENABLE = 87, /* SVGA3dBool */
428 SVGA3D_RS_TWEENFACTOR = 88, /* float */
429 SVGA3D_RS_ANTIALIASEDLINEENABLE = 89, /* SVGA3dBool */
430 SVGA3D_RS_COLORWRITEENABLE1 = 90, /* SVGA3dColorMask */
431 SVGA3D_RS_COLORWRITEENABLE2 = 91, /* SVGA3dColorMask */
432 SVGA3D_RS_COLORWRITEENABLE3 = 92, /* SVGA3dColorMask */
433 SVGA3D_RS_SEPARATEALPHABLENDENABLE = 93, /* SVGA3dBool */
434 SVGA3D_RS_SRCBLENDALPHA = 94, /* SVGA3dBlendOp */
435 SVGA3D_RS_DSTBLENDALPHA = 95, /* SVGA3dBlendOp */
436 SVGA3D_RS_BLENDEQUATIONALPHA = 96, /* SVGA3dBlendEquation */
437 SVGA3D_RS_TRANSPARENCYANTIALIAS = 97, /* SVGA3dTransparencyAntialiasType */
438 SVGA3D_RS_LINEAA = 98, /* SVGA3dBool */
439 SVGA3D_RS_LINEWIDTH = 99, /* float */
440 SVGA3D_RS_MAX
441} SVGA3dRenderStateName;
442
443typedef enum {
444 SVGA3D_TRANSPARENCYANTIALIAS_NORMAL = 0,
445 SVGA3D_TRANSPARENCYANTIALIAS_ALPHATOCOVERAGE = 1,
446 SVGA3D_TRANSPARENCYANTIALIAS_SUPERSAMPLE = 2,
447 SVGA3D_TRANSPARENCYANTIALIAS_MAX
448} SVGA3dTransparencyAntialiasType;
449
450typedef enum {
451 SVGA3D_VERTEXMATERIAL_NONE = 0, /* Use the value in the current material */
452 SVGA3D_VERTEXMATERIAL_DIFFUSE = 1, /* Use the value in the diffuse component */
453 SVGA3D_VERTEXMATERIAL_SPECULAR = 2 /* Use the value in the specular component */
454} SVGA3dVertexMaterial;
455
456typedef enum {
457 SVGA3D_FILLMODE_INVALID = 0,
458 SVGA3D_FILLMODE_POINT = 1,
459 SVGA3D_FILLMODE_LINE = 2,
460 SVGA3D_FILLMODE_FILL = 3,
461 SVGA3D_FILLMODE_MAX
462} SVGA3dFillModeType;
463
464
465typedef
466union {
467 struct {
468 uint16_t mode; /* SVGA3dFillModeType */
469 uint16_t face; /* SVGA3dFace */
470 } s;
471 uint32_t uintValue;
472} SVGA3dFillMode;
473
474typedef enum {
475 SVGA3D_SHADEMODE_INVALID = 0,
476 SVGA3D_SHADEMODE_FLAT = 1,
477 SVGA3D_SHADEMODE_SMOOTH = 2,
478 SVGA3D_SHADEMODE_PHONG = 3, /* Not supported */
479 SVGA3D_SHADEMODE_MAX
480} SVGA3dShadeMode;
481
482typedef
483union {
484 struct {
485 uint16_t repeat;
486 uint16_t pattern;
487 } s;
488 uint32_t uintValue;
489} SVGA3dLinePattern;
490
491typedef enum {
492 SVGA3D_BLENDOP_INVALID = 0,
493 SVGA3D_BLENDOP_ZERO = 1,
494 SVGA3D_BLENDOP_ONE = 2,
495 SVGA3D_BLENDOP_SRCCOLOR = 3,
496 SVGA3D_BLENDOP_INVSRCCOLOR = 4,
497 SVGA3D_BLENDOP_SRCALPHA = 5,
498 SVGA3D_BLENDOP_INVSRCALPHA = 6,
499 SVGA3D_BLENDOP_DESTALPHA = 7,
500 SVGA3D_BLENDOP_INVDESTALPHA = 8,
501 SVGA3D_BLENDOP_DESTCOLOR = 9,
502 SVGA3D_BLENDOP_INVDESTCOLOR = 10,
503 SVGA3D_BLENDOP_SRCALPHASAT = 11,
504 SVGA3D_BLENDOP_BLENDFACTOR = 12,
505 SVGA3D_BLENDOP_INVBLENDFACTOR = 13,
506 SVGA3D_BLENDOP_MAX
507} SVGA3dBlendOp;
508
509typedef enum {
510 SVGA3D_BLENDEQ_INVALID = 0,
511 SVGA3D_BLENDEQ_ADD = 1,
512 SVGA3D_BLENDEQ_SUBTRACT = 2,
513 SVGA3D_BLENDEQ_REVSUBTRACT = 3,
514 SVGA3D_BLENDEQ_MINIMUM = 4,
515 SVGA3D_BLENDEQ_MAXIMUM = 5,
516 SVGA3D_BLENDEQ_MAX
517} SVGA3dBlendEquation;
518
519typedef enum {
520 SVGA3D_FRONTWINDING_INVALID = 0,
521 SVGA3D_FRONTWINDING_CW = 1,
522 SVGA3D_FRONTWINDING_CCW = 2,
523 SVGA3D_FRONTWINDING_MAX
524} SVGA3dFrontWinding;
525
526typedef enum {
527 SVGA3D_FACE_INVALID = 0,
528 SVGA3D_FACE_NONE = 1,
529 SVGA3D_FACE_FRONT = 2,
530 SVGA3D_FACE_BACK = 3,
531 SVGA3D_FACE_FRONT_BACK = 4,
532 SVGA3D_FACE_MAX
533} SVGA3dFace;
534
535/*
536 * The order and the values should not be changed
537 */
538
539typedef enum {
540 SVGA3D_CMP_INVALID = 0,
541 SVGA3D_CMP_NEVER = 1,
542 SVGA3D_CMP_LESS = 2,
543 SVGA3D_CMP_EQUAL = 3,
544 SVGA3D_CMP_LESSEQUAL = 4,
545 SVGA3D_CMP_GREATER = 5,
546 SVGA3D_CMP_NOTEQUAL = 6,
547 SVGA3D_CMP_GREATEREQUAL = 7,
548 SVGA3D_CMP_ALWAYS = 8,
549 SVGA3D_CMP_MAX
550} SVGA3dCmpFunc;
551
552/*
553 * SVGA3D_FOGFUNC_* specifies the fog equation, or PER_VERTEX which allows
554 * the fog factor to be specified in the alpha component of the specular
555 * (a.k.a. secondary) vertex color.
556 */
557typedef enum {
558 SVGA3D_FOGFUNC_INVALID = 0,
559 SVGA3D_FOGFUNC_EXP = 1,
560 SVGA3D_FOGFUNC_EXP2 = 2,
561 SVGA3D_FOGFUNC_LINEAR = 3,
562 SVGA3D_FOGFUNC_PER_VERTEX = 4
563} SVGA3dFogFunction;
564
565/*
566 * SVGA3D_FOGTYPE_* specifies if fog factors are computed on a per-vertex
567 * or per-pixel basis.
568 */
569typedef enum {
570 SVGA3D_FOGTYPE_INVALID = 0,
571 SVGA3D_FOGTYPE_VERTEX = 1,
572 SVGA3D_FOGTYPE_PIXEL = 2,
573 SVGA3D_FOGTYPE_MAX = 3
574} SVGA3dFogType;
575
576/*
577 * SVGA3D_FOGBASE_* selects depth or range-based fog. Depth-based fog is
578 * computed using the eye Z value of each pixel (or vertex), whereas range-
579 * based fog is computed using the actual distance (range) to the eye.
580 */
581typedef enum {
582 SVGA3D_FOGBASE_INVALID = 0,
583 SVGA3D_FOGBASE_DEPTHBASED = 1,
584 SVGA3D_FOGBASE_RANGEBASED = 2,
585 SVGA3D_FOGBASE_MAX = 3
586} SVGA3dFogBase;
587
588typedef enum {
589 SVGA3D_STENCILOP_INVALID = 0,
590 SVGA3D_STENCILOP_KEEP = 1,
591 SVGA3D_STENCILOP_ZERO = 2,
592 SVGA3D_STENCILOP_REPLACE = 3,
593 SVGA3D_STENCILOP_INCRSAT = 4,
594 SVGA3D_STENCILOP_DECRSAT = 5,
595 SVGA3D_STENCILOP_INVERT = 6,
596 SVGA3D_STENCILOP_INCR = 7,
597 SVGA3D_STENCILOP_DECR = 8,
598 SVGA3D_STENCILOP_MAX
599} SVGA3dStencilOp;
600
601typedef enum {
602 SVGA3D_CLIPPLANE_0 = (1 << 0),
603 SVGA3D_CLIPPLANE_1 = (1 << 1),
604 SVGA3D_CLIPPLANE_2 = (1 << 2),
605 SVGA3D_CLIPPLANE_3 = (1 << 3),
606 SVGA3D_CLIPPLANE_4 = (1 << 4),
607 SVGA3D_CLIPPLANE_5 = (1 << 5),
608 SVGA3D_CLIPPLANE_MAX = SVGA3D_CLIPPLANE_5
609} SVGA3dClipPlanes;
610
611typedef enum {
612 SVGA3D_CLEAR_COLOR = 0x1,
613 SVGA3D_CLEAR_DEPTH = 0x2,
614 SVGA3D_CLEAR_STENCIL = 0x4
615} SVGA3dClearFlag;
616
617typedef enum {
618 SVGA3D_RT_DEPTH = 0,
619 SVGA3D_RT_STENCIL = 1,
620 SVGA3D_RT_COLOR0 = 2,
621 SVGA3D_RT_COLOR1 = 3,
622 SVGA3D_RT_COLOR2 = 4,
623 SVGA3D_RT_COLOR3 = 5,
624 SVGA3D_RT_COLOR4 = 6,
625 SVGA3D_RT_COLOR5 = 7,
626 SVGA3D_RT_COLOR6 = 8,
627 SVGA3D_RT_COLOR7 = 9,
628 SVGA3D_RT_MAX,
629 SVGA3D_RT_INVALID = ((uint32_t)-1)
630} SVGA3dRenderTargetType;
631
632#define SVGA3D_MAX_RT_COLOR (SVGA3D_RT_COLOR7 - SVGA3D_RT_COLOR0 + 1)
633
634typedef
635union {
636 struct {
637 uint32_t red : 1;
638 uint32_t green : 1;
639 uint32_t blue : 1;
640 uint32_t alpha : 1;
641 } s;
642 uint32_t uintValue;
643} SVGA3dColorMask;
644
645typedef enum {
646 SVGA3D_VBLEND_DISABLE = 0,
647 SVGA3D_VBLEND_1WEIGHT = 1,
648 SVGA3D_VBLEND_2WEIGHT = 2,
649 SVGA3D_VBLEND_3WEIGHT = 3
650} SVGA3dVertexBlendFlags;
651
652typedef enum {
653 SVGA3D_WRAPCOORD_0 = 1 << 0,
654 SVGA3D_WRAPCOORD_1 = 1 << 1,
655 SVGA3D_WRAPCOORD_2 = 1 << 2,
656 SVGA3D_WRAPCOORD_3 = 1 << 3,
657 SVGA3D_WRAPCOORD_ALL = 0xF
658} SVGA3dWrapFlags;
659
660/*
661 * SVGA_3D_CMD_TEXTURESTATE Types. All value types
662 * must fit in a uint32_t.
663 */
664
665typedef enum {
666 SVGA3D_TS_INVALID = 0,
667 SVGA3D_TS_BIND_TEXTURE = 1, /* SVGA3dSurfaceId */
668 SVGA3D_TS_COLOROP = 2, /* SVGA3dTextureCombiner */
669 SVGA3D_TS_COLORARG1 = 3, /* SVGA3dTextureArgData */
670 SVGA3D_TS_COLORARG2 = 4, /* SVGA3dTextureArgData */
671 SVGA3D_TS_ALPHAOP = 5, /* SVGA3dTextureCombiner */
672 SVGA3D_TS_ALPHAARG1 = 6, /* SVGA3dTextureArgData */
673 SVGA3D_TS_ALPHAARG2 = 7, /* SVGA3dTextureArgData */
674 SVGA3D_TS_ADDRESSU = 8, /* SVGA3dTextureAddress */
675 SVGA3D_TS_ADDRESSV = 9, /* SVGA3dTextureAddress */
676 SVGA3D_TS_MIPFILTER = 10, /* SVGA3dTextureFilter */
677 SVGA3D_TS_MAGFILTER = 11, /* SVGA3dTextureFilter */
678 SVGA3D_TS_MINFILTER = 12, /* SVGA3dTextureFilter */
679 SVGA3D_TS_BORDERCOLOR = 13, /* SVGA3dColor */
680 SVGA3D_TS_TEXCOORDINDEX = 14, /* uint32_t */
681 SVGA3D_TS_TEXTURETRANSFORMFLAGS = 15, /* SVGA3dTexTransformFlags */
682 SVGA3D_TS_TEXCOORDGEN = 16, /* SVGA3dTextureCoordGen */
683 SVGA3D_TS_BUMPENVMAT00 = 17, /* float */
684 SVGA3D_TS_BUMPENVMAT01 = 18, /* float */
685 SVGA3D_TS_BUMPENVMAT10 = 19, /* float */
686 SVGA3D_TS_BUMPENVMAT11 = 20, /* float */
687 SVGA3D_TS_TEXTURE_MIPMAP_LEVEL = 21, /* uint32_t */
688 SVGA3D_TS_TEXTURE_LOD_BIAS = 22, /* float */
689 SVGA3D_TS_TEXTURE_ANISOTROPIC_LEVEL = 23, /* uint32_t */
690 SVGA3D_TS_ADDRESSW = 24, /* SVGA3dTextureAddress */
691
692
693 /*
694 * Sampler Gamma Level
695 *
696 * Sampler gamma effects the color of samples taken from the sampler. A
697 * value of 1.0 will produce linear samples. If the value is <= 0.0 the
698 * gamma value is ignored and a linear space is used.
699 */
700
701 SVGA3D_TS_GAMMA = 25, /* float */
702 SVGA3D_TS_BUMPENVLSCALE = 26, /* float */
703 SVGA3D_TS_BUMPENVLOFFSET = 27, /* float */
704 SVGA3D_TS_COLORARG0 = 28, /* SVGA3dTextureArgData */
705 SVGA3D_TS_ALPHAARG0 = 29, /* SVGA3dTextureArgData */
706 SVGA3D_TS_MAX
707} SVGA3dTextureStateName;
708
709typedef enum {
710 SVGA3D_TC_INVALID = 0,
711 SVGA3D_TC_DISABLE = 1,
712 SVGA3D_TC_SELECTARG1 = 2,
713 SVGA3D_TC_SELECTARG2 = 3,
714 SVGA3D_TC_MODULATE = 4,
715 SVGA3D_TC_ADD = 5,
716 SVGA3D_TC_ADDSIGNED = 6,
717 SVGA3D_TC_SUBTRACT = 7,
718 SVGA3D_TC_BLENDTEXTUREALPHA = 8,
719 SVGA3D_TC_BLENDDIFFUSEALPHA = 9,
720 SVGA3D_TC_BLENDCURRENTALPHA = 10,
721 SVGA3D_TC_BLENDFACTORALPHA = 11,
722 SVGA3D_TC_MODULATE2X = 12,
723 SVGA3D_TC_MODULATE4X = 13,
724 SVGA3D_TC_DSDT = 14,
725 SVGA3D_TC_DOTPRODUCT3 = 15,
726 SVGA3D_TC_BLENDTEXTUREALPHAPM = 16,
727 SVGA3D_TC_ADDSIGNED2X = 17,
728 SVGA3D_TC_ADDSMOOTH = 18,
729 SVGA3D_TC_PREMODULATE = 19,
730 SVGA3D_TC_MODULATEALPHA_ADDCOLOR = 20,
731 SVGA3D_TC_MODULATECOLOR_ADDALPHA = 21,
732 SVGA3D_TC_MODULATEINVALPHA_ADDCOLOR = 22,
733 SVGA3D_TC_MODULATEINVCOLOR_ADDALPHA = 23,
734 SVGA3D_TC_BUMPENVMAPLUMINANCE = 24,
735 SVGA3D_TC_MULTIPLYADD = 25,
736 SVGA3D_TC_LERP = 26,
737 SVGA3D_TC_MAX
738} SVGA3dTextureCombiner;
739
740#define SVGA3D_TC_CAP_BIT(svga3d_tc_op) (svga3d_tc_op ? (1 << (svga3d_tc_op - 1)) : 0)
741
742typedef enum {
743 SVGA3D_TEX_ADDRESS_INVALID = 0,
744 SVGA3D_TEX_ADDRESS_WRAP = 1,
745 SVGA3D_TEX_ADDRESS_MIRROR = 2,
746 SVGA3D_TEX_ADDRESS_CLAMP = 3,
747 SVGA3D_TEX_ADDRESS_BORDER = 4,
748 SVGA3D_TEX_ADDRESS_MIRRORONCE = 5,
749 SVGA3D_TEX_ADDRESS_EDGE = 6,
750 SVGA3D_TEX_ADDRESS_MAX
751} SVGA3dTextureAddress;
752
753/*
754 * SVGA3D_TEX_FILTER_NONE as the minification filter means mipmapping is
755 * disabled, and the rasterizer should use the magnification filter instead.
756 */
757typedef enum {
758 SVGA3D_TEX_FILTER_NONE = 0,
759 SVGA3D_TEX_FILTER_NEAREST = 1,
760 SVGA3D_TEX_FILTER_LINEAR = 2,
761 SVGA3D_TEX_FILTER_ANISOTROPIC = 3,
762 SVGA3D_TEX_FILTER_FLATCUBIC = 4, // Deprecated, not implemented
763 SVGA3D_TEX_FILTER_GAUSSIANCUBIC = 5, // Deprecated, not implemented
764 SVGA3D_TEX_FILTER_PYRAMIDALQUAD = 6, // Not currently implemented
765 SVGA3D_TEX_FILTER_GAUSSIANQUAD = 7, // Not currently implemented
766 SVGA3D_TEX_FILTER_MAX
767} SVGA3dTextureFilter;
768
769typedef enum {
770 SVGA3D_TEX_TRANSFORM_OFF = 0,
771 SVGA3D_TEX_TRANSFORM_S = (1 << 0),
772 SVGA3D_TEX_TRANSFORM_T = (1 << 1),
773 SVGA3D_TEX_TRANSFORM_R = (1 << 2),
774 SVGA3D_TEX_TRANSFORM_Q = (1 << 3),
775 SVGA3D_TEX_PROJECTED = (1 << 15)
776} SVGA3dTexTransformFlags;
777
778typedef enum {
779 SVGA3D_TEXCOORD_GEN_OFF = 0,
780 SVGA3D_TEXCOORD_GEN_EYE_POSITION = 1,
781 SVGA3D_TEXCOORD_GEN_EYE_NORMAL = 2,
782 SVGA3D_TEXCOORD_GEN_REFLECTIONVECTOR = 3,
783 SVGA3D_TEXCOORD_GEN_SPHERE = 4,
784 SVGA3D_TEXCOORD_GEN_MAX
785} SVGA3dTextureCoordGen;
786
787/*
788 * Texture argument constants for texture combiner
789 */
790typedef enum {
791 SVGA3D_TA_INVALID = 0,
792 SVGA3D_TA_CONSTANT = 1,
793 SVGA3D_TA_PREVIOUS = 2,
794 SVGA3D_TA_DIFFUSE = 3,
795 SVGA3D_TA_TEXTURE = 4,
796 SVGA3D_TA_SPECULAR = 5,
797 SVGA3D_TA_MAX
798} SVGA3dTextureArgData;
799
800#define SVGA3D_TM_MASK_LEN 4
801
802/* Modifiers for texture argument constants defined above. */
803typedef enum {
804 SVGA3D_TM_NONE = 0,
805 SVGA3D_TM_ALPHA = (1 << SVGA3D_TM_MASK_LEN),
806 SVGA3D_TM_ONE_MINUS = (2 << SVGA3D_TM_MASK_LEN)
807} SVGA3dTextureArgModifier;
808
809#define SVGA3D_INVALID_ID ((uint32_t)-1)
810#define SVGA3D_MAX_CLIP_PLANES 6
811
812/*
813 * This is the limit to the number of fixed-function texture
814 * transforms and texture coordinates we can support. It does *not*
815 * correspond to the number of texture image units (samplers) we
816 * support!
817 */
818#define SVGA3D_MAX_TEXTURE_COORDS 8
819
820/*
821 * Vertex declarations
822 *
823 * Notes:
824 *
825 * SVGA3D_DECLUSAGE_POSITIONT is for pre-transformed vertices. If you
826 * draw with any POSITIONT vertex arrays, the programmable vertex
827 * pipeline will be implicitly disabled. Drawing will take place as if
828 * no vertex shader was bound.
829 */
830
831typedef enum {
832 SVGA3D_DECLUSAGE_POSITION = 0,
833 SVGA3D_DECLUSAGE_BLENDWEIGHT, // 1
834 SVGA3D_DECLUSAGE_BLENDINDICES, // 2
835 SVGA3D_DECLUSAGE_NORMAL, // 3
836 SVGA3D_DECLUSAGE_PSIZE, // 4
837 SVGA3D_DECLUSAGE_TEXCOORD, // 5
838 SVGA3D_DECLUSAGE_TANGENT, // 6
839 SVGA3D_DECLUSAGE_BINORMAL, // 7
840 SVGA3D_DECLUSAGE_TESSFACTOR, // 8
841 SVGA3D_DECLUSAGE_POSITIONT, // 9
842 SVGA3D_DECLUSAGE_COLOR, // 10
843 SVGA3D_DECLUSAGE_FOG, // 11
844 SVGA3D_DECLUSAGE_DEPTH, // 12
845 SVGA3D_DECLUSAGE_SAMPLE, // 13
846 SVGA3D_DECLUSAGE_MAX
847} SVGA3dDeclUsage;
848
849typedef enum {
850 SVGA3D_DECLMETHOD_DEFAULT = 0,
851 SVGA3D_DECLMETHOD_PARTIALU,
852 SVGA3D_DECLMETHOD_PARTIALV,
853 SVGA3D_DECLMETHOD_CROSSUV, // Normal
854 SVGA3D_DECLMETHOD_UV,
855 SVGA3D_DECLMETHOD_LOOKUP, // Lookup a displacement map
856 SVGA3D_DECLMETHOD_LOOKUPPRESAMPLED // Lookup a pre-sampled displacement map
857} SVGA3dDeclMethod;
858
859typedef enum {
860 SVGA3D_DECLTYPE_FLOAT1 = 0,
861 SVGA3D_DECLTYPE_FLOAT2 = 1,
862 SVGA3D_DECLTYPE_FLOAT3 = 2,
863 SVGA3D_DECLTYPE_FLOAT4 = 3,
864 SVGA3D_DECLTYPE_D3DCOLOR = 4,
865 SVGA3D_DECLTYPE_UBYTE4 = 5,
866 SVGA3D_DECLTYPE_SHORT2 = 6,
867 SVGA3D_DECLTYPE_SHORT4 = 7,
868 SVGA3D_DECLTYPE_UBYTE4N = 8,
869 SVGA3D_DECLTYPE_SHORT2N = 9,
870 SVGA3D_DECLTYPE_SHORT4N = 10,
871 SVGA3D_DECLTYPE_USHORT2N = 11,
872 SVGA3D_DECLTYPE_USHORT4N = 12,
873 SVGA3D_DECLTYPE_UDEC3 = 13,
874 SVGA3D_DECLTYPE_DEC3N = 14,
875 SVGA3D_DECLTYPE_FLOAT16_2 = 15,
876 SVGA3D_DECLTYPE_FLOAT16_4 = 16,
877 SVGA3D_DECLTYPE_MAX
878} SVGA3dDeclType;
879
880/*
881 * This structure is used for the divisor for geometry instancing;
882 * it's a direct translation of the Direct3D equivalent.
883 */
884typedef union {
885 struct {
886 /*
887 * For index data, this number represents the number of instances to draw.
888 * For instance data, this number represents the number of
889 * instances/vertex in this stream
890 */
891 uint32_t count : 30;
892
893 /*
894 * This is 1 if this is supposed to be the data that is repeated for
895 * every instance.
896 */
897 uint32_t indexedData : 1;
898
899 /*
900 * This is 1 if this is supposed to be the per-instance data.
901 */
902 uint32_t instanceData : 1;
903 } s;
904
905 uint32_t value;
906} SVGA3dVertexDivisor;
907
908typedef enum {
909 SVGA3D_PRIMITIVE_INVALID = 0,
910 SVGA3D_PRIMITIVE_TRIANGLELIST = 1,
911 SVGA3D_PRIMITIVE_POINTLIST = 2,
912 SVGA3D_PRIMITIVE_LINELIST = 3,
913 SVGA3D_PRIMITIVE_LINESTRIP = 4,
914 SVGA3D_PRIMITIVE_TRIANGLESTRIP = 5,
915 SVGA3D_PRIMITIVE_TRIANGLEFAN = 6,
916 SVGA3D_PRIMITIVE_MAX
917} SVGA3dPrimitiveType;
918
919typedef enum {
920 SVGA3D_COORDINATE_INVALID = 0,
921 SVGA3D_COORDINATE_LEFTHANDED = 1,
922 SVGA3D_COORDINATE_RIGHTHANDED = 2,
923 SVGA3D_COORDINATE_MAX
924} SVGA3dCoordinateType;
925
926typedef enum {
927 SVGA3D_TRANSFORM_INVALID = 0,
928 SVGA3D_TRANSFORM_WORLD = 1,
929 SVGA3D_TRANSFORM_VIEW = 2,
930 SVGA3D_TRANSFORM_PROJECTION = 3,
931 SVGA3D_TRANSFORM_TEXTURE0 = 4,
932 SVGA3D_TRANSFORM_TEXTURE1 = 5,
933 SVGA3D_TRANSFORM_TEXTURE2 = 6,
934 SVGA3D_TRANSFORM_TEXTURE3 = 7,
935 SVGA3D_TRANSFORM_TEXTURE4 = 8,
936 SVGA3D_TRANSFORM_TEXTURE5 = 9,
937 SVGA3D_TRANSFORM_TEXTURE6 = 10,
938 SVGA3D_TRANSFORM_TEXTURE7 = 11,
939 SVGA3D_TRANSFORM_WORLD1 = 12,
940 SVGA3D_TRANSFORM_WORLD2 = 13,
941 SVGA3D_TRANSFORM_WORLD3 = 14,
942 SVGA3D_TRANSFORM_MAX
943} SVGA3dTransformType;
944
945typedef enum {
946 SVGA3D_LIGHTTYPE_INVALID = 0,
947 SVGA3D_LIGHTTYPE_POINT = 1,
948 SVGA3D_LIGHTTYPE_SPOT1 = 2, /* 1-cone, in degrees */
949 SVGA3D_LIGHTTYPE_SPOT2 = 3, /* 2-cone, in radians */
950 SVGA3D_LIGHTTYPE_DIRECTIONAL = 4,
951 SVGA3D_LIGHTTYPE_MAX
952} SVGA3dLightType;
953
954typedef enum {
955 SVGA3D_CUBEFACE_POSX = 0,
956 SVGA3D_CUBEFACE_NEGX = 1,
957 SVGA3D_CUBEFACE_POSY = 2,
958 SVGA3D_CUBEFACE_NEGY = 3,
959 SVGA3D_CUBEFACE_POSZ = 4,
960 SVGA3D_CUBEFACE_NEGZ = 5
961} SVGA3dCubeFace;
962
963typedef enum {
964 SVGA3D_SHADERTYPE_VS = 1,
965 SVGA3D_SHADERTYPE_PS = 2,
966 SVGA3D_SHADERTYPE_MAX
967} SVGA3dShaderType;
968
969typedef enum {
970 SVGA3D_CONST_TYPE_FLOAT = 0,
971 SVGA3D_CONST_TYPE_INT = 1,
972 SVGA3D_CONST_TYPE_BOOL = 2
973} SVGA3dShaderConstType;
974
975#define SVGA3D_MAX_SURFACE_FACES 6
976
977typedef enum {
978 SVGA3D_STRETCH_BLT_POINT = 0,
979 SVGA3D_STRETCH_BLT_LINEAR = 1,
980 SVGA3D_STRETCH_BLT_MAX
981} SVGA3dStretchBltMode;
982
983typedef enum {
984 SVGA3D_QUERYTYPE_OCCLUSION = 0,
985 SVGA3D_QUERYTYPE_MAX
986} SVGA3dQueryType;
987
988typedef enum {
989 SVGA3D_QUERYSTATE_PENDING = 0, /* Waiting on the host (set by guest) */
990 SVGA3D_QUERYSTATE_SUCCEEDED = 1, /* Completed successfully (set by host) */
991 SVGA3D_QUERYSTATE_FAILED = 2, /* Completed unsuccessfully (set by host) */
992 SVGA3D_QUERYSTATE_NEW = 3 /* Never submitted (For guest use only) */
993} SVGA3dQueryState;
994
995typedef enum {
996 SVGA3D_WRITE_HOST_VRAM = 1,
997 SVGA3D_READ_HOST_VRAM = 2
998} SVGA3dTransferType;
999
1000/*
1001 * The maximum number of vertex arrays we're guaranteed to support in
1002 * SVGA_3D_CMD_DRAWPRIMITIVES.
1003 */
1004#define SVGA3D_MAX_VERTEX_ARRAYS 32
1005
1006/*
1007 * The maximum number of primitive ranges we're guaranteed to support
1008 * in SVGA_3D_CMD_DRAWPRIMITIVES.
1009 */
1010#define SVGA3D_MAX_DRAW_PRIMITIVE_RANGES 32
1011
1012/*
1013 * Identifiers for commands in the command FIFO.
1014 *
1015 * IDs between 1000 and 1039 (inclusive) were used by obsolete versions of
1016 * the SVGA3D protocol and remain reserved; they should not be used in the
1017 * future.
1018 *
1019 * IDs between 1040 and 1999 (inclusive) are available for use by the
1020 * current SVGA3D protocol.
1021 *
1022 * FIFO clients other than SVGA3D should stay below 1000, or at 2000
1023 * and up.
1024 */
1025
1026#define SVGA_3D_CMD_LEGACY_BASE 1000
1027#define SVGA_3D_CMD_BASE 1040
1028
1029#define SVGA_3D_CMD_SURFACE_DEFINE SVGA_3D_CMD_BASE + 0 // Deprecated
1030#define SVGA_3D_CMD_SURFACE_DESTROY SVGA_3D_CMD_BASE + 1
1031#define SVGA_3D_CMD_SURFACE_COPY SVGA_3D_CMD_BASE + 2
1032#define SVGA_3D_CMD_SURFACE_STRETCHBLT SVGA_3D_CMD_BASE + 3
1033#define SVGA_3D_CMD_SURFACE_DMA SVGA_3D_CMD_BASE + 4
1034#define SVGA_3D_CMD_CONTEXT_DEFINE SVGA_3D_CMD_BASE + 5
1035#define SVGA_3D_CMD_CONTEXT_DESTROY SVGA_3D_CMD_BASE + 6
1036#define SVGA_3D_CMD_SETTRANSFORM SVGA_3D_CMD_BASE + 7
1037#define SVGA_3D_CMD_SETZRANGE SVGA_3D_CMD_BASE + 8
1038#define SVGA_3D_CMD_SETRENDERSTATE SVGA_3D_CMD_BASE + 9
1039#define SVGA_3D_CMD_SETRENDERTARGET SVGA_3D_CMD_BASE + 10
1040#define SVGA_3D_CMD_SETTEXTURESTATE SVGA_3D_CMD_BASE + 11
1041#define SVGA_3D_CMD_SETMATERIAL SVGA_3D_CMD_BASE + 12
1042#define SVGA_3D_CMD_SETLIGHTDATA SVGA_3D_CMD_BASE + 13
1043#define SVGA_3D_CMD_SETLIGHTENABLED SVGA_3D_CMD_BASE + 14
1044#define SVGA_3D_CMD_SETVIEWPORT SVGA_3D_CMD_BASE + 15
1045#define SVGA_3D_CMD_SETCLIPPLANE SVGA_3D_CMD_BASE + 16
1046#define SVGA_3D_CMD_CLEAR SVGA_3D_CMD_BASE + 17
1047#define SVGA_3D_CMD_PRESENT SVGA_3D_CMD_BASE + 18 // Deprecated
1048#define SVGA_3D_CMD_SHADER_DEFINE SVGA_3D_CMD_BASE + 19
1049#define SVGA_3D_CMD_SHADER_DESTROY SVGA_3D_CMD_BASE + 20
1050#define SVGA_3D_CMD_SET_SHADER SVGA_3D_CMD_BASE + 21
1051#define SVGA_3D_CMD_SET_SHADER_CONST SVGA_3D_CMD_BASE + 22
1052#define SVGA_3D_CMD_DRAW_PRIMITIVES SVGA_3D_CMD_BASE + 23
1053#define SVGA_3D_CMD_SETSCISSORRECT SVGA_3D_CMD_BASE + 24
1054#define SVGA_3D_CMD_BEGIN_QUERY SVGA_3D_CMD_BASE + 25
1055#define SVGA_3D_CMD_END_QUERY SVGA_3D_CMD_BASE + 26
1056#define SVGA_3D_CMD_WAIT_FOR_QUERY SVGA_3D_CMD_BASE + 27
1057#define SVGA_3D_CMD_PRESENT_READBACK SVGA_3D_CMD_BASE + 28 // Deprecated
1058#define SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN SVGA_3D_CMD_BASE + 29
1059#define SVGA_3D_CMD_SURFACE_DEFINE_V2 SVGA_3D_CMD_BASE + 30
1060#define SVGA_3D_CMD_GENERATE_MIPMAPS SVGA_3D_CMD_BASE + 31
1061#define SVGA_3D_CMD_ACTIVATE_SURFACE SVGA_3D_CMD_BASE + 40
1062#define SVGA_3D_CMD_DEACTIVATE_SURFACE SVGA_3D_CMD_BASE + 41
1063#define SVGA_3D_CMD_MAX SVGA_3D_CMD_BASE + 42
1064
1065#define SVGA_3D_CMD_FUTURE_MAX 2000
1066
1067/*
1068 * Common substructures used in multiple FIFO commands:
1069 */
1070
1071typedef struct {
1072 union {
1073 struct {
1074 uint16_t function; // SVGA3dFogFunction
1075 uint8_t type; // SVGA3dFogType
1076 uint8_t base; // SVGA3dFogBase
1077 } s;
1078 uint32_t uintValue;
1079 };
1080} SVGA3dFogMode;
1081
1082/*
1083 * Uniquely identify one image (a 1D/2D/3D array) from a surface. This
1084 * is a surface ID as well as face/mipmap indices.
1085 */
1086
1087typedef
1088struct SVGA3dSurfaceImageId {
1089 uint32_t sid;
1090 uint32_t face;
1091 uint32_t mipmap;
1092} SVGA3dSurfaceImageId;
1093
1094typedef
1095struct SVGA3dGuestImage {
1096 SVGAGuestPtr ptr;
1097
1098 /*
1099 * A note on interpretation of pitch: This value of pitch is the
1100 * number of bytes between vertically adjacent image
1101 * blocks. Normally this is the number of bytes between the first
1102 * pixel of two adjacent scanlines. With compressed textures,
1103 * however, this may represent the number of bytes between
1104 * compression blocks rather than between rows of pixels.
1105 *
1106 * XXX: Compressed textures currently must be tightly packed in guest memory.
1107 *
1108 * If the image is 1-dimensional, pitch is ignored.
1109 *
1110 * If 'pitch' is zero, the SVGA3D device calculates a pitch value
1111 * assuming each row of blocks is tightly packed.
1112 */
1113 uint32_t pitch;
1114} SVGA3dGuestImage;
1115
1116
1117/*
1118 * FIFO command format definitions:
1119 */
1120
1121/*
1122 * The data size header following cmdNum for every 3d command
1123 */
1124typedef
1125struct {
1126 /* uint32_t id; duplicate*/
1127 uint32_t size;
1128} SVGA3dCmdHeader;
1129
1130/*
1131 * A surface is a hierarchy of host VRAM surfaces: 1D, 2D, or 3D, with
1132 * optional mipmaps and cube faces.
1133 */
1134
1135typedef
1136struct {
1137 uint32_t width;
1138 uint32_t height;
1139 uint32_t depth;
1140} SVGA3dSize;
1141
1142typedef enum {
1143 SVGA3D_SURFACE_CUBEMAP = (1 << 0),
1144 SVGA3D_SURFACE_HINT_STATIC = (1 << 1),
1145 SVGA3D_SURFACE_HINT_DYNAMIC = (1 << 2),
1146 SVGA3D_SURFACE_HINT_INDEXBUFFER = (1 << 3),
1147 SVGA3D_SURFACE_HINT_VERTEXBUFFER = (1 << 4),
1148 SVGA3D_SURFACE_HINT_TEXTURE = (1 << 5),
1149 SVGA3D_SURFACE_HINT_RENDERTARGET = (1 << 6),
1150 SVGA3D_SURFACE_HINT_DEPTHSTENCIL = (1 << 7),
1151 SVGA3D_SURFACE_HINT_WRITEONLY = (1 << 8),
1152 SVGA3D_SURFACE_MASKABLE_ANTIALIAS = (1 << 9),
1153 SVGA3D_SURFACE_AUTOGENMIPMAPS = (1 << 10)
1154} SVGA3dSurfaceFlags;
1155
1156typedef
1157struct {
1158 uint32_t numMipLevels;
1159} SVGA3dSurfaceFace;
1160
1161typedef
1162struct {
1163 uint32_t sid;
1164 SVGA3dSurfaceFlags surfaceFlags;
1165 SVGA3dSurfaceFormat format;
1166 /*
1167 * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
1168 * structures must have the same value of numMipLevels field.
1169 * Otherwise, all but the first SVGA3dSurfaceFace structures must have the
1170 * numMipLevels set to 0.
1171 */
1172 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
1173 /*
1174 * Followed by an SVGA3dSize structure for each mip level in each face.
1175 *
1176 * A note on surface sizes: Sizes are always specified in pixels,
1177 * even if the true surface size is not a multiple of the minimum
1178 * block size of the surface's format. For example, a 3x3x1 DXT1
1179 * compressed texture would actually be stored as a 4x4x1 image in
1180 * memory.
1181 */
1182} SVGA3dCmdDefineSurface; /* SVGA_3D_CMD_SURFACE_DEFINE */
1183
1184typedef
1185struct {
1186 uint32_t sid;
1187 SVGA3dSurfaceFlags surfaceFlags;
1188 SVGA3dSurfaceFormat format;
1189 /*
1190 * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
1191 * structures must have the same value of numMipLevels field.
1192 * Otherwise, all but the first SVGA3dSurfaceFace structures must have the
1193 * numMipLevels set to 0.
1194 */
1195 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
1196 uint32_t multisampleCount;
1197 SVGA3dTextureFilter autogenFilter;
1198 /*
1199 * Followed by an SVGA3dSize structure for each mip level in each face.
1200 *
1201 * A note on surface sizes: Sizes are always specified in pixels,
1202 * even if the true surface size is not a multiple of the minimum
1203 * block size of the surface's format. For example, a 3x3x1 DXT1
1204 * compressed texture would actually be stored as a 4x4x1 image in
1205 * memory.
1206 */
1207} SVGA3dCmdDefineSurface_v2; /* SVGA_3D_CMD_SURFACE_DEFINE_V2 */
1208
1209typedef
1210struct {
1211 uint32_t sid;
1212} SVGA3dCmdDestroySurface; /* SVGA_3D_CMD_SURFACE_DESTROY */
1213
1214typedef
1215struct {
1216 uint32_t cid;
1217} SVGA3dCmdDefineContext; /* SVGA_3D_CMD_CONTEXT_DEFINE */
1218
1219typedef
1220struct {
1221 uint32_t cid;
1222} SVGA3dCmdDestroyContext; /* SVGA_3D_CMD_CONTEXT_DESTROY */
1223
1224typedef
1225struct {
1226 uint32_t cid;
1227 SVGA3dClearFlag clearFlag;
1228 uint32_t color;
1229 float depth;
1230 uint32_t stencil;
1231 /* Followed by variable number of SVGA3dRect structures */
1232} SVGA3dCmdClear; /* SVGA_3D_CMD_CLEAR */
1233
1234typedef
1235struct SVGA3dCopyRect {
1236 uint32_t x;
1237 uint32_t y;
1238 uint32_t w;
1239 uint32_t h;
1240 uint32_t srcx;
1241 uint32_t srcy;
1242} SVGA3dCopyRect;
1243
1244typedef
1245struct SVGA3dCopyBox {
1246 uint32_t x;
1247 uint32_t y;
1248 uint32_t z;
1249 uint32_t w;
1250 uint32_t h;
1251 uint32_t d;
1252 uint32_t srcx;
1253 uint32_t srcy;
1254 uint32_t srcz;
1255} SVGA3dCopyBox;
1256
1257typedef
1258struct {
1259 uint32_t x;
1260 uint32_t y;
1261 uint32_t w;
1262 uint32_t h;
1263} SVGA3dRect;
1264
1265typedef
1266struct {
1267 uint32_t x;
1268 uint32_t y;
1269 uint32_t z;
1270 uint32_t w;
1271 uint32_t h;
1272 uint32_t d;
1273} SVGA3dBox;
1274
1275typedef
1276struct {
1277 uint32_t x;
1278 uint32_t y;
1279 uint32_t z;
1280} SVGA3dPoint;
1281
1282typedef
1283struct {
1284 SVGA3dLightType type;
1285 SVGA3dBool inWorldSpace;
1286 float diffuse[4];
1287 float specular[4];
1288 float ambient[4];
1289 float position[4];
1290 float direction[4];
1291 float range;
1292 float falloff;
1293 float attenuation0;
1294 float attenuation1;
1295 float attenuation2;
1296 float theta;
1297 float phi;
1298} SVGA3dLightData;
1299
1300typedef
1301struct {
1302 uint32_t sid;
1303 /* Followed by variable number of SVGA3dCopyRect structures */
1304} SVGA3dCmdPresent; /* SVGA_3D_CMD_PRESENT */
1305
1306typedef
1307struct {
1308 SVGA3dRenderStateName state;
1309 union {
1310 uint32_t uintValue;
1311 float floatValue;
1312 };
1313} SVGA3dRenderState;
1314
1315typedef
1316struct {
1317 uint32_t cid;
1318 /* Followed by variable number of SVGA3dRenderState structures */
1319} SVGA3dCmdSetRenderState; /* SVGA_3D_CMD_SETRENDERSTATE */
1320
1321typedef
1322struct {
1323 uint32_t cid;
1324 SVGA3dRenderTargetType type;
1325 SVGA3dSurfaceImageId target;
1326} SVGA3dCmdSetRenderTarget; /* SVGA_3D_CMD_SETRENDERTARGET */
1327
1328typedef
1329struct {
1330 SVGA3dSurfaceImageId src;
1331 SVGA3dSurfaceImageId dest;
1332 /* Followed by variable number of SVGA3dCopyBox structures */
1333} SVGA3dCmdSurfaceCopy; /* SVGA_3D_CMD_SURFACE_COPY */
1334
1335typedef
1336struct {
1337 SVGA3dSurfaceImageId src;
1338 SVGA3dSurfaceImageId dest;
1339 SVGA3dBox boxSrc;
1340 SVGA3dBox boxDest;
1341 SVGA3dStretchBltMode mode;
1342} SVGA3dCmdSurfaceStretchBlt; /* SVGA_3D_CMD_SURFACE_STRETCHBLT */
1343
1344typedef
1345struct {
1346 /*
1347 * If the discard flag is present in a surface DMA operation, the host may
1348 * discard the contents of the current mipmap level and face of the target
1349 * surface before applying the surface DMA contents.
1350 */
1351 uint32_t discard : 1;
1352
1353 /*
1354 * If the unsynchronized flag is present, the host may perform this upload
1355 * without syncing to pending reads on this surface.
1356 */
1357 uint32_t unsynchronized : 1;
1358
1359 /*
1360 * Guests *MUST* set the reserved bits to 0 before submitting the command
1361 * suffix as future flags may occupy these bits.
1362 */
1363 uint32_t reserved : 30;
1364} SVGA3dSurfaceDMAFlags;
1365
1366typedef
1367struct {
1368 SVGA3dGuestImage guest;
1369 SVGA3dSurfaceImageId host;
1370 SVGA3dTransferType transfer;
1371 /*
1372 * Followed by variable number of SVGA3dCopyBox structures. For consistency
1373 * in all clipping logic and coordinate translation, we define the
1374 * "source" in each copyBox as the guest image and the
1375 * "destination" as the host image, regardless of transfer
1376 * direction.
1377 *
1378 * For efficiency, the SVGA3D device is free to copy more data than
1379 * specified. For example, it may round copy boxes outwards such
1380 * that they lie on particular alignment boundaries.
1381 */
1382} SVGA3dCmdSurfaceDMA; /* SVGA_3D_CMD_SURFACE_DMA */
1383
1384/*
1385 * SVGA3dCmdSurfaceDMASuffix --
1386 *
1387 * This is a command suffix that will appear after a SurfaceDMA command in
1388 * the FIFO. It contains some extra information that hosts may use to
1389 * optimize performance or protect the guest. This suffix exists to preserve
1390 * backwards compatibility while also allowing for new functionality to be
1391 * implemented.
1392 */
1393
1394typedef
1395struct {
1396 uint32_t suffixSize;
1397
1398 /*
1399 * The maximum offset is used to determine the maximum offset from the
1400 * guestPtr base address that will be accessed or written to during this
1401 * surfaceDMA. If the suffix is supported, the host will respect this
1402 * boundary while performing surface DMAs.
1403 *
1404 * Defaults to MAX_uint32_t
1405 */
1406 uint32_t maximumOffset;
1407
1408 /*
1409 * A set of flags that describes optimizations that the host may perform
1410 * while performing this surface DMA operation. The guest should never rely
1411 * on behaviour that is different when these flags are set for correctness.
1412 *
1413 * Defaults to 0
1414 */
1415 SVGA3dSurfaceDMAFlags flags;
1416} SVGA3dCmdSurfaceDMASuffix;
1417
1418/*
1419 * SVGA_3D_CMD_DRAW_PRIMITIVES --
1420 *
1421 * This command is the SVGA3D device's generic drawing entry point.
1422 * It can draw multiple ranges of primitives, optionally using an
1423 * index buffer, using an arbitrary collection of vertex buffers.
1424 *
1425 * Each SVGA3dVertexDecl defines a distinct vertex array to bind
1426 * during this draw call. The declarations specify which surface
1427 * the vertex data lives in, what that vertex data is used for,
1428 * and how to interpret it.
1429 *
1430 * Each SVGA3dPrimitiveRange defines a collection of primitives
1431 * to render using the same vertex arrays. An index buffer is
1432 * optional.
1433 */
1434
1435typedef
1436struct {
1437 /*
1438 * A range hint is an optional specification for the range of indices
1439 * in an SVGA3dArray that will be used. If 'last' is zero, it is assumed
1440 * that the entire array will be used.
1441 *
1442 * These are only hints. The SVGA3D device may use them for
1443 * performance optimization if possible, but it's also allowed to
1444 * ignore these values.
1445 */
1446 uint32_t first;
1447 uint32_t last;
1448} SVGA3dArrayRangeHint;
1449
1450typedef
1451struct {
1452 /*
1453 * Define the origin and shape of a vertex or index array. Both
1454 * 'offset' and 'stride' are in bytes. The provided surface will be
1455 * reinterpreted as a flat array of bytes in the same format used
1456 * by surface DMA operations. To avoid unnecessary conversions, the
1457 * surface should be created with the SVGA3D_BUFFER format.
1458 *
1459 * Index 0 in the array starts 'offset' bytes into the surface.
1460 * Index 1 begins at byte 'offset + stride', etc. Array indices may
1461 * not be negative.
1462 */
1463 uint32_t surfaceId;
1464 uint32_t offset;
1465 uint32_t stride;
1466} SVGA3dArray;
1467
1468typedef
1469struct {
1470 /*
1471 * Describe a vertex array's data type, and define how it is to be
1472 * used by the fixed function pipeline or the vertex shader. It
1473 * isn't useful to have two VertexDecls with the same
1474 * VertexArrayIdentity in one draw call.
1475 */
1476 SVGA3dDeclType type;
1477 SVGA3dDeclMethod method;
1478 SVGA3dDeclUsage usage;
1479 uint32_t usageIndex;
1480} SVGA3dVertexArrayIdentity;
1481
1482typedef
1483struct {
1484 SVGA3dVertexArrayIdentity identity;
1485 SVGA3dArray array;
1486 SVGA3dArrayRangeHint rangeHint;
1487} SVGA3dVertexDecl;
1488
1489typedef
1490struct {
1491 /*
1492 * Define a group of primitives to render, from sequential indices.
1493 *
1494 * The value of 'primitiveType' and 'primitiveCount' imply the
1495 * total number of vertices that will be rendered.
1496 */
1497 SVGA3dPrimitiveType primType;
1498 uint32_t primitiveCount;
1499
1500 /*
1501 * Optional index buffer. If indexArray.surfaceId is
1502 * SVGA3D_INVALID_ID, we render without an index buffer. Rendering
1503 * without an index buffer is identical to rendering with an index
1504 * buffer containing the sequence [0, 1, 2, 3, ...].
1505 *
1506 * If an index buffer is in use, indexWidth specifies the width in
1507 * bytes of each index value. It must be less than or equal to
1508 * indexArray.stride.
1509 *
1510 * (Currently, the SVGA3D device requires index buffers to be tightly
1511 * packed. In other words, indexWidth == indexArray.stride)
1512 */
1513 SVGA3dArray indexArray;
1514 uint32_t indexWidth;
1515
1516 /*
1517 * Optional index bias. This number is added to all indices from
1518 * indexArray before they are used as vertex array indices. This
1519 * can be used in multiple ways:
1520 *
1521 * - When not using an indexArray, this bias can be used to
1522 * specify where in the vertex arrays to begin rendering.
1523 *
1524 * - A positive number here is equivalent to increasing the
1525 * offset in each vertex array.
1526 *
1527 * - A negative number can be used to render using a small
1528 * vertex array and an index buffer that contains large
1529 * values. This may be used by some applications that
1530 * crop a vertex buffer without modifying their index
1531 * buffer.
1532 *
1533 * Note that rendering with a negative bias value may be slower and
1534 * use more memory than rendering with a positive or zero bias.
1535 */
1536 int32_t indexBias;
1537} SVGA3dPrimitiveRange;
1538
1539typedef
1540struct {
1541 uint32_t cid;
1542 uint32_t numVertexDecls;
1543 uint32_t numRanges;
1544
1545 /*
1546 * There are two variable size arrays after the
1547 * SVGA3dCmdDrawPrimitives structure. In order,
1548 * they are:
1549 *
1550 * 1. SVGA3dVertexDecl, quantity 'numVertexDecls', but no more than
1551 * SVGA3D_MAX_VERTEX_ARRAYS;
1552 * 2. SVGA3dPrimitiveRange, quantity 'numRanges', but no more than
1553 * SVGA3D_MAX_DRAW_PRIMITIVE_RANGES;
1554 * 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains
1555 * the frequency divisor for the corresponding vertex decl).
1556 */
1557} SVGA3dCmdDrawPrimitives; /* SVGA_3D_CMD_DRAWPRIMITIVES */
1558
1559typedef
1560struct {
1561 uint32_t stage;
1562 SVGA3dTextureStateName name;
1563 union {
1564 uint32_t value;
1565 float floatValue;
1566 };
1567} SVGA3dTextureState;
1568
1569typedef
1570struct {
1571 uint32_t cid;
1572 /* Followed by variable number of SVGA3dTextureState structures */
1573} SVGA3dCmdSetTextureState; /* SVGA_3D_CMD_SETTEXTURESTATE */
1574
1575typedef
1576struct {
1577 uint32_t cid;
1578 SVGA3dTransformType type;
1579 float matrix[16];
1580} SVGA3dCmdSetTransform; /* SVGA_3D_CMD_SETTRANSFORM */
1581
1582typedef
1583struct {
1584 float min;
1585 float max;
1586} SVGA3dZRange;
1587
1588typedef
1589struct {
1590 uint32_t cid;
1591 SVGA3dZRange zRange;
1592} SVGA3dCmdSetZRange; /* SVGA_3D_CMD_SETZRANGE */
1593
1594typedef
1595struct {
1596 float diffuse[4];
1597 float ambient[4];
1598 float specular[4];
1599 float emissive[4];
1600 float shininess;
1601} SVGA3dMaterial;
1602
1603typedef
1604struct {
1605 uint32_t cid;
1606 SVGA3dFace face;
1607 SVGA3dMaterial material;
1608} SVGA3dCmdSetMaterial; /* SVGA_3D_CMD_SETMATERIAL */
1609
1610typedef
1611struct {
1612 uint32_t cid;
1613 uint32_t index;
1614 SVGA3dLightData data;
1615} SVGA3dCmdSetLightData; /* SVGA_3D_CMD_SETLIGHTDATA */
1616
1617typedef
1618struct {
1619 uint32_t cid;
1620 uint32_t index;
1621 uint32_t enabled;
1622} SVGA3dCmdSetLightEnabled; /* SVGA_3D_CMD_SETLIGHTENABLED */
1623
1624typedef
1625struct {
1626 uint32_t cid;
1627 SVGA3dRect rect;
1628} SVGA3dCmdSetViewport; /* SVGA_3D_CMD_SETVIEWPORT */
1629
1630typedef
1631struct {
1632 uint32_t cid;
1633 SVGA3dRect rect;
1634} SVGA3dCmdSetScissorRect; /* SVGA_3D_CMD_SETSCISSORRECT */
1635
1636typedef
1637struct {
1638 uint32_t cid;
1639 uint32_t index;
1640 float plane[4];
1641} SVGA3dCmdSetClipPlane; /* SVGA_3D_CMD_SETCLIPPLANE */
1642
1643typedef
1644struct {
1645 uint32_t cid;
1646 uint32_t shid;
1647 SVGA3dShaderType type;
1648 /* Followed by variable number of DWORDs for shader bycode */
1649} SVGA3dCmdDefineShader; /* SVGA_3D_CMD_SHADER_DEFINE */
1650
1651typedef
1652struct {
1653 uint32_t cid;
1654 uint32_t shid;
1655 SVGA3dShaderType type;
1656} SVGA3dCmdDestroyShader; /* SVGA_3D_CMD_SHADER_DESTROY */
1657
1658typedef
1659struct {
1660 uint32_t cid;
1661 uint32_t reg; /* register number */
1662 SVGA3dShaderType type;
1663 SVGA3dShaderConstType ctype;
1664 uint32_t values[4];
1665} SVGA3dCmdSetShaderConst; /* SVGA_3D_CMD_SET_SHADER_CONST */
1666
1667typedef
1668struct {
1669 uint32_t cid;
1670 SVGA3dShaderType type;
1671 uint32_t shid;
1672} SVGA3dCmdSetShader; /* SVGA_3D_CMD_SET_SHADER */
1673
1674typedef
1675struct {
1676 uint32_t cid;
1677 SVGA3dQueryType type;
1678} SVGA3dCmdBeginQuery; /* SVGA_3D_CMD_BEGIN_QUERY */
1679
1680typedef
1681struct {
1682 uint32_t cid;
1683 SVGA3dQueryType type;
1684 SVGAGuestPtr guestResult; /* Points to an SVGA3dQueryResult structure */
1685} SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */
1686
1687typedef
1688struct {
1689 uint32_t cid; /* Same parameters passed to END_QUERY */
1690 SVGA3dQueryType type;
1691 SVGAGuestPtr guestResult;
1692} SVGA3dCmdWaitForQuery; /* SVGA_3D_CMD_WAIT_FOR_QUERY */
1693
1694typedef
1695struct {
1696 uint32_t totalSize; /* Set by guest before query is ended. */
1697 SVGA3dQueryState state; /* Set by host or guest. See SVGA3dQueryState. */
1698 union { /* Set by host on exit from PENDING state */
1699 uint32_t result32;
1700 };
1701} SVGA3dQueryResult;
1702
1703/*
1704 * SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN --
1705 *
1706 * This is a blit from an SVGA3D surface to a Screen Object. Just
1707 * like GMR-to-screen blits, this blit may be directed at a
1708 * specific screen or to the virtual coordinate space.
1709 *
1710 * The blit copies from a rectangular region of an SVGA3D surface
1711 * image to a rectangular region of a screen or screens.
1712 *
1713 * This command takes an optional variable-length list of clipping
1714 * rectangles after the body of the command. If no rectangles are
1715 * specified, there is no clipping region. The entire destRect is
1716 * drawn to. If one or more rectangles are included, they describe
1717 * a clipping region. The clip rectangle coordinates are measured
1718 * relative to the top-left corner of destRect.
1719 *
1720 * This clipping region serves multiple purposes:
1721 *
1722 * - It can be used to perform an irregularly shaped blit more
1723 * efficiently than by issuing many separate blit commands.
1724 *
1725 * - It is equivalent to allowing blits with non-integer
1726 * source coordinates. You could blit just one half-pixel
1727 * of a source, for example, by specifying a larger
1728 * destination rectangle than you need, then removing
1729 * part of it using a clip rectangle.
1730 *
1731 * Availability:
1732 * SVGA_FIFO_CAP_SCREEN_OBJECT
1733 *
1734 * Limitations:
1735 *
1736 * - Currently, no backend supports blits from a mipmap or face
1737 * other than the first one.
1738 */
1739
1740typedef
1741struct {
1742 SVGA3dSurfaceImageId srcImage;
1743 SVGASignedRect srcRect;
1744 uint32_t destScreenId; /* Screen ID or SVGA_ID_INVALID for virt. coords */
1745 SVGASignedRect destRect; /* Supports scaling if src/rest different size */
1746 /* Clipping: zero or more SVGASignedRects follow */
1747} SVGA3dCmdBlitSurfaceToScreen; /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */
1748
1749typedef
1750struct {
1751 uint32_t sid;
1752 SVGA3dTextureFilter filter;
1753} SVGA3dCmdGenerateMipmaps; /* SVGA_3D_CMD_GENERATE_MIPMAPS */
1754
1755
1756/*
1757 * Capability query index.
1758 *
1759 * Notes:
1760 *
1761 * 1. SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of
1762 * fixed-function texture units available. Each of these units
1763 * work in both FFP and Shader modes, and they support texture
1764 * transforms and texture coordinates. The host may have additional
1765 * texture image units that are only usable with shaders.
1766 *
1767 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
1768 * return TRUE. Even on physical hardware that does not support
1769 * these formats natively, the SVGA3D device will provide an emulation
1770 * which should be invisible to the guest OS.
1771 *
1772 * In general, the SVGA3D device should support any operation on
1773 * any surface format, it just may perform some of these
1774 * operations in software depending on the capabilities of the
1775 * available physical hardware.
1776 *
1777 * XXX: In the future, we will add capabilities that describe in
1778 * detail what formats are supported in hardware for what kinds
1779 * of operations.
1780 */
1781
1782typedef enum {
1783 SVGA3D_DEVCAP_3D = 0,
1784 SVGA3D_DEVCAP_MAX_LIGHTS = 1,
1785 SVGA3D_DEVCAP_MAX_TEXTURES = 2, /* See note (1) */
1786 SVGA3D_DEVCAP_MAX_CLIP_PLANES = 3,
1787 SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = 4,
1788 SVGA3D_DEVCAP_VERTEX_SHADER = 5,
1789 SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = 6,
1790 SVGA3D_DEVCAP_FRAGMENT_SHADER = 7,
1791 SVGA3D_DEVCAP_MAX_RENDER_TARGETS = 8,
1792 SVGA3D_DEVCAP_S23E8_TEXTURES = 9,
1793 SVGA3D_DEVCAP_S10E5_TEXTURES = 10,
1794 SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = 11,
1795 SVGA3D_DEVCAP_D16_BUFFER_FORMAT = 12, /* See note (2) */
1796 SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = 13, /* See note (2) */
1797 SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = 14, /* See note (2) */
1798 SVGA3D_DEVCAP_QUERY_TYPES = 15,
1799 SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = 16,
1800 SVGA3D_DEVCAP_MAX_POINT_SIZE = 17,
1801 SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = 18,
1802 SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = 19,
1803 SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = 20,
1804 SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = 21,
1805 SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = 22,
1806 SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = 23,
1807 SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = 24,
1808 SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = 25,
1809 SVGA3D_DEVCAP_MAX_VERTEX_INDEX = 26,
1810 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = 27,
1811 SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = 28,
1812 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = 29,
1813 SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = 30,
1814 SVGA3D_DEVCAP_TEXTURE_OPS = 31,
1815 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = 32,
1816 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = 33,
1817 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = 34,
1818 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = 35,
1819 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = 36,
1820 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = 37,
1821 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = 38,
1822 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = 39,
1823 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = 40,
1824 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = 41,
1825 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = 42,
1826 SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = 43,
1827 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = 44,
1828 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = 45,
1829 SVGA3D_DEVCAP_SURFACEFMT_DXT1 = 46,
1830 SVGA3D_DEVCAP_SURFACEFMT_DXT2 = 47,
1831 SVGA3D_DEVCAP_SURFACEFMT_DXT3 = 48,
1832 SVGA3D_DEVCAP_SURFACEFMT_DXT4 = 49,
1833 SVGA3D_DEVCAP_SURFACEFMT_DXT5 = 50,
1834 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = 51,
1835 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = 52,
1836 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = 53,
1837 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = 54,
1838 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = 55,
1839 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = 56,
1840 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = 57,
1841 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = 58,
1842 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = 59,
1843 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = 60,
1844 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = 61,
1845 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = 63,
1846
1847 /*
1848 * Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color
1849 * render targets. This does no include the depth or stencil targets.
1850 */
1851 SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = 64,
1852
1853 SVGA3D_DEVCAP_SURFACEFMT_V16U16 = 65,
1854 SVGA3D_DEVCAP_SURFACEFMT_G16R16 = 66,
1855 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = 67,
1856 SVGA3D_DEVCAP_SURFACEFMT_UYVY = 68,
1857 SVGA3D_DEVCAP_SURFACEFMT_YUY2 = 69,
1858 SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES = 70,
1859 SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES = 71,
1860 SVGA3D_DEVCAP_ALPHATOCOVERAGE = 72,
1861 SVGA3D_DEVCAP_SUPERSAMPLE = 73,
1862 SVGA3D_DEVCAP_AUTOGENMIPMAPS = 74,
1863 SVGA3D_DEVCAP_SURFACEFMT_NV12 = 75,
1864 SVGA3D_DEVCAP_SURFACEFMT_AYUV = 76,
1865
1866 /*
1867 * This is the maximum number of SVGA context IDs that the guest
1868 * can define using SVGA_3D_CMD_CONTEXT_DEFINE.
1869 */
1870 SVGA3D_DEVCAP_MAX_CONTEXT_IDS = 77,
1871
1872 /*
1873 * This is the maximum number of SVGA surface IDs that the guest
1874 * can define using SVGA_3D_CMD_SURFACE_DEFINE*.
1875 */
1876 SVGA3D_DEVCAP_MAX_SURFACE_IDS = 78,
1877
1878 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 = 79,
1879 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24 = 80,
1880 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT = 81,
1881
1882 SVGA3D_DEVCAP_SURFACEFMT_BC4_UNORM = 82,
1883 SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM = 83,
1884
1885 /*
1886 * Don't add new caps into the previous section; the values in this
1887 * enumeration must not change. You can put new values right before
1888 * SVGA3D_DEVCAP_MAX.
1889 */
1890 SVGA3D_DEVCAP_MAX /* This must be the last index. */
1891} SVGA3dDevCapIndex;
1892
1893typedef union {
1894 bool b;
1895 uint32_t u;
1896 int32_t i;
1897 float f;
1898} SVGA3dDevCapResult;
1899
1900#endif /* _SVGA3D_REG_H_ */
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