| 1 | /**************************************************************************
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| 2 | *
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| 3 | * isapnp.h -- Etherboot isapnp support for the 3Com 3c515
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| 4 | * Written 2002-2003 by Timothy Legge <[email protected]>
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| 5 | *
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| 6 | * This program is free software; you can redistribute it and/or modify
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| 7 | * it under the terms of the GNU General Public License as published by
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| 8 | * the Free Software Foundation; either version 2 of the License, or
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| 9 | * (at your option) any later version.
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| 10 | *
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| 11 | * This program is distributed in the hope that it will be useful,
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| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 14 | * GNU General Public License for more details.
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| 15 | *
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| 16 | * You should have received a copy of the GNU General Public License
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| 17 | * along with this program; if not, write to the Free Software
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| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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| 19 | *
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| 20 | * Portions of this code:
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| 21 | * Copyright (C) 2001 P.J.H.Fox ([email protected])
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| 22 | *
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| 23 | *
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| 24 | *
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| 25 | * REVISION HISTORY:
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| 26 | * ================
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| 27 | * Version 0.1 April 26, 2002 TJL
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| 28 | * Version 0.2 01/08/2003 TJL Renamed from 3c515_isapnp.h
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| 29 |
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| 30 | /*
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| 31 | * Sun GPL Disclaimer: For the avoidance of doubt, except that if any license choice
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| 32 | * other than GPL or LGPL is available it will apply instead, Sun elects to use only
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| 33 | * the General Public License version 2 (GPLv2) at this time for any software where
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| 34 | * a choice of GPL license versions is made available with the language indicating
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| 35 | * that GPLv2 or any later version may be used, or where a choice of which version
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| 36 | * of the GPL is applied is otherwise unspecified.
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| 37 | */
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| 38 | *
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| 39 | ***************************************************************************/
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| 40 |
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| 41 | /*extern int read_port;*/
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| 42 | /*#define DEBUG*/
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| 43 | #define ADDRESS_ADDR 0x0279
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| 44 | #define WRITEDATA_ADDR 0x0a79
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| 45 | /* MIN and MAX READ_ADDR must have the bottom two bits set */
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| 46 | #define MIN_READ_ADDR 0x0203
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| 47 | #define START_READ_ADDR 0x203
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| 48 | #define MAX_READ_ADDR 0x03ff
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| 49 | /* READ_ADDR_STEP must be a multiple of 4 */
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| 50 | #ifndef READ_ADDR_STEP
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| 51 | #define READ_ADDR_STEP 8
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| 52 | #endif
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| 53 |
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| 54 | #ifdef EDEBUG
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| 55 | static int x;
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| 56 | #define ADDRESS(x) (outb(x, ADDRESS_ADDR), printf("\nAddress: %hX", x))
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| 57 | #define WRITE_DATA(x) (outb(x, WRITEDATA_ADDR), printf(" WR(%hX)", x & 0xff))
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| 58 | #define READ_DATA (x = inb(read_port), printf(" RD(%hX)", x & 0xff), x)
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| 59 | #define READ_IOPORT(p) (x = inb(p), printf(" [%hX](%hX)", p, x & 0xff), x)
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| 60 | #else /* !DEBUG */
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| 61 | #define ADDRESS(x) outb(x, ADDRESS_ADDR)
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| 62 | #define WRITE_DATA(x) outb(x, WRITEDATA_ADDR)
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| 63 | #define READ_DATA inb(read_port)
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| 64 | #define READ_IOPORT(p) inb(p)
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| 65 | #endif /* !DEBUG */
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| 66 |
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| 67 |
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| 68 |
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| 69 | #define INIT_LENGTH 32
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| 70 |
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| 71 | #define INITDATA { 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe,\
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| 72 | 0xdf, 0x6f, 0x37, 0x1b, 0x0d, 0x86, 0xc3, 0x61,\
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| 73 | 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1,\
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| 74 | 0xe8, 0x74, 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 }
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| 75 |
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| 76 | /* Registers */
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| 77 | #define SetRdPort(x) (ADDRESS(0x00),WRITE_DATA((x)>>2),read_port=((x)|3))
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| 78 | #define SERIALISOLATION ADDRESS(0x01)
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| 79 | #define CONFIGCONTROL ADDRESS(0x02)
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| 80 | #define Wake(x) (ADDRESS(0x03),WRITE_DATA(x))
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| 81 | #define RESOURCEDATA (ADDRESS(0x04),READ_DATA)
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| 82 | #define STATUS (ADDRESS(0x05),READ_DATA)
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| 83 | #define CARDSELECTNUMBER ADDRESS(0x06)
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| 84 | #define LOGICALDEVICENUMBER ADDRESS(0x07)
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| 85 | #define ACTIVATE ADDRESS(0x30)
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| 86 | #define IORANGECHECK ADDRESS(0x31)
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| 87 |
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| 88 | /* Bits */
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| 89 | #define CONFIG_RESET 0x01
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| 90 | #define CONFIG_WAIT_FOR_KEY 0x02
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| 91 | #define CONFIG_RESET_CSN 0x04
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| 92 | #define CONFIG_RESET_DRV 0x07
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| 93 |
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| 94 | /* Short Tags */
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| 95 | #define PnPVerNo_TAG 0x01
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| 96 | #define LogDevId_TAG 0x02
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| 97 | #define CompatDevId_TAG 0x03
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| 98 | #define IRQ_TAG 0x04
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| 99 | #define DMA_TAG 0x05
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| 100 | #define StartDep_TAG 0x06
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| 101 | #define EndDep_TAG 0x07
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| 102 | #define IOport_TAG 0x08
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| 103 | #define FixedIO_TAG 0x09
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| 104 | #define RsvdShortA_TAG 0x0A
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| 105 | #define RsvdShortB_TAG 0x0B
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| 106 | #define RsvdShortC_TAG 0x0C
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| 107 | #define RsvdShortD_TAG 0x0D
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| 108 | #define VendorShort_TAG 0x0E
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| 109 | #define End_TAG 0x0F
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| 110 | /* Long Tags */
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| 111 | #define MemRange_TAG 0x81
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| 112 | #define ANSIstr_TAG 0x82
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| 113 | #define UNICODEstr_TAG 0x83
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| 114 | #define VendorLong_TAG 0x84
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| 115 | #define Mem32Range_TAG 0x85
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| 116 | #define FixedMem32Range_TAG 0x86
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| 117 | #define RsvdLong0_TAG 0xF0
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| 118 | #define RsvdLong1_TAG 0xF1
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| 119 | #define RsvdLong2_TAG 0xF2
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| 120 | #define RsvdLong3_TAG 0xF3
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| 121 | #define RsvdLong4_TAG 0xF4
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| 122 | #define RsvdLong5_TAG 0xF5
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| 123 | #define RsvdLong6_TAG 0xF6
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| 124 | #define RsvdLong7_TAG 0xF7
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| 125 | #define RsvdLong8_TAG 0xF8
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| 126 | #define RsvdLong9_TAG 0xF9
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| 127 | #define RsvdLongA_TAG 0xFA
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| 128 | #define RsvdLongB_TAG 0xFB
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| 129 | #define RsvdLongC_TAG 0xFC
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| 130 | #define RsvdLongD_TAG 0xFD
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| 131 | #define RsvdLongE_TAG 0xFE
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| 132 | #define RsvdLongF_TAG 0xFF
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| 133 | #define NewBoard_PSEUDOTAG 0x100
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