1 | /*-
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2 | * Copyright (c) 2004-2005 David Schultz <[email protected]>
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | * 1. Redistributions of source code must retain the above copyright
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9 | * notice, this list of conditions and the following disclaimer.
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10 | * 2. Redistributions in binary form must reproduce the above copyright
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11 | * notice, this list of conditions and the following disclaimer in the
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12 | * documentation and/or other materials provided with the distribution.
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13 | *
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14 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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15 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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17 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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18 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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19 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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20 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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21 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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22 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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23 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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24 | * SUCH DAMAGE.
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25 | *
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26 | * $FreeBSD: src/lib/msun/i387/fenv.c,v 1.2 2005/03/17 22:21:46 das Exp $
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27 | */
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28 |
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29 | /*#include "namespace.h"
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30 | #include <sys/cdefs.h>
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31 | #include <sys/types.h>
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32 | #include <machine/npx.h>
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33 | #include "fenv.h"*/
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34 | #include <iprt/types.h>
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35 | #include <iprt/nocrt/fenv.h>
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36 |
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37 | #if 0
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38 | const fenv_t __fe_dfl_env = {
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39 | __INITIAL_NPXCW__,
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40 | 0x0000,
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41 | 0x0000,
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42 | 0x1f80,
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43 | 0xffffffff,
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44 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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45 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff }
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46 | };
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47 | #endif
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48 |
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49 | enum __sse_support __has_sse =
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50 | #ifdef __SSE__
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51 | __SSE_YES;
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52 | #else
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53 | __SSE_UNK;
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54 | #endif
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55 |
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56 | #define getfl(x) __asm __volatile("pushfl\n\tpopl %0" : "=mr" (*(x)))
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57 | #define setfl(x) __asm __volatile("pushl %0\n\tpopfl" : : "g" (x))
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58 | #define cpuid_dx(x) __asm __volatile("pushl %%ebx\n\tmovl $1, %%eax\n\t" \
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59 | "cpuid\n\tpopl %%ebx" \
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60 | : "=d" (*(x)) : : "eax", "ecx")
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61 |
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62 | /*
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63 | * Test for SSE support on this processor. We need to do this because
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64 | * we need to use ldmxcsr/stmxcsr to get correct results if any part
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65 | * of the program was compiled to use SSE floating-point, but we can't
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66 | * use SSE on older processors.
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67 | */
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68 | int
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69 | __test_sse(void)
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70 | {
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71 | int flag, nflag;
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72 | int dx_features;
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73 |
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74 | /* Am I a 486? */
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75 | getfl(&flag);
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76 | nflag = flag ^ 0x200000;
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77 | setfl(nflag);
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78 | getfl(&nflag);
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79 | if (flag != nflag) {
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80 | /* Not a 486, so CPUID should work. */
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81 | cpuid_dx(&dx_features);
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82 | if (dx_features & 0x2000000) {
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83 | __has_sse = __SSE_YES;
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84 | return (1);
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85 | }
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86 | }
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87 | __has_sse = __SSE_NO;
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88 | return (0);
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89 | }
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90 |
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91 | #if 0 /* later */
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92 | int
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93 | _STD(fesetexceptflag)(const fexcept_t *flagp, int excepts)
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94 | {
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95 | fenv_t env;
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96 | int mxcsr;
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97 |
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98 | __fnstenv(&env);
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99 | env.__status &= ~excepts;
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100 | env.__status |= *flagp & excepts;
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101 | __fldenv(env);
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102 |
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103 | if (__HAS_SSE()) {
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104 | __stmxcsr(&mxcsr);
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105 | mxcsr &= ~excepts;
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106 | mxcsr |= *flagp & excepts;
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107 | __ldmxcsr(mxcsr);
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108 | }
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109 |
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110 | return (0);
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111 | }
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112 |
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113 | int
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114 | _STD(feraiseexcept)(int excepts)
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115 | {
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116 | fexcept_t ex = excepts;
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117 |
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118 | fesetexceptflag(&ex, excepts);
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119 | __fwait();
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120 | return (0);
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121 | }
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122 |
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123 | int
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124 | _STD(fegetenv)(fenv_t *envp)
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125 | {
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126 | int control, mxcsr;
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127 |
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128 | /*
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129 | * fnstenv masks all exceptions, so we need to save and
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130 | * restore the control word to avoid this side effect.
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131 | */
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132 | __fnstcw(&control);
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133 | __fnstenv(envp);
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134 | if (__HAS_SSE()) {
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135 | __stmxcsr(&mxcsr);
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136 | __set_mxcsr(*envp, mxcsr);
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137 | }
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138 | __fldcw(control);
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139 | return (0);
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140 | }
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141 |
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142 | int
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143 | _STD(feholdexcept)(fenv_t *envp)
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144 | {
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145 | int mxcsr;
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146 |
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147 | __fnstenv(envp);
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148 | __fnclex();
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149 | if (__HAS_SSE()) {
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150 | __stmxcsr(&mxcsr);
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151 | __set_mxcsr(*envp, mxcsr);
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152 | mxcsr &= ~FE_ALL_EXCEPT;
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153 | mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
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154 | __ldmxcsr(mxcsr);
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155 | }
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156 | return (0);
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157 | }
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158 |
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159 | int
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160 | _STD(feupdateenv)(const fenv_t *envp)
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161 | {
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162 | int mxcsr, status;
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163 |
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164 | __fnstsw(&status);
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165 | if (__HAS_SSE())
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166 | __stmxcsr(&mxcsr);
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167 | else
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168 | mxcsr = 0;
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169 | fesetenv(envp);
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170 | feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT);
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171 | return (0);
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172 | }
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173 |
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174 | int
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175 | __feenableexcept(int mask)
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176 | {
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177 | int mxcsr, control, omask;
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178 |
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179 | mask &= FE_ALL_EXCEPT;
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180 | __fnstcw(&control);
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181 | if (__HAS_SSE())
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182 | __stmxcsr(&mxcsr);
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183 | else
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184 | mxcsr = 0;
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185 | omask = (control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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186 | control &= ~mask;
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187 | __fldcw(control);
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188 | if (__HAS_SSE()) {
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189 | mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
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190 | __ldmxcsr(mxcsr);
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191 | }
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192 | return (~omask);
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193 | }
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194 |
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195 | int
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196 | __fedisableexcept(int mask)
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197 | {
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198 | int mxcsr, control, omask;
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199 |
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200 | mask &= FE_ALL_EXCEPT;
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201 | __fnstcw(&control);
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202 | if (__HAS_SSE())
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203 | __stmxcsr(&mxcsr);
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204 | else
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205 | mxcsr = 0;
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206 | omask = (control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
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207 | control |= mask;
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208 | __fldcw(control);
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209 | if (__HAS_SSE()) {
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210 | mxcsr |= mask << _SSE_EMASK_SHIFT;
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211 | __ldmxcsr(mxcsr);
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212 | }
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213 | return (~omask);
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214 | }
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215 |
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216 | __weak_reference(__feenableexcept, feenableexcept);
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217 | __weak_reference(__fedisableexcept, fedisableexcept);
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218 | #endif /* later */
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