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source: vbox/trunk/src/libs/openssl-3.1.0/crypto/armcap.c@ 100939

最後變更 在這個檔案從100939是 99366,由 vboxsync 提交於 23 月 前

openssl-3.1.0: Applied and adjusted our OpenSSL changes to 3.0.7. bugref:10418
檔案大小: 11.3 KB
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1/*
2 * Copyright 2011-2022 The OpenSSL Project Authors. All Rights Reserved.
3 *
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
8 */
9
10#include <stdio.h>
11#include <stdlib.h>
12#include <string.h>
13#include <setjmp.h>
14#include <signal.h>
15#include <openssl/crypto.h>
16#ifdef __APPLE__
17#include <sys/sysctl.h>
18#endif
19#ifdef RT_OS_DARWIN /* VBOX */
20# include <pthread.h> /* VBOX */
21# define sigprocmask pthread_sigmask /* On xnu sigprocmask works on the process, not the calling thread as elsewhere. */
22#endif /* VBOX */
23#include "internal/cryptlib.h"
24#ifndef _WIN32
25#include <unistd.h>
26#else
27#include <windows.h>
28#endif
29#include "arm_arch.h"
30
31unsigned int OPENSSL_armcap_P = 0;
32unsigned int OPENSSL_arm_midr = 0;
33unsigned int OPENSSL_armv8_rsa_neonized = 0;
34
35#ifdef _WIN32
36void OPENSSL_cpuid_setup(void)
37{
38 OPENSSL_armcap_P |= ARMV7_NEON;
39 OPENSSL_armv8_rsa_neonized = 1;
40 if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE)) {
41 // These are all covered by one call in Windows
42 OPENSSL_armcap_P |= ARMV8_AES;
43 OPENSSL_armcap_P |= ARMV8_PMULL;
44 OPENSSL_armcap_P |= ARMV8_SHA1;
45 OPENSSL_armcap_P |= ARMV8_SHA256;
46 }
47}
48
49uint32_t OPENSSL_rdtsc(void)
50{
51 return 0;
52}
53#elif __ARM_MAX_ARCH__<7
54void OPENSSL_cpuid_setup(void)
55{
56}
57
58uint32_t OPENSSL_rdtsc(void)
59{
60 return 0;
61}
62#else
63static sigset_t all_masked;
64
65static sigjmp_buf ill_jmp;
66static void ill_handler(int sig)
67{
68 siglongjmp(ill_jmp, sig);
69}
70
71/*
72 * Following subroutines could have been inlined, but it's not all
73 * ARM compilers support inline assembler...
74 */
75void _armv7_neon_probe(void);
76void _armv8_aes_probe(void);
77void _armv8_sha1_probe(void);
78void _armv8_sha256_probe(void);
79void _armv8_pmull_probe(void);
80# ifdef __aarch64__
81void _armv8_sm3_probe(void);
82void _armv8_sm4_probe(void);
83void _armv8_eor3_probe(void);
84void _armv8_sha512_probe(void);
85unsigned int _armv8_cpuid_probe(void);
86void _armv8_sve_probe(void);
87void _armv8_sve2_probe(void);
88void _armv8_rng_probe(void);
89
90size_t OPENSSL_rndr_asm(unsigned char *buf, size_t len);
91size_t OPENSSL_rndrrs_asm(unsigned char *buf, size_t len);
92
93size_t OPENSSL_rndr_bytes(unsigned char *buf, size_t len);
94size_t OPENSSL_rndrrs_bytes(unsigned char *buf, size_t len);
95
96static size_t OPENSSL_rndr_wrapper(size_t (*func)(unsigned char *, size_t), unsigned char *buf, size_t len)
97{
98 size_t buffer_size = 0;
99 int i;
100
101 for (i = 0; i < 8; i++) {
102 buffer_size = func(buf, len);
103 if (buffer_size == len)
104 break;
105 usleep(5000); /* 5000 microseconds (5 milliseconds) */
106 }
107 return buffer_size;
108}
109
110size_t OPENSSL_rndr_bytes(unsigned char *buf, size_t len)
111{
112 return OPENSSL_rndr_wrapper(OPENSSL_rndr_asm, buf, len);
113}
114
115size_t OPENSSL_rndrrs_bytes(unsigned char *buf, size_t len)
116{
117 return OPENSSL_rndr_wrapper(OPENSSL_rndrrs_asm, buf, len);
118}
119# endif
120uint32_t _armv7_tick(void);
121
122uint32_t OPENSSL_rdtsc(void)
123{
124 if (OPENSSL_armcap_P & ARMV7_TICK)
125 return _armv7_tick();
126 else
127 return 0;
128}
129
130# if defined(__GNUC__) && __GNUC__>=2
131void OPENSSL_cpuid_setup(void) __attribute__ ((constructor));
132# endif
133
134# if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
135# if __GLIBC_PREREQ(2, 16)
136# include <sys/auxv.h>
137# define OSSL_IMPLEMENT_GETAUXVAL
138# endif
139# elif defined(__ANDROID_API__)
140/* see https://developer.android.google.cn/ndk/guides/cpu-features */
141# if __ANDROID_API__ >= 18
142# include <sys/auxv.h>
143# define OSSL_IMPLEMENT_GETAUXVAL
144# endif
145# endif
146# if defined(__FreeBSD__)
147# include <sys/param.h>
148# if __FreeBSD_version >= 1200000
149# include <sys/auxv.h>
150# define OSSL_IMPLEMENT_GETAUXVAL
151
152static unsigned long getauxval(unsigned long key)
153{
154 unsigned long val = 0ul;
155
156 if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
157 return 0ul;
158
159 return val;
160}
161# endif
162# endif
163
164/*
165 * Android: according to https://developer.android.com/ndk/guides/cpu-features,
166 * getauxval is supported starting with API level 18
167 */
168# if defined(__ANDROID__) && defined(__ANDROID_API__) && __ANDROID_API__ >= 18
169# include <sys/auxv.h>
170# define OSSL_IMPLEMENT_GETAUXVAL
171# endif
172
173/*
174 * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
175 * AArch64 used AT_HWCAP.
176 */
177# ifndef AT_HWCAP
178# define AT_HWCAP 16
179# endif
180# ifndef AT_HWCAP2
181# define AT_HWCAP2 26
182# endif
183# if defined(__arm__) || defined (__arm)
184# define HWCAP AT_HWCAP
185# define HWCAP_NEON (1 << 12)
186
187# define HWCAP_CE AT_HWCAP2
188# define HWCAP_CE_AES (1 << 0)
189# define HWCAP_CE_PMULL (1 << 1)
190# define HWCAP_CE_SHA1 (1 << 2)
191# define HWCAP_CE_SHA256 (1 << 3)
192# elif defined(__aarch64__)
193# define HWCAP AT_HWCAP
194# define HWCAP_NEON (1 << 1)
195
196# define HWCAP_CE HWCAP
197# define HWCAP_CE_AES (1 << 3)
198# define HWCAP_CE_PMULL (1 << 4)
199# define HWCAP_CE_SHA1 (1 << 5)
200# define HWCAP_CE_SHA256 (1 << 6)
201# define HWCAP_CPUID (1 << 11)
202# define HWCAP_SHA3 (1 << 17)
203# define HWCAP_CE_SM3 (1 << 18)
204# define HWCAP_CE_SM4 (1 << 19)
205# define HWCAP_CE_SHA512 (1 << 21)
206# define HWCAP_SVE (1 << 22)
207 /* AT_HWCAP2 */
208# define HWCAP2 26
209# define HWCAP2_SVE2 (1 << 1)
210# define HWCAP2_RNG (1 << 16)
211# endif
212
213void OPENSSL_cpuid_setup(void)
214{
215 const char *e;
216 struct sigaction ill_oact, ill_act;
217 sigset_t oset;
218 static int trigger = 0;
219
220 if (trigger)
221 return;
222 trigger = 1;
223
224 OPENSSL_armcap_P = 0;
225
226 if ((e = getenv("OPENSSL_armcap"))) {
227 OPENSSL_armcap_P = (unsigned int)strtoul(e, NULL, 0);
228 return;
229 }
230
231# if defined(__APPLE__)
232# if !defined(__aarch64__)
233 /*
234 * Capability probing by catching SIGILL appears to be problematic
235 * on iOS. But since Apple universe is "monocultural", it's actually
236 * possible to simply set pre-defined processor capability mask.
237 */
238 if (1) {
239 OPENSSL_armcap_P = ARMV7_NEON;
240 return;
241 }
242 /*
243 * One could do same even for __aarch64__ iOS builds. It's not done
244 * exclusively for reasons of keeping code unified across platforms.
245 * Unified code works because it never triggers SIGILL on Apple
246 * devices...
247 */
248# else
249 {
250 unsigned int feature;
251 size_t len = sizeof(feature);
252 char uarch[64];
253
254 if (sysctlbyname("hw.optional.armv8_2_sha512", &feature, &len, NULL, 0) == 0 && feature == 1)
255 OPENSSL_armcap_P |= ARMV8_SHA512;
256 feature = 0;
257 if (sysctlbyname("hw.optional.armv8_2_sha3", &feature, &len, NULL, 0) == 0 && feature == 1) {
258 OPENSSL_armcap_P |= ARMV8_SHA3;
259 len = sizeof(uarch);
260 if ((sysctlbyname("machdep.cpu.brand_string", uarch, &len, NULL, 0) == 0) &&
261 (strncmp(uarch, "Apple M1", 8) == 0))
262 OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
263 }
264 }
265# endif
266# endif
267
268# ifdef OSSL_IMPLEMENT_GETAUXVAL
269 if (getauxval(HWCAP) & HWCAP_NEON) {
270 unsigned long hwcap = getauxval(HWCAP_CE);
271
272 OPENSSL_armcap_P |= ARMV7_NEON;
273
274 if (hwcap & HWCAP_CE_AES)
275 OPENSSL_armcap_P |= ARMV8_AES;
276
277 if (hwcap & HWCAP_CE_PMULL)
278 OPENSSL_armcap_P |= ARMV8_PMULL;
279
280 if (hwcap & HWCAP_CE_SHA1)
281 OPENSSL_armcap_P |= ARMV8_SHA1;
282
283 if (hwcap & HWCAP_CE_SHA256)
284 OPENSSL_armcap_P |= ARMV8_SHA256;
285
286# ifdef __aarch64__
287 if (hwcap & HWCAP_CE_SM4)
288 OPENSSL_armcap_P |= ARMV8_SM4;
289
290 if (hwcap & HWCAP_CE_SHA512)
291 OPENSSL_armcap_P |= ARMV8_SHA512;
292
293 if (hwcap & HWCAP_CPUID)
294 OPENSSL_armcap_P |= ARMV8_CPUID;
295
296 if (hwcap & HWCAP_CE_SM3)
297 OPENSSL_armcap_P |= ARMV8_SM3;
298 if (hwcap & HWCAP_SHA3)
299 OPENSSL_armcap_P |= ARMV8_SHA3;
300# endif
301 }
302# ifdef __aarch64__
303 if (getauxval(HWCAP) & HWCAP_SVE)
304 OPENSSL_armcap_P |= ARMV8_SVE;
305
306 if (getauxval(HWCAP2) & HWCAP2_SVE2)
307 OPENSSL_armcap_P |= ARMV8_SVE2;
308
309 if (getauxval(HWCAP2) & HWCAP2_RNG)
310 OPENSSL_armcap_P |= ARMV8_RNG;
311# endif
312# endif
313
314 sigfillset(&all_masked);
315 sigdelset(&all_masked, SIGILL);
316 sigdelset(&all_masked, SIGTRAP);
317 sigdelset(&all_masked, SIGFPE);
318 sigdelset(&all_masked, SIGBUS);
319 sigdelset(&all_masked, SIGSEGV);
320
321 memset(&ill_act, 0, sizeof(ill_act));
322 ill_act.sa_handler = ill_handler;
323 ill_act.sa_mask = all_masked;
324
325 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
326 sigaction(SIGILL, &ill_act, &ill_oact);
327
328 /* If we used getauxval, we already have all the values */
329# ifndef OSSL_IMPLEMENT_GETAUXVAL
330 if (sigsetjmp(ill_jmp, 1) == 0) {
331 _armv7_neon_probe();
332 OPENSSL_armcap_P |= ARMV7_NEON;
333 if (sigsetjmp(ill_jmp, 1) == 0) {
334 _armv8_pmull_probe();
335 OPENSSL_armcap_P |= ARMV8_PMULL | ARMV8_AES;
336 } else if (sigsetjmp(ill_jmp, 1) == 0) {
337 _armv8_aes_probe();
338 OPENSSL_armcap_P |= ARMV8_AES;
339 }
340 if (sigsetjmp(ill_jmp, 1) == 0) {
341 _armv8_sha1_probe();
342 OPENSSL_armcap_P |= ARMV8_SHA1;
343 }
344 if (sigsetjmp(ill_jmp, 1) == 0) {
345 _armv8_sha256_probe();
346 OPENSSL_armcap_P |= ARMV8_SHA256;
347 }
348# if defined(__aarch64__) && !defined(__APPLE__)
349 if (sigsetjmp(ill_jmp, 1) == 0) {
350 _armv8_sm4_probe();
351 OPENSSL_armcap_P |= ARMV8_SM4;
352 }
353
354 if (sigsetjmp(ill_jmp, 1) == 0) {
355 _armv8_sha512_probe();
356 OPENSSL_armcap_P |= ARMV8_SHA512;
357 }
358
359 if (sigsetjmp(ill_jmp, 1) == 0) {
360 _armv8_sm3_probe();
361 OPENSSL_armcap_P |= ARMV8_SM3;
362 }
363 if (sigsetjmp(ill_jmp, 1) == 0) {
364 _armv8_eor3_probe();
365 OPENSSL_armcap_P |= ARMV8_SHA3;
366 }
367# endif
368 }
369# ifdef __aarch64__
370 if (sigsetjmp(ill_jmp, 1) == 0) {
371 _armv8_sve_probe();
372 OPENSSL_armcap_P |= ARMV8_SVE;
373 }
374
375 if (sigsetjmp(ill_jmp, 1) == 0) {
376 _armv8_sve2_probe();
377 OPENSSL_armcap_P |= ARMV8_SVE2;
378 }
379
380 if (sigsetjmp(ill_jmp, 1) == 0) {
381 _armv8_rng_probe();
382 OPENSSL_armcap_P |= ARMV8_RNG;
383 }
384# endif
385# endif
386
387 /*
388 * Probing for ARMV7_TICK is known to produce unreliable results,
389 * so we will only use the feature when the user explicitly enables
390 * it with OPENSSL_armcap.
391 */
392
393 sigaction(SIGILL, &ill_oact, NULL);
394 sigprocmask(SIG_SETMASK, &oset, NULL);
395
396# ifdef __aarch64__
397 if (OPENSSL_armcap_P & ARMV8_CPUID)
398 OPENSSL_arm_midr = _armv8_cpuid_probe();
399
400 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) ||
401 MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N1)) &&
402 (OPENSSL_armcap_P & ARMV7_NEON)) {
403 OPENSSL_armv8_rsa_neonized = 1;
404 }
405 if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V1) ||
406 MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N2)) &&
407 (OPENSSL_armcap_P & ARMV8_SHA3))
408 OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
409# endif
410}
411#endif
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