| 1 | /* Helpers for instruction counting code generation. */
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| 2 |
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| 3 | static TCGArg *icount_arg;
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| 4 | static int icount_label;
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| 5 |
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| 6 | static inline void gen_icount_start(void)
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| 7 | {
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| 8 | TCGv_i32 count;
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| 9 |
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| 10 | if (!use_icount)
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| 11 | return;
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| 12 |
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| 13 | icount_label = gen_new_label();
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| 14 | /* FIXME: This generates lousy code. We can't use tcg_new_temp because
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| 15 | count needs to live over the conditional branch. To workaround this
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| 16 | we allow the target to supply a convenient register temporary. */
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| 17 | #ifndef ICOUNT_TEMP
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| 18 | count = tcg_temp_local_new_i32();
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| 19 | #else
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| 20 | count = ICOUNT_TEMP;
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| 21 | #endif
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| 22 | tcg_gen_ld_i32(count, cpu_env, offsetof(CPUState, icount_decr.u32));
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| 23 | /* This is a horrid hack to allow fixing up the value later. */
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| 24 | icount_arg = gen_opparam_ptr + 1;
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| 25 | tcg_gen_subi_i32(count, count, 0xdeadbeef);
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| 26 |
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| 27 | tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label);
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| 28 | tcg_gen_st16_i32(count, cpu_env, offsetof(CPUState, icount_decr.u16.low));
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| 29 | #ifndef ICOUNT_TEMP
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| 30 | tcg_temp_free_i32(count);
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| 31 | #endif
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| 32 | }
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| 33 |
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| 34 | static void gen_icount_end(TranslationBlock *tb, int num_insns)
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| 35 | {
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| 36 | if (use_icount) {
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| 37 | *icount_arg = num_insns;
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| 38 | gen_set_label(icount_label);
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| 39 | tcg_gen_exit_tb((long)tb + 2);
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| 40 | }
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| 41 | }
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| 42 |
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| 43 | static inline void gen_io_start(void)
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| 44 | {
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| 45 | TCGv_i32 tmp = tcg_const_i32(1);
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| 46 | tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
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| 47 | tcg_temp_free_i32(tmp);
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| 48 | }
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| 49 |
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| 50 | static inline void gen_io_end(void)
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| 51 | {
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| 52 | TCGv_i32 tmp = tcg_const_i32(0);
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| 53 | tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
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| 54 | tcg_temp_free_i32(tmp);
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| 55 | }
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