1 | /*
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2 | * i386 execution defines
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3 | *
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4 | * Copyright (c) 2003 Fabrice Bellard
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5 | *
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6 | * This library is free software; you can redistribute it and/or
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7 | * modify it under the terms of the GNU Lesser General Public
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8 | * License as published by the Free Software Foundation; either
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9 | * version 2 of the License, or (at your option) any later version.
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10 | *
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11 | * This library is distributed in the hope that it will be useful,
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12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | * Lesser General Public License for more details.
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15 | *
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16 | * You should have received a copy of the GNU Lesser General Public
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17 | * License along with this library; if not, write to the Free Software
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18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | */
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20 |
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21 | /*
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22 | * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
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23 | * other than GPL or LGPL is available it will apply instead, Sun elects to use only
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24 | * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
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25 | * a choice of LGPL license versions is made available with the language indicating
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26 | * that LGPLv2 or any later version may be used, or where a choice of which version
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27 | * of the LGPL is applied is otherwise unspecified.
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28 | */
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29 | #include "config.h"
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30 | #include "dyngen-exec.h"
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31 |
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32 | /* XXX: factorize this mess */
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33 | #ifdef TARGET_X86_64
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34 | #define TARGET_LONG_BITS 64
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35 | #else
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36 | #define TARGET_LONG_BITS 32
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37 | #endif
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38 |
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39 | #include "cpu-defs.h"
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40 |
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41 | /* at least 4 register variables are defined */
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42 | register struct CPUX86State *env asm(AREG0);
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43 |
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44 | #if TARGET_LONG_BITS > HOST_LONG_BITS
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45 |
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46 | /* no registers can be used */
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47 | #define T0 (env->t0)
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48 | #define T1 (env->t1)
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49 | #define T2 (env->t2)
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50 |
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51 | #else
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52 |
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53 | /* XXX: use unsigned long instead of target_ulong - better code will
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54 | be generated for 64 bit CPUs */
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55 | register target_ulong T0 asm(AREG1);
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56 | register target_ulong T1 asm(AREG2);
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57 | register target_ulong T2 asm(AREG3);
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58 |
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59 | /* if more registers are available, we define some registers too */
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60 | #ifdef AREG4
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61 | register target_ulong EAX asm(AREG4);
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62 | #define reg_EAX
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63 | #endif
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64 |
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65 | #ifdef AREG5
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66 | register target_ulong ESP asm(AREG5);
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67 | #define reg_ESP
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68 | #endif
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69 |
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70 | #ifdef AREG6
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71 | register target_ulong EBP asm(AREG6);
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72 | #define reg_EBP
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73 | #endif
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74 |
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75 | #ifdef AREG7
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76 | register target_ulong ECX asm(AREG7);
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77 | #define reg_ECX
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78 | #endif
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79 |
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80 | #ifdef AREG8
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81 | register target_ulong EDX asm(AREG8);
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82 | #define reg_EDX
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83 | #endif
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84 |
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85 | #ifdef AREG9
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86 | register target_ulong EBX asm(AREG9);
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87 | #define reg_EBX
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88 | #endif
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89 |
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90 | #ifdef AREG10
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91 | register target_ulong ESI asm(AREG10);
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92 | #define reg_ESI
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93 | #endif
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94 |
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95 | #ifdef AREG11
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96 | register target_ulong EDI asm(AREG11);
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97 | #define reg_EDI
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98 | #endif
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99 |
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100 | #endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
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101 |
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102 | #define A0 T2
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103 |
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104 | extern FILE *logfile;
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105 | extern int loglevel;
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106 |
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107 | #ifndef reg_EAX
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108 | #define EAX (env->regs[R_EAX])
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109 | #endif
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110 | #ifndef reg_ECX
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111 | #define ECX (env->regs[R_ECX])
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112 | #endif
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113 | #ifndef reg_EDX
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114 | #define EDX (env->regs[R_EDX])
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115 | #endif
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116 | #ifndef reg_EBX
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117 | #define EBX (env->regs[R_EBX])
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118 | #endif
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119 | #ifndef reg_ESP
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120 | #define ESP (env->regs[R_ESP])
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121 | #endif
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122 | #ifndef reg_EBP
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123 | #define EBP (env->regs[R_EBP])
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124 | #endif
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125 | #ifndef reg_ESI
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126 | #define ESI (env->regs[R_ESI])
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127 | #endif
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128 | #ifndef reg_EDI
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129 | #define EDI (env->regs[R_EDI])
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130 | #endif
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131 | #define EIP (env->eip)
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132 | #define DF (env->df)
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133 |
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134 | #define CC_SRC (env->cc_src)
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135 | #define CC_DST (env->cc_dst)
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136 | #define CC_OP (env->cc_op)
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137 |
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138 | /* float macros */
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139 | #define FT0 (env->ft0)
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140 | #define ST0 (env->fpregs[env->fpstt].d)
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141 | #define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
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142 | #define ST1 ST(1)
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143 |
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144 | #ifdef USE_FP_CONVERT
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145 | #define FP_CONVERT (env->fp_convert)
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146 | #endif
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147 |
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148 | #include "cpu.h"
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149 | #include "exec-all.h"
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150 |
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151 | typedef struct CCTable {
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152 | int (*compute_all)(void); /* return all the flags */
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153 | int (*compute_c)(void); /* return the C flag */
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154 | } CCTable;
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155 |
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156 | extern CCTable cc_table[];
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157 |
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158 | void load_seg(int seg_reg, int selector);
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159 | void helper_ljmp_protected_T0_T1(int next_eip);
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160 | void helper_lcall_real_T0_T1(int shift, int next_eip);
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161 | void helper_lcall_protected_T0_T1(int shift, int next_eip);
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162 | void helper_iret_real(int shift);
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163 | void helper_iret_protected(int shift, int next_eip);
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164 | void helper_lret_protected(int shift, int addend);
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165 | void helper_lldt_T0(void);
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166 | void helper_ltr_T0(void);
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167 | void helper_movl_crN_T0(int reg);
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168 | void helper_movl_drN_T0(int reg);
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169 | void helper_invlpg(target_ulong addr);
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170 | void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
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171 | void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
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172 | void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
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173 | void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
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174 | int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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175 | int is_write, int is_user, int is_softmmu);
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176 | void tlb_fill(target_ulong addr, int is_write, int is_user,
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177 | void *retaddr);
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178 | void __hidden cpu_lock(void);
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179 | void __hidden cpu_unlock(void);
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180 | void do_interrupt(int intno, int is_int, int error_code,
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181 | target_ulong next_eip, int is_hw);
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182 | void do_interrupt_user(int intno, int is_int, int error_code,
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183 | target_ulong next_eip);
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184 | void raise_interrupt(int intno, int is_int, int error_code,
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185 | int next_eip_addend);
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186 | void raise_exception_err(int exception_index, int error_code);
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187 | void raise_exception(int exception_index);
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188 | void do_smm_enter(void);
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189 | void __hidden cpu_loop_exit(void);
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190 |
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191 | void OPPROTO op_movl_eflags_T0(void);
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192 | void OPPROTO op_movl_T0_eflags(void);
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193 | #ifdef VBOX
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194 | void OPPROTO op_movl_T0_eflags_vme(void);
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195 | void OPPROTO op_movw_eflags_T0_vme(void);
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196 | void OPPROTO op_cli_vme(void);
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197 | void OPPROTO op_sti_vme(void);
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198 | #endif
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199 | void helper_divl_EAX_T0(void);
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200 | void helper_idivl_EAX_T0(void);
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201 | void helper_mulq_EAX_T0(void);
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202 | void helper_imulq_EAX_T0(void);
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203 | void helper_imulq_T0_T1(void);
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204 | void helper_divq_EAX_T0(void);
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205 | void helper_idivq_EAX_T0(void);
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206 | void helper_bswapq_T0(void);
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207 | void helper_cmpxchg8b(void);
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208 | void helper_single_step(void);
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209 | void helper_cpuid(void);
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210 | void helper_enter_level(int level, int data32);
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211 | void helper_enter64_level(int level, int data64);
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212 | void helper_sysenter(void);
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213 | void helper_sysexit(void);
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214 | void helper_syscall(int next_eip_addend);
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215 | void helper_sysret(int dflag);
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216 | void helper_rdtsc(void);
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217 | void helper_rdmsr(void);
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218 | void helper_wrmsr(void);
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219 | void helper_lsl(void);
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220 | void helper_lar(void);
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221 | void helper_verr(void);
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222 | void helper_verw(void);
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223 | void helper_rsm(void);
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224 |
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225 | #ifdef VBOX
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226 | void helper_external_event(void);
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227 | void helper_record_call(void);
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228 |
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229 | /* in helper.c */
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230 | void sync_seg(CPUX86State *env1, int seg_reg, int selector);
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231 | void sync_ldtr(CPUX86State *env1, int selector);
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232 | int sync_tr(CPUX86State *env1, int selector);
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233 |
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234 | #endif
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235 |
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236 | void check_iob_T0(void);
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237 | void check_iow_T0(void);
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238 | void check_iol_T0(void);
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239 | void check_iob_DX(void);
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240 | void check_iow_DX(void);
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241 | void check_iol_DX(void);
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242 |
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243 | #if !defined(CONFIG_USER_ONLY)
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244 |
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245 | #include "softmmu_exec.h"
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246 |
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247 | static inline double ldfq(target_ulong ptr)
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248 | {
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249 | union {
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250 | double d;
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251 | uint64_t i;
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252 | } u;
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253 | u.i = ldq(ptr);
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254 | return u.d;
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255 | }
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256 |
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257 | static inline void stfq(target_ulong ptr, double v)
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258 | {
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259 | union {
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260 | double d;
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261 | uint64_t i;
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262 | } u;
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263 | u.d = v;
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264 | stq(ptr, u.i);
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265 | }
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266 |
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267 | static inline float ldfl(target_ulong ptr)
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268 | {
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269 | union {
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270 | float f;
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271 | uint32_t i;
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272 | } u;
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273 | u.i = ldl(ptr);
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274 | return u.f;
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275 | }
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276 |
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277 | static inline void stfl(target_ulong ptr, float v)
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278 | {
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279 | union {
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280 | float f;
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281 | uint32_t i;
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282 | } u;
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283 | u.f = v;
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284 | stl(ptr, u.i);
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285 | }
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286 |
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287 | #endif /* !defined(CONFIG_USER_ONLY) */
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288 |
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289 | #ifdef USE_X86LDOUBLE
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290 | /* use long double functions */
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291 | #define floatx_to_int32 floatx80_to_int32
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292 | #define floatx_to_int64 floatx80_to_int64
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293 | #define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
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294 | #define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
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295 | #define floatx_abs floatx80_abs
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296 | #define floatx_chs floatx80_chs
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297 | #define floatx_round_to_int floatx80_round_to_int
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298 | #define floatx_compare floatx80_compare
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299 | #define floatx_compare_quiet floatx80_compare_quiet
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300 | #ifdef VBOX
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301 | #undef sin
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302 | #undef cos
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303 | #undef sqrt
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304 | #undef pow
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305 | #undef log
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306 | #undef tan
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307 | #undef atan2
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308 | #undef floor
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309 | #undef ceil
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310 | #undef ldexp
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311 | #endif /* !VBOX */
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312 | #define sin sinl
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313 | #define cos cosl
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314 | #define sqrt sqrtl
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315 | #define pow powl
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316 | #define log logl
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317 | #define tan tanl
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318 | #define atan2 atan2l
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319 | #define floor floorl
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320 | #define ceil ceill
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321 | #define ldexp ldexpl
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322 | #else
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323 | #define floatx_to_int32 float64_to_int32
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324 | #define floatx_to_int64 float64_to_int64
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325 | #define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
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326 | #define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
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327 | #define floatx_abs float64_abs
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328 | #define floatx_chs float64_chs
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329 | #define floatx_round_to_int float64_round_to_int
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330 | #define floatx_compare float64_compare
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331 | #define floatx_compare_quiet float64_compare_quiet
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332 | #endif
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333 |
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334 | extern CPU86_LDouble sin(CPU86_LDouble x);
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335 | extern CPU86_LDouble cos(CPU86_LDouble x);
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336 | extern CPU86_LDouble sqrt(CPU86_LDouble x);
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337 | extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
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338 | extern CPU86_LDouble log(CPU86_LDouble x);
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339 | extern CPU86_LDouble tan(CPU86_LDouble x);
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340 | extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
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341 | extern CPU86_LDouble floor(CPU86_LDouble x);
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342 | extern CPU86_LDouble ceil(CPU86_LDouble x);
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343 |
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344 | #define RC_MASK 0xc00
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345 | #define RC_NEAR 0x000
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346 | #define RC_DOWN 0x400
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347 | #define RC_UP 0x800
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348 | #define RC_CHOP 0xc00
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349 |
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350 | #define MAXTAN 9223372036854775808.0
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351 |
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352 | #ifdef USE_X86LDOUBLE
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353 |
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354 | /* only for x86 */
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355 | typedef union {
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356 | long double d;
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357 | struct {
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358 | unsigned long long lower;
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359 | unsigned short upper;
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360 | } l;
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361 | } CPU86_LDoubleU;
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362 |
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363 | /* the following deal with x86 long double-precision numbers */
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364 | #define MAXEXPD 0x7fff
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365 | #define EXPBIAS 16383
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366 | #define EXPD(fp) (fp.l.upper & 0x7fff)
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367 | #define SIGND(fp) ((fp.l.upper) & 0x8000)
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368 | #define MANTD(fp) (fp.l.lower)
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369 | #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
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370 |
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371 | #else
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372 |
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373 | /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
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374 | typedef union {
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375 | double d;
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376 | #if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
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377 | struct {
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378 | uint32_t lower;
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379 | int32_t upper;
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380 | } l;
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381 | #else
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382 | struct {
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383 | int32_t upper;
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384 | uint32_t lower;
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385 | } l;
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386 | #endif
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387 | #ifndef __arm__
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388 | int64_t ll;
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389 | #endif
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390 | } CPU86_LDoubleU;
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391 |
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392 | /* the following deal with IEEE double-precision numbers */
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393 | #define MAXEXPD 0x7ff
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394 | #define EXPBIAS 1023
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395 | #define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
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396 | #define SIGND(fp) ((fp.l.upper) & 0x80000000)
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397 | #ifdef __arm__
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398 | #define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
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399 | #else
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400 | #define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
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401 | #endif
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402 | #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
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403 | #endif
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404 |
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405 | static inline void fpush(void)
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406 | {
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407 | env->fpstt = (env->fpstt - 1) & 7;
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408 | env->fptags[env->fpstt] = 0; /* validate stack entry */
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409 | }
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410 |
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411 | static inline void fpop(void)
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412 | {
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413 | env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
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414 | env->fpstt = (env->fpstt + 1) & 7;
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415 | }
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416 |
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417 | #ifndef USE_X86LDOUBLE
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418 | static inline CPU86_LDouble helper_fldt(target_ulong ptr)
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419 | {
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420 | CPU86_LDoubleU temp;
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421 | int upper, e;
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422 | uint64_t ll;
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423 |
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424 | /* mantissa */
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425 | upper = lduw(ptr + 8);
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426 | /* XXX: handle overflow ? */
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427 | e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
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428 | e |= (upper >> 4) & 0x800; /* sign */
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429 | ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
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430 | #ifdef __arm__
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431 | temp.l.upper = (e << 20) | (ll >> 32);
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432 | temp.l.lower = ll;
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433 | #else
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434 | temp.ll = ll | ((uint64_t)e << 52);
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435 | #endif
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436 | return temp.d;
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437 | }
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438 |
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439 | static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
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440 | {
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441 | CPU86_LDoubleU temp;
|
---|
442 | int e;
|
---|
443 |
|
---|
444 | temp.d = f;
|
---|
445 | /* mantissa */
|
---|
446 | stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
|
---|
447 | /* exponent + sign */
|
---|
448 | e = EXPD(temp) - EXPBIAS + 16383;
|
---|
449 | e |= SIGND(temp) >> 16;
|
---|
450 | stw(ptr + 8, e);
|
---|
451 | }
|
---|
452 | #else
|
---|
453 |
|
---|
454 | /* XXX: same endianness assumed */
|
---|
455 |
|
---|
456 | #ifdef CONFIG_USER_ONLY
|
---|
457 |
|
---|
458 | static inline CPU86_LDouble helper_fldt(target_ulong ptr)
|
---|
459 | {
|
---|
460 | return *(CPU86_LDouble *)ptr;
|
---|
461 | }
|
---|
462 |
|
---|
463 | static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
|
---|
464 | {
|
---|
465 | *(CPU86_LDouble *)ptr = f;
|
---|
466 | }
|
---|
467 |
|
---|
468 | #else
|
---|
469 |
|
---|
470 | /* we use memory access macros */
|
---|
471 |
|
---|
472 | static inline CPU86_LDouble helper_fldt(target_ulong ptr)
|
---|
473 | {
|
---|
474 | CPU86_LDoubleU temp;
|
---|
475 |
|
---|
476 | temp.l.lower = ldq(ptr);
|
---|
477 | temp.l.upper = lduw(ptr + 8);
|
---|
478 | return temp.d;
|
---|
479 | }
|
---|
480 |
|
---|
481 | static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
|
---|
482 | {
|
---|
483 | CPU86_LDoubleU temp;
|
---|
484 |
|
---|
485 | temp.d = f;
|
---|
486 | stq(ptr, temp.l.lower);
|
---|
487 | stw(ptr + 8, temp.l.upper);
|
---|
488 | }
|
---|
489 |
|
---|
490 | #endif /* !CONFIG_USER_ONLY */
|
---|
491 |
|
---|
492 | #endif /* USE_X86LDOUBLE */
|
---|
493 |
|
---|
494 | #define FPUS_IE (1 << 0)
|
---|
495 | #define FPUS_DE (1 << 1)
|
---|
496 | #define FPUS_ZE (1 << 2)
|
---|
497 | #define FPUS_OE (1 << 3)
|
---|
498 | #define FPUS_UE (1 << 4)
|
---|
499 | #define FPUS_PE (1 << 5)
|
---|
500 | #define FPUS_SF (1 << 6)
|
---|
501 | #define FPUS_SE (1 << 7)
|
---|
502 | #define FPUS_B (1 << 15)
|
---|
503 |
|
---|
504 | #define FPUC_EM 0x3f
|
---|
505 |
|
---|
506 | extern const CPU86_LDouble f15rk[7];
|
---|
507 |
|
---|
508 | void helper_fldt_ST0_A0(void);
|
---|
509 | void helper_fstt_ST0_A0(void);
|
---|
510 | void fpu_raise_exception(void);
|
---|
511 | CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
|
---|
512 | void helper_fbld_ST0_A0(void);
|
---|
513 | void helper_fbst_ST0_A0(void);
|
---|
514 | void helper_f2xm1(void);
|
---|
515 | void helper_fyl2x(void);
|
---|
516 | void helper_fptan(void);
|
---|
517 | void helper_fpatan(void);
|
---|
518 | void helper_fxtract(void);
|
---|
519 | void helper_fprem1(void);
|
---|
520 | void helper_fprem(void);
|
---|
521 | void helper_fyl2xp1(void);
|
---|
522 | void helper_fsqrt(void);
|
---|
523 | void helper_fsincos(void);
|
---|
524 | void helper_frndint(void);
|
---|
525 | void helper_fscale(void);
|
---|
526 | void helper_fsin(void);
|
---|
527 | void helper_fcos(void);
|
---|
528 | void helper_fxam_ST0(void);
|
---|
529 | void helper_fstenv(target_ulong ptr, int data32);
|
---|
530 | void helper_fldenv(target_ulong ptr, int data32);
|
---|
531 | void helper_fsave(target_ulong ptr, int data32);
|
---|
532 | void helper_frstor(target_ulong ptr, int data32);
|
---|
533 | void helper_fxsave(target_ulong ptr, int data64);
|
---|
534 | void helper_fxrstor(target_ulong ptr, int data64);
|
---|
535 | void restore_native_fp_state(CPUState *env);
|
---|
536 | void save_native_fp_state(CPUState *env);
|
---|
537 | float approx_rsqrt(float a);
|
---|
538 | float approx_rcp(float a);
|
---|
539 | void update_fp_status(void);
|
---|
540 | void helper_hlt(void);
|
---|
541 | void helper_monitor(void);
|
---|
542 | void helper_mwait(void);
|
---|
543 |
|
---|
544 | extern const uint8_t parity_table[256];
|
---|
545 | extern const uint8_t rclw_table[32];
|
---|
546 | extern const uint8_t rclb_table[32];
|
---|
547 |
|
---|
548 | static inline uint32_t compute_eflags(void)
|
---|
549 | {
|
---|
550 | return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
|
---|
551 | }
|
---|
552 |
|
---|
553 | /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
|
---|
554 | static inline void load_eflags(int eflags, int update_mask)
|
---|
555 | {
|
---|
556 | CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
|
---|
557 | DF = 1 - (2 * ((eflags >> 10) & 1));
|
---|
558 | env->eflags = (env->eflags & ~update_mask) |
|
---|
559 | (eflags & update_mask);
|
---|
560 | }
|
---|
561 |
|
---|
562 | static inline void env_to_regs(void)
|
---|
563 | {
|
---|
564 | #ifdef reg_EAX
|
---|
565 | EAX = env->regs[R_EAX];
|
---|
566 | #endif
|
---|
567 | #ifdef reg_ECX
|
---|
568 | ECX = env->regs[R_ECX];
|
---|
569 | #endif
|
---|
570 | #ifdef reg_EDX
|
---|
571 | EDX = env->regs[R_EDX];
|
---|
572 | #endif
|
---|
573 | #ifdef reg_EBX
|
---|
574 | EBX = env->regs[R_EBX];
|
---|
575 | #endif
|
---|
576 | #ifdef reg_ESP
|
---|
577 | ESP = env->regs[R_ESP];
|
---|
578 | #endif
|
---|
579 | #ifdef reg_EBP
|
---|
580 | EBP = env->regs[R_EBP];
|
---|
581 | #endif
|
---|
582 | #ifdef reg_ESI
|
---|
583 | ESI = env->regs[R_ESI];
|
---|
584 | #endif
|
---|
585 | #ifdef reg_EDI
|
---|
586 | EDI = env->regs[R_EDI];
|
---|
587 | #endif
|
---|
588 | }
|
---|
589 |
|
---|
590 | static inline void regs_to_env(void)
|
---|
591 | {
|
---|
592 | #ifdef reg_EAX
|
---|
593 | env->regs[R_EAX] = EAX;
|
---|
594 | #endif
|
---|
595 | #ifdef reg_ECX
|
---|
596 | env->regs[R_ECX] = ECX;
|
---|
597 | #endif
|
---|
598 | #ifdef reg_EDX
|
---|
599 | env->regs[R_EDX] = EDX;
|
---|
600 | #endif
|
---|
601 | #ifdef reg_EBX
|
---|
602 | env->regs[R_EBX] = EBX;
|
---|
603 | #endif
|
---|
604 | #ifdef reg_ESP
|
---|
605 | env->regs[R_ESP] = ESP;
|
---|
606 | #endif
|
---|
607 | #ifdef reg_EBP
|
---|
608 | env->regs[R_EBP] = EBP;
|
---|
609 | #endif
|
---|
610 | #ifdef reg_ESI
|
---|
611 | env->regs[R_ESI] = ESI;
|
---|
612 | #endif
|
---|
613 | #ifdef reg_EDI
|
---|
614 | env->regs[R_EDI] = EDI;
|
---|
615 | #endif
|
---|
616 | }
|
---|