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source: vbox/trunk/src/recompiler/target-i386/ops_sse.h@ 37419

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rem: Synced up to v0.11.1 (35bfc7324e2e6946c4113ada5db30553a1a7c40b) from git://git.savannah.nongnu.org/qemu.git.

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1/*
2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support
3 *
4 * Copyright (c) 2005 Fabrice Bellard
5 * Copyright (c) 2008 Intel Corporation <[email protected]>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21/*
22 * Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23 * other than GPL or LGPL is available it will apply instead, Oracle elects to use only
24 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25 * a choice of LGPL license versions is made available with the language indicating
26 * that LGPLv2 or any later version may be used, or where a choice of which version
27 * of the LGPL is applied is otherwise unspecified.
28 */
29
30#if SHIFT == 0
31#define Reg MMXReg
32#define XMM_ONLY(...)
33#define B(n) MMX_B(n)
34#define W(n) MMX_W(n)
35#define L(n) MMX_L(n)
36#define Q(n) q
37#define SUFFIX _mmx
38#else
39#define Reg XMMReg
40#define XMM_ONLY(...) __VA_ARGS__
41#define B(n) XMM_B(n)
42#define W(n) XMM_W(n)
43#define L(n) XMM_L(n)
44#define Q(n) XMM_Q(n)
45#define SUFFIX _xmm
46#endif
47
48void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s)
49{
50 int shift;
51
52 if (s->Q(0) > 15) {
53 d->Q(0) = 0;
54#if SHIFT == 1
55 d->Q(1) = 0;
56#endif
57 } else {
58 shift = s->B(0);
59 d->W(0) >>= shift;
60 d->W(1) >>= shift;
61 d->W(2) >>= shift;
62 d->W(3) >>= shift;
63#if SHIFT == 1
64 d->W(4) >>= shift;
65 d->W(5) >>= shift;
66 d->W(6) >>= shift;
67 d->W(7) >>= shift;
68#endif
69 }
70}
71
72void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s)
73{
74 int shift;
75
76 if (s->Q(0) > 15) {
77 shift = 15;
78 } else {
79 shift = s->B(0);
80 }
81 d->W(0) = (int16_t)d->W(0) >> shift;
82 d->W(1) = (int16_t)d->W(1) >> shift;
83 d->W(2) = (int16_t)d->W(2) >> shift;
84 d->W(3) = (int16_t)d->W(3) >> shift;
85#if SHIFT == 1
86 d->W(4) = (int16_t)d->W(4) >> shift;
87 d->W(5) = (int16_t)d->W(5) >> shift;
88 d->W(6) = (int16_t)d->W(6) >> shift;
89 d->W(7) = (int16_t)d->W(7) >> shift;
90#endif
91}
92
93void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s)
94{
95 int shift;
96
97 if (s->Q(0) > 15) {
98 d->Q(0) = 0;
99#if SHIFT == 1
100 d->Q(1) = 0;
101#endif
102 } else {
103 shift = s->B(0);
104 d->W(0) <<= shift;
105 d->W(1) <<= shift;
106 d->W(2) <<= shift;
107 d->W(3) <<= shift;
108#if SHIFT == 1
109 d->W(4) <<= shift;
110 d->W(5) <<= shift;
111 d->W(6) <<= shift;
112 d->W(7) <<= shift;
113#endif
114 }
115}
116
117void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s)
118{
119 int shift;
120
121 if (s->Q(0) > 31) {
122 d->Q(0) = 0;
123#if SHIFT == 1
124 d->Q(1) = 0;
125#endif
126 } else {
127 shift = s->B(0);
128 d->L(0) >>= shift;
129 d->L(1) >>= shift;
130#if SHIFT == 1
131 d->L(2) >>= shift;
132 d->L(3) >>= shift;
133#endif
134 }
135}
136
137void glue(helper_psrad, SUFFIX)(Reg *d, Reg *s)
138{
139 int shift;
140
141 if (s->Q(0) > 31) {
142 shift = 31;
143 } else {
144 shift = s->B(0);
145 }
146 d->L(0) = (int32_t)d->L(0) >> shift;
147 d->L(1) = (int32_t)d->L(1) >> shift;
148#if SHIFT == 1
149 d->L(2) = (int32_t)d->L(2) >> shift;
150 d->L(3) = (int32_t)d->L(3) >> shift;
151#endif
152}
153
154void glue(helper_pslld, SUFFIX)(Reg *d, Reg *s)
155{
156 int shift;
157
158 if (s->Q(0) > 31) {
159 d->Q(0) = 0;
160#if SHIFT == 1
161 d->Q(1) = 0;
162#endif
163 } else {
164 shift = s->B(0);
165 d->L(0) <<= shift;
166 d->L(1) <<= shift;
167#if SHIFT == 1
168 d->L(2) <<= shift;
169 d->L(3) <<= shift;
170#endif
171 }
172}
173
174void glue(helper_psrlq, SUFFIX)(Reg *d, Reg *s)
175{
176 int shift;
177
178 if (s->Q(0) > 63) {
179 d->Q(0) = 0;
180#if SHIFT == 1
181 d->Q(1) = 0;
182#endif
183 } else {
184 shift = s->B(0);
185 d->Q(0) >>= shift;
186#if SHIFT == 1
187 d->Q(1) >>= shift;
188#endif
189 }
190}
191
192void glue(helper_psllq, SUFFIX)(Reg *d, Reg *s)
193{
194 int shift;
195
196 if (s->Q(0) > 63) {
197 d->Q(0) = 0;
198#if SHIFT == 1
199 d->Q(1) = 0;
200#endif
201 } else {
202 shift = s->B(0);
203 d->Q(0) <<= shift;
204#if SHIFT == 1
205 d->Q(1) <<= shift;
206#endif
207 }
208}
209
210#if SHIFT == 1
211void glue(helper_psrldq, SUFFIX)(Reg *d, Reg *s)
212{
213 int shift, i;
214
215 shift = s->L(0);
216 if (shift > 16)
217 shift = 16;
218 for(i = 0; i < 16 - shift; i++)
219 d->B(i) = d->B(i + shift);
220 for(i = 16 - shift; i < 16; i++)
221 d->B(i) = 0;
222}
223
224void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s)
225{
226 int shift, i;
227
228 shift = s->L(0);
229 if (shift > 16)
230 shift = 16;
231 for(i = 15; i >= shift; i--)
232 d->B(i) = d->B(i - shift);
233 for(i = 0; i < shift; i++)
234 d->B(i) = 0;
235}
236#endif
237
238#define SSE_HELPER_B(name, F)\
239void glue(name, SUFFIX) (Reg *d, Reg *s)\
240{\
241 d->B(0) = F(d->B(0), s->B(0));\
242 d->B(1) = F(d->B(1), s->B(1));\
243 d->B(2) = F(d->B(2), s->B(2));\
244 d->B(3) = F(d->B(3), s->B(3));\
245 d->B(4) = F(d->B(4), s->B(4));\
246 d->B(5) = F(d->B(5), s->B(5));\
247 d->B(6) = F(d->B(6), s->B(6));\
248 d->B(7) = F(d->B(7), s->B(7));\
249 XMM_ONLY(\
250 d->B(8) = F(d->B(8), s->B(8));\
251 d->B(9) = F(d->B(9), s->B(9));\
252 d->B(10) = F(d->B(10), s->B(10));\
253 d->B(11) = F(d->B(11), s->B(11));\
254 d->B(12) = F(d->B(12), s->B(12));\
255 d->B(13) = F(d->B(13), s->B(13));\
256 d->B(14) = F(d->B(14), s->B(14));\
257 d->B(15) = F(d->B(15), s->B(15));\
258 )\
259}
260
261#define SSE_HELPER_W(name, F)\
262void glue(name, SUFFIX) (Reg *d, Reg *s)\
263{\
264 d->W(0) = F(d->W(0), s->W(0));\
265 d->W(1) = F(d->W(1), s->W(1));\
266 d->W(2) = F(d->W(2), s->W(2));\
267 d->W(3) = F(d->W(3), s->W(3));\
268 XMM_ONLY(\
269 d->W(4) = F(d->W(4), s->W(4));\
270 d->W(5) = F(d->W(5), s->W(5));\
271 d->W(6) = F(d->W(6), s->W(6));\
272 d->W(7) = F(d->W(7), s->W(7));\
273 )\
274}
275
276#define SSE_HELPER_L(name, F)\
277void glue(name, SUFFIX) (Reg *d, Reg *s)\
278{\
279 d->L(0) = F(d->L(0), s->L(0));\
280 d->L(1) = F(d->L(1), s->L(1));\
281 XMM_ONLY(\
282 d->L(2) = F(d->L(2), s->L(2));\
283 d->L(3) = F(d->L(3), s->L(3));\
284 )\
285}
286
287#define SSE_HELPER_Q(name, F)\
288void glue(name, SUFFIX) (Reg *d, Reg *s)\
289{\
290 d->Q(0) = F(d->Q(0), s->Q(0));\
291 XMM_ONLY(\
292 d->Q(1) = F(d->Q(1), s->Q(1));\
293 )\
294}
295
296#if SHIFT == 0
297static inline int satub(int x)
298{
299 if (x < 0)
300 return 0;
301 else if (x > 255)
302 return 255;
303 else
304 return x;
305}
306
307static inline int satuw(int x)
308{
309 if (x < 0)
310 return 0;
311 else if (x > 65535)
312 return 65535;
313 else
314 return x;
315}
316
317static inline int satsb(int x)
318{
319 if (x < -128)
320 return -128;
321 else if (x > 127)
322 return 127;
323 else
324 return x;
325}
326
327static inline int satsw(int x)
328{
329 if (x < -32768)
330 return -32768;
331 else if (x > 32767)
332 return 32767;
333 else
334 return x;
335}
336
337#define FADD(a, b) ((a) + (b))
338#define FADDUB(a, b) satub((a) + (b))
339#define FADDUW(a, b) satuw((a) + (b))
340#define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
341#define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
342
343#define FSUB(a, b) ((a) - (b))
344#define FSUBUB(a, b) satub((a) - (b))
345#define FSUBUW(a, b) satuw((a) - (b))
346#define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
347#define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
348#define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
349#define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
350#define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
351#define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
352
353#define FAND(a, b) (a) & (b)
354#define FANDN(a, b) ((~(a)) & (b))
355#define FOR(a, b) (a) | (b)
356#define FXOR(a, b) (a) ^ (b)
357
358#define FCMPGTB(a, b) (int8_t)(a) > (int8_t)(b) ? -1 : 0
359#define FCMPGTW(a, b) (int16_t)(a) > (int16_t)(b) ? -1 : 0
360#define FCMPGTL(a, b) (int32_t)(a) > (int32_t)(b) ? -1 : 0
361#define FCMPEQ(a, b) (a) == (b) ? -1 : 0
362
363#define FMULLW(a, b) (a) * (b)
364#define FMULHRW(a, b) ((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16
365#define FMULHUW(a, b) (a) * (b) >> 16
366#define FMULHW(a, b) (int16_t)(a) * (int16_t)(b) >> 16
367
368#define FAVG(a, b) ((a) + (b) + 1) >> 1
369#endif
370
371SSE_HELPER_B(helper_paddb, FADD)
372SSE_HELPER_W(helper_paddw, FADD)
373SSE_HELPER_L(helper_paddl, FADD)
374SSE_HELPER_Q(helper_paddq, FADD)
375
376SSE_HELPER_B(helper_psubb, FSUB)
377SSE_HELPER_W(helper_psubw, FSUB)
378SSE_HELPER_L(helper_psubl, FSUB)
379SSE_HELPER_Q(helper_psubq, FSUB)
380
381SSE_HELPER_B(helper_paddusb, FADDUB)
382SSE_HELPER_B(helper_paddsb, FADDSB)
383SSE_HELPER_B(helper_psubusb, FSUBUB)
384SSE_HELPER_B(helper_psubsb, FSUBSB)
385
386SSE_HELPER_W(helper_paddusw, FADDUW)
387SSE_HELPER_W(helper_paddsw, FADDSW)
388SSE_HELPER_W(helper_psubusw, FSUBUW)
389SSE_HELPER_W(helper_psubsw, FSUBSW)
390
391SSE_HELPER_B(helper_pminub, FMINUB)
392SSE_HELPER_B(helper_pmaxub, FMAXUB)
393
394SSE_HELPER_W(helper_pminsw, FMINSW)
395SSE_HELPER_W(helper_pmaxsw, FMAXSW)
396
397SSE_HELPER_Q(helper_pand, FAND)
398SSE_HELPER_Q(helper_pandn, FANDN)
399SSE_HELPER_Q(helper_por, FOR)
400SSE_HELPER_Q(helper_pxor, FXOR)
401
402SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
403SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
404SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
405
406SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
407SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
408SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
409
410SSE_HELPER_W(helper_pmullw, FMULLW)
411#if SHIFT == 0
412SSE_HELPER_W(helper_pmulhrw, FMULHRW)
413#endif
414SSE_HELPER_W(helper_pmulhuw, FMULHUW)
415SSE_HELPER_W(helper_pmulhw, FMULHW)
416
417SSE_HELPER_B(helper_pavgb, FAVG)
418SSE_HELPER_W(helper_pavgw, FAVG)
419
420void glue(helper_pmuludq, SUFFIX) (Reg *d, Reg *s)
421{
422 d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0);
423#if SHIFT == 1
424 d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2);
425#endif
426}
427
428void glue(helper_pmaddwd, SUFFIX) (Reg *d, Reg *s)
429{
430 int i;
431
432 for(i = 0; i < (2 << SHIFT); i++) {
433 d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) +
434 (int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1);
435 }
436}
437
438#if SHIFT == 0
439static inline int abs1(int a)
440{
441 if (a < 0)
442 return -a;
443 else
444 return a;
445}
446#endif
447void glue(helper_psadbw, SUFFIX) (Reg *d, Reg *s)
448{
449 unsigned int val;
450
451 val = 0;
452 val += abs1(d->B(0) - s->B(0));
453 val += abs1(d->B(1) - s->B(1));
454 val += abs1(d->B(2) - s->B(2));
455 val += abs1(d->B(3) - s->B(3));
456 val += abs1(d->B(4) - s->B(4));
457 val += abs1(d->B(5) - s->B(5));
458 val += abs1(d->B(6) - s->B(6));
459 val += abs1(d->B(7) - s->B(7));
460 d->Q(0) = val;
461#if SHIFT == 1
462 val = 0;
463 val += abs1(d->B(8) - s->B(8));
464 val += abs1(d->B(9) - s->B(9));
465 val += abs1(d->B(10) - s->B(10));
466 val += abs1(d->B(11) - s->B(11));
467 val += abs1(d->B(12) - s->B(12));
468 val += abs1(d->B(13) - s->B(13));
469 val += abs1(d->B(14) - s->B(14));
470 val += abs1(d->B(15) - s->B(15));
471 d->Q(1) = val;
472#endif
473}
474
475void glue(helper_maskmov, SUFFIX) (Reg *d, Reg *s, target_ulong a0)
476{
477 int i;
478 for(i = 0; i < (8 << SHIFT); i++) {
479 if (s->B(i) & 0x80)
480 stb(a0 + i, d->B(i));
481 }
482}
483
484void glue(helper_movl_mm_T0, SUFFIX) (Reg *d, uint32_t val)
485{
486 d->L(0) = val;
487 d->L(1) = 0;
488#if SHIFT == 1
489 d->Q(1) = 0;
490#endif
491}
492
493#ifdef TARGET_X86_64
494void glue(helper_movq_mm_T0, SUFFIX) (Reg *d, uint64_t val)
495{
496 d->Q(0) = val;
497#if SHIFT == 1
498 d->Q(1) = 0;
499#endif
500}
501#endif
502
503#if SHIFT == 0
504void glue(helper_pshufw, SUFFIX) (Reg *d, Reg *s, int order)
505{
506 Reg r;
507 r.W(0) = s->W(order & 3);
508 r.W(1) = s->W((order >> 2) & 3);
509 r.W(2) = s->W((order >> 4) & 3);
510 r.W(3) = s->W((order >> 6) & 3);
511 *d = r;
512}
513#else
514void helper_shufps(Reg *d, Reg *s, int order)
515{
516 Reg r;
517 r.L(0) = d->L(order & 3);
518 r.L(1) = d->L((order >> 2) & 3);
519 r.L(2) = s->L((order >> 4) & 3);
520 r.L(3) = s->L((order >> 6) & 3);
521 *d = r;
522}
523
524void helper_shufpd(Reg *d, Reg *s, int order)
525{
526 Reg r;
527 r.Q(0) = d->Q(order & 1);
528 r.Q(1) = s->Q((order >> 1) & 1);
529 *d = r;
530}
531
532void glue(helper_pshufd, SUFFIX) (Reg *d, Reg *s, int order)
533{
534 Reg r;
535 r.L(0) = s->L(order & 3);
536 r.L(1) = s->L((order >> 2) & 3);
537 r.L(2) = s->L((order >> 4) & 3);
538 r.L(3) = s->L((order >> 6) & 3);
539 *d = r;
540}
541
542void glue(helper_pshuflw, SUFFIX) (Reg *d, Reg *s, int order)
543{
544 Reg r;
545 r.W(0) = s->W(order & 3);
546 r.W(1) = s->W((order >> 2) & 3);
547 r.W(2) = s->W((order >> 4) & 3);
548 r.W(3) = s->W((order >> 6) & 3);
549 r.Q(1) = s->Q(1);
550 *d = r;
551}
552
553void glue(helper_pshufhw, SUFFIX) (Reg *d, Reg *s, int order)
554{
555 Reg r;
556 r.Q(0) = s->Q(0);
557 r.W(4) = s->W(4 + (order & 3));
558 r.W(5) = s->W(4 + ((order >> 2) & 3));
559 r.W(6) = s->W(4 + ((order >> 4) & 3));
560 r.W(7) = s->W(4 + ((order >> 6) & 3));
561 *d = r;
562}
563#endif
564
565#if SHIFT == 1
566/* FPU ops */
567/* XXX: not accurate */
568
569#define SSE_HELPER_S(name, F)\
570void helper_ ## name ## ps (Reg *d, Reg *s)\
571{\
572 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
573 d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
574 d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
575 d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
576}\
577\
578void helper_ ## name ## ss (Reg *d, Reg *s)\
579{\
580 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
581}\
582void helper_ ## name ## pd (Reg *d, Reg *s)\
583{\
584 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
585 d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
586}\
587\
588void helper_ ## name ## sd (Reg *d, Reg *s)\
589{\
590 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
591}
592
593#define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status)
594#define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
595#define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
596#define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
597#define FPU_MIN(size, a, b) (a) < (b) ? (a) : (b)
598#define FPU_MAX(size, a, b) (a) > (b) ? (a) : (b)
599#define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status)
600
601SSE_HELPER_S(add, FPU_ADD)
602SSE_HELPER_S(sub, FPU_SUB)
603SSE_HELPER_S(mul, FPU_MUL)
604SSE_HELPER_S(div, FPU_DIV)
605SSE_HELPER_S(min, FPU_MIN)
606SSE_HELPER_S(max, FPU_MAX)
607SSE_HELPER_S(sqrt, FPU_SQRT)
608
609
610/* float to float conversions */
611void helper_cvtps2pd(Reg *d, Reg *s)
612{
613 float32 s0, s1;
614 s0 = s->XMM_S(0);
615 s1 = s->XMM_S(1);
616 d->XMM_D(0) = float32_to_float64(s0, &env->sse_status);
617 d->XMM_D(1) = float32_to_float64(s1, &env->sse_status);
618}
619
620void helper_cvtpd2ps(Reg *d, Reg *s)
621{
622 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
623 d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status);
624 d->Q(1) = 0;
625}
626
627void helper_cvtss2sd(Reg *d, Reg *s)
628{
629 d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status);
630}
631
632void helper_cvtsd2ss(Reg *d, Reg *s)
633{
634 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
635}
636
637/* integer to float */
638void helper_cvtdq2ps(Reg *d, Reg *s)
639{
640 d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status);
641 d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status);
642 d->XMM_S(2) = int32_to_float32(s->XMM_L(2), &env->sse_status);
643 d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status);
644}
645
646void helper_cvtdq2pd(Reg *d, Reg *s)
647{
648 int32_t l0, l1;
649 l0 = (int32_t)s->XMM_L(0);
650 l1 = (int32_t)s->XMM_L(1);
651 d->XMM_D(0) = int32_to_float64(l0, &env->sse_status);
652 d->XMM_D(1) = int32_to_float64(l1, &env->sse_status);
653}
654
655void helper_cvtpi2ps(XMMReg *d, MMXReg *s)
656{
657 d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status);
658 d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status);
659}
660
661void helper_cvtpi2pd(XMMReg *d, MMXReg *s)
662{
663 d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status);
664 d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status);
665}
666
667void helper_cvtsi2ss(XMMReg *d, uint32_t val)
668{
669 d->XMM_S(0) = int32_to_float32(val, &env->sse_status);
670}
671
672void helper_cvtsi2sd(XMMReg *d, uint32_t val)
673{
674 d->XMM_D(0) = int32_to_float64(val, &env->sse_status);
675}
676
677#ifdef TARGET_X86_64
678void helper_cvtsq2ss(XMMReg *d, uint64_t val)
679{
680 d->XMM_S(0) = int64_to_float32(val, &env->sse_status);
681}
682
683void helper_cvtsq2sd(XMMReg *d, uint64_t val)
684{
685 d->XMM_D(0) = int64_to_float64(val, &env->sse_status);
686}
687#endif
688
689/* float to integer */
690void helper_cvtps2dq(XMMReg *d, XMMReg *s)
691{
692 d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
693 d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
694 d->XMM_L(2) = float32_to_int32(s->XMM_S(2), &env->sse_status);
695 d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status);
696}
697
698void helper_cvtpd2dq(XMMReg *d, XMMReg *s)
699{
700 d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
701 d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
702 d->XMM_Q(1) = 0;
703}
704
705void helper_cvtps2pi(MMXReg *d, XMMReg *s)
706{
707 d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
708 d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
709}
710
711void helper_cvtpd2pi(MMXReg *d, XMMReg *s)
712{
713 d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
714 d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
715}
716
717int32_t helper_cvtss2si(XMMReg *s)
718{
719 return float32_to_int32(s->XMM_S(0), &env->sse_status);
720}
721
722int32_t helper_cvtsd2si(XMMReg *s)
723{
724 return float64_to_int32(s->XMM_D(0), &env->sse_status);
725}
726
727#ifdef TARGET_X86_64
728int64_t helper_cvtss2sq(XMMReg *s)
729{
730 return float32_to_int64(s->XMM_S(0), &env->sse_status);
731}
732
733int64_t helper_cvtsd2sq(XMMReg *s)
734{
735 return float64_to_int64(s->XMM_D(0), &env->sse_status);
736}
737#endif
738
739/* float to integer truncated */
740void helper_cvttps2dq(XMMReg *d, XMMReg *s)
741{
742 d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
743 d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
744 d->XMM_L(2) = float32_to_int32_round_to_zero(s->XMM_S(2), &env->sse_status);
745 d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status);
746}
747
748void helper_cvttpd2dq(XMMReg *d, XMMReg *s)
749{
750 d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
751 d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
752 d->XMM_Q(1) = 0;
753}
754
755void helper_cvttps2pi(MMXReg *d, XMMReg *s)
756{
757 d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
758 d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
759}
760
761void helper_cvttpd2pi(MMXReg *d, XMMReg *s)
762{
763 d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
764 d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
765}
766
767int32_t helper_cvttss2si(XMMReg *s)
768{
769 return float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
770}
771
772int32_t helper_cvttsd2si(XMMReg *s)
773{
774 return float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
775}
776
777#ifdef TARGET_X86_64
778int64_t helper_cvttss2sq(XMMReg *s)
779{
780 return float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status);
781}
782
783int64_t helper_cvttsd2sq(XMMReg *s)
784{
785 return float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status);
786}
787#endif
788
789void helper_rsqrtps(XMMReg *d, XMMReg *s)
790{
791 d->XMM_S(0) = approx_rsqrt(s->XMM_S(0));
792 d->XMM_S(1) = approx_rsqrt(s->XMM_S(1));
793 d->XMM_S(2) = approx_rsqrt(s->XMM_S(2));
794 d->XMM_S(3) = approx_rsqrt(s->XMM_S(3));
795}
796
797void helper_rsqrtss(XMMReg *d, XMMReg *s)
798{
799 d->XMM_S(0) = approx_rsqrt(s->XMM_S(0));
800}
801
802void helper_rcpps(XMMReg *d, XMMReg *s)
803{
804 d->XMM_S(0) = approx_rcp(s->XMM_S(0));
805 d->XMM_S(1) = approx_rcp(s->XMM_S(1));
806 d->XMM_S(2) = approx_rcp(s->XMM_S(2));
807 d->XMM_S(3) = approx_rcp(s->XMM_S(3));
808}
809
810void helper_rcpss(XMMReg *d, XMMReg *s)
811{
812 d->XMM_S(0) = approx_rcp(s->XMM_S(0));
813}
814
815void helper_haddps(XMMReg *d, XMMReg *s)
816{
817 XMMReg r;
818 r.XMM_S(0) = d->XMM_S(0) + d->XMM_S(1);
819 r.XMM_S(1) = d->XMM_S(2) + d->XMM_S(3);
820 r.XMM_S(2) = s->XMM_S(0) + s->XMM_S(1);
821 r.XMM_S(3) = s->XMM_S(2) + s->XMM_S(3);
822 *d = r;
823}
824
825void helper_haddpd(XMMReg *d, XMMReg *s)
826{
827 XMMReg r;
828 r.XMM_D(0) = d->XMM_D(0) + d->XMM_D(1);
829 r.XMM_D(1) = s->XMM_D(0) + s->XMM_D(1);
830 *d = r;
831}
832
833void helper_hsubps(XMMReg *d, XMMReg *s)
834{
835 XMMReg r;
836 r.XMM_S(0) = d->XMM_S(0) - d->XMM_S(1);
837 r.XMM_S(1) = d->XMM_S(2) - d->XMM_S(3);
838 r.XMM_S(2) = s->XMM_S(0) - s->XMM_S(1);
839 r.XMM_S(3) = s->XMM_S(2) - s->XMM_S(3);
840 *d = r;
841}
842
843void helper_hsubpd(XMMReg *d, XMMReg *s)
844{
845 XMMReg r;
846 r.XMM_D(0) = d->XMM_D(0) - d->XMM_D(1);
847 r.XMM_D(1) = s->XMM_D(0) - s->XMM_D(1);
848 *d = r;
849}
850
851void helper_addsubps(XMMReg *d, XMMReg *s)
852{
853 d->XMM_S(0) = d->XMM_S(0) - s->XMM_S(0);
854 d->XMM_S(1) = d->XMM_S(1) + s->XMM_S(1);
855 d->XMM_S(2) = d->XMM_S(2) - s->XMM_S(2);
856 d->XMM_S(3) = d->XMM_S(3) + s->XMM_S(3);
857}
858
859void helper_addsubpd(XMMReg *d, XMMReg *s)
860{
861 d->XMM_D(0) = d->XMM_D(0) - s->XMM_D(0);
862 d->XMM_D(1) = d->XMM_D(1) + s->XMM_D(1);
863}
864
865/* XXX: unordered */
866#define SSE_HELPER_CMP(name, F)\
867void helper_ ## name ## ps (Reg *d, Reg *s)\
868{\
869 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
870 d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
871 d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
872 d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
873}\
874\
875void helper_ ## name ## ss (Reg *d, Reg *s)\
876{\
877 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
878}\
879void helper_ ## name ## pd (Reg *d, Reg *s)\
880{\
881 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
882 d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
883}\
884\
885void helper_ ## name ## sd (Reg *d, Reg *s)\
886{\
887 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
888}
889
890#define FPU_CMPEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? -1 : 0
891#define FPU_CMPLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0
892#define FPU_CMPLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? -1 : 0
893#define FPU_CMPUNORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? - 1 : 0
894#define FPU_CMPNEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? 0 : -1
895#define FPU_CMPNLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1
896#define FPU_CMPNLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? 0 : -1
897#define FPU_CMPORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? 0 : -1
898
899SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
900SSE_HELPER_CMP(cmplt, FPU_CMPLT)
901SSE_HELPER_CMP(cmple, FPU_CMPLE)
902SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD)
903SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ)
904SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT)
905SSE_HELPER_CMP(cmpnle, FPU_CMPNLE)
906SSE_HELPER_CMP(cmpord, FPU_CMPORD)
907
908const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
909
910void helper_ucomiss(Reg *d, Reg *s)
911{
912 int ret;
913 float32 s0, s1;
914
915 s0 = d->XMM_S(0);
916 s1 = s->XMM_S(0);
917 ret = float32_compare_quiet(s0, s1, &env->sse_status);
918 CC_SRC = comis_eflags[ret + 1];
919}
920
921void helper_comiss(Reg *d, Reg *s)
922{
923 int ret;
924 float32 s0, s1;
925
926 s0 = d->XMM_S(0);
927 s1 = s->XMM_S(0);
928 ret = float32_compare(s0, s1, &env->sse_status);
929 CC_SRC = comis_eflags[ret + 1];
930}
931
932void helper_ucomisd(Reg *d, Reg *s)
933{
934 int ret;
935 float64 d0, d1;
936
937 d0 = d->XMM_D(0);
938 d1 = s->XMM_D(0);
939 ret = float64_compare_quiet(d0, d1, &env->sse_status);
940 CC_SRC = comis_eflags[ret + 1];
941}
942
943void helper_comisd(Reg *d, Reg *s)
944{
945 int ret;
946 float64 d0, d1;
947
948 d0 = d->XMM_D(0);
949 d1 = s->XMM_D(0);
950 ret = float64_compare(d0, d1, &env->sse_status);
951 CC_SRC = comis_eflags[ret + 1];
952}
953
954uint32_t helper_movmskps(Reg *s)
955{
956 int b0, b1, b2, b3;
957 b0 = s->XMM_L(0) >> 31;
958 b1 = s->XMM_L(1) >> 31;
959 b2 = s->XMM_L(2) >> 31;
960 b3 = s->XMM_L(3) >> 31;
961 return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3);
962}
963
964uint32_t helper_movmskpd(Reg *s)
965{
966 int b0, b1;
967 b0 = s->XMM_L(1) >> 31;
968 b1 = s->XMM_L(3) >> 31;
969 return b0 | (b1 << 1);
970}
971
972#endif
973
974uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s)
975{
976 uint32_t val;
977 val = 0;
978 val |= (s->B(0) >> 7);
979 val |= (s->B(1) >> 6) & 0x02;
980 val |= (s->B(2) >> 5) & 0x04;
981 val |= (s->B(3) >> 4) & 0x08;
982 val |= (s->B(4) >> 3) & 0x10;
983 val |= (s->B(5) >> 2) & 0x20;
984 val |= (s->B(6) >> 1) & 0x40;
985 val |= (s->B(7)) & 0x80;
986#if SHIFT == 1
987 val |= (s->B(8) << 1) & 0x0100;
988 val |= (s->B(9) << 2) & 0x0200;
989 val |= (s->B(10) << 3) & 0x0400;
990 val |= (s->B(11) << 4) & 0x0800;
991 val |= (s->B(12) << 5) & 0x1000;
992 val |= (s->B(13) << 6) & 0x2000;
993 val |= (s->B(14) << 7) & 0x4000;
994 val |= (s->B(15) << 8) & 0x8000;
995#endif
996 return val;
997}
998
999void glue(helper_packsswb, SUFFIX) (Reg *d, Reg *s)
1000{
1001 Reg r;
1002
1003 r.B(0) = satsb((int16_t)d->W(0));
1004 r.B(1) = satsb((int16_t)d->W(1));
1005 r.B(2) = satsb((int16_t)d->W(2));
1006 r.B(3) = satsb((int16_t)d->W(3));
1007#if SHIFT == 1
1008 r.B(4) = satsb((int16_t)d->W(4));
1009 r.B(5) = satsb((int16_t)d->W(5));
1010 r.B(6) = satsb((int16_t)d->W(6));
1011 r.B(7) = satsb((int16_t)d->W(7));
1012#endif
1013 r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0));
1014 r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1));
1015 r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2));
1016 r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3));
1017#if SHIFT == 1
1018 r.B(12) = satsb((int16_t)s->W(4));
1019 r.B(13) = satsb((int16_t)s->W(5));
1020 r.B(14) = satsb((int16_t)s->W(6));
1021 r.B(15) = satsb((int16_t)s->W(7));
1022#endif
1023 *d = r;
1024}
1025
1026void glue(helper_packuswb, SUFFIX) (Reg *d, Reg *s)
1027{
1028 Reg r;
1029
1030 r.B(0) = satub((int16_t)d->W(0));
1031 r.B(1) = satub((int16_t)d->W(1));
1032 r.B(2) = satub((int16_t)d->W(2));
1033 r.B(3) = satub((int16_t)d->W(3));
1034#if SHIFT == 1
1035 r.B(4) = satub((int16_t)d->W(4));
1036 r.B(5) = satub((int16_t)d->W(5));
1037 r.B(6) = satub((int16_t)d->W(6));
1038 r.B(7) = satub((int16_t)d->W(7));
1039#endif
1040 r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0));
1041 r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1));
1042 r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2));
1043 r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3));
1044#if SHIFT == 1
1045 r.B(12) = satub((int16_t)s->W(4));
1046 r.B(13) = satub((int16_t)s->W(5));
1047 r.B(14) = satub((int16_t)s->W(6));
1048 r.B(15) = satub((int16_t)s->W(7));
1049#endif
1050 *d = r;
1051}
1052
1053void glue(helper_packssdw, SUFFIX) (Reg *d, Reg *s)
1054{
1055 Reg r;
1056
1057 r.W(0) = satsw(d->L(0));
1058 r.W(1) = satsw(d->L(1));
1059#if SHIFT == 1
1060 r.W(2) = satsw(d->L(2));
1061 r.W(3) = satsw(d->L(3));
1062#endif
1063 r.W((2 << SHIFT) + 0) = satsw(s->L(0));
1064 r.W((2 << SHIFT) + 1) = satsw(s->L(1));
1065#if SHIFT == 1
1066 r.W(6) = satsw(s->L(2));
1067 r.W(7) = satsw(s->L(3));
1068#endif
1069 *d = r;
1070}
1071
1072#define UNPCK_OP(base_name, base) \
1073 \
1074void glue(helper_punpck ## base_name ## bw, SUFFIX) (Reg *d, Reg *s) \
1075{ \
1076 Reg r; \
1077 \
1078 r.B(0) = d->B((base << (SHIFT + 2)) + 0); \
1079 r.B(1) = s->B((base << (SHIFT + 2)) + 0); \
1080 r.B(2) = d->B((base << (SHIFT + 2)) + 1); \
1081 r.B(3) = s->B((base << (SHIFT + 2)) + 1); \
1082 r.B(4) = d->B((base << (SHIFT + 2)) + 2); \
1083 r.B(5) = s->B((base << (SHIFT + 2)) + 2); \
1084 r.B(6) = d->B((base << (SHIFT + 2)) + 3); \
1085 r.B(7) = s->B((base << (SHIFT + 2)) + 3); \
1086XMM_ONLY( \
1087 r.B(8) = d->B((base << (SHIFT + 2)) + 4); \
1088 r.B(9) = s->B((base << (SHIFT + 2)) + 4); \
1089 r.B(10) = d->B((base << (SHIFT + 2)) + 5); \
1090 r.B(11) = s->B((base << (SHIFT + 2)) + 5); \
1091 r.B(12) = d->B((base << (SHIFT + 2)) + 6); \
1092 r.B(13) = s->B((base << (SHIFT + 2)) + 6); \
1093 r.B(14) = d->B((base << (SHIFT + 2)) + 7); \
1094 r.B(15) = s->B((base << (SHIFT + 2)) + 7); \
1095) \
1096 *d = r; \
1097} \
1098 \
1099void glue(helper_punpck ## base_name ## wd, SUFFIX) (Reg *d, Reg *s) \
1100{ \
1101 Reg r; \
1102 \
1103 r.W(0) = d->W((base << (SHIFT + 1)) + 0); \
1104 r.W(1) = s->W((base << (SHIFT + 1)) + 0); \
1105 r.W(2) = d->W((base << (SHIFT + 1)) + 1); \
1106 r.W(3) = s->W((base << (SHIFT + 1)) + 1); \
1107XMM_ONLY( \
1108 r.W(4) = d->W((base << (SHIFT + 1)) + 2); \
1109 r.W(5) = s->W((base << (SHIFT + 1)) + 2); \
1110 r.W(6) = d->W((base << (SHIFT + 1)) + 3); \
1111 r.W(7) = s->W((base << (SHIFT + 1)) + 3); \
1112) \
1113 *d = r; \
1114} \
1115 \
1116void glue(helper_punpck ## base_name ## dq, SUFFIX) (Reg *d, Reg *s) \
1117{ \
1118 Reg r; \
1119 \
1120 r.L(0) = d->L((base << SHIFT) + 0); \
1121 r.L(1) = s->L((base << SHIFT) + 0); \
1122XMM_ONLY( \
1123 r.L(2) = d->L((base << SHIFT) + 1); \
1124 r.L(3) = s->L((base << SHIFT) + 1); \
1125) \
1126 *d = r; \
1127} \
1128 \
1129XMM_ONLY( \
1130void glue(helper_punpck ## base_name ## qdq, SUFFIX) (Reg *d, Reg *s) \
1131{ \
1132 Reg r; \
1133 \
1134 r.Q(0) = d->Q(base); \
1135 r.Q(1) = s->Q(base); \
1136 *d = r; \
1137} \
1138)
1139
1140UNPCK_OP(l, 0)
1141UNPCK_OP(h, 1)
1142
1143/* 3DNow! float ops */
1144#if SHIFT == 0
1145void helper_pi2fd(MMXReg *d, MMXReg *s)
1146{
1147 d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status);
1148 d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status);
1149}
1150
1151void helper_pi2fw(MMXReg *d, MMXReg *s)
1152{
1153 d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status);
1154 d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status);
1155}
1156
1157void helper_pf2id(MMXReg *d, MMXReg *s)
1158{
1159 d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status);
1160 d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status);
1161}
1162
1163void helper_pf2iw(MMXReg *d, MMXReg *s)
1164{
1165 d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status));
1166 d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status));
1167}
1168
1169void helper_pfacc(MMXReg *d, MMXReg *s)
1170{
1171 MMXReg r;
1172 r.MMX_S(0) = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1173 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1174 *d = r;
1175}
1176
1177void helper_pfadd(MMXReg *d, MMXReg *s)
1178{
1179 d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1180 d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1181}
1182
1183void helper_pfcmpeq(MMXReg *d, MMXReg *s)
1184{
1185 d->MMX_L(0) = float32_eq(d->MMX_S(0), s->MMX_S(0), &env->mmx_status) ? -1 : 0;
1186 d->MMX_L(1) = float32_eq(d->MMX_S(1), s->MMX_S(1), &env->mmx_status) ? -1 : 0;
1187}
1188
1189void helper_pfcmpge(MMXReg *d, MMXReg *s)
1190{
1191 d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0;
1192 d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0;
1193}
1194
1195void helper_pfcmpgt(MMXReg *d, MMXReg *s)
1196{
1197 d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0;
1198 d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0;
1199}
1200
1201void helper_pfmax(MMXReg *d, MMXReg *s)
1202{
1203 if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status))
1204 d->MMX_S(0) = s->MMX_S(0);
1205 if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status))
1206 d->MMX_S(1) = s->MMX_S(1);
1207}
1208
1209void helper_pfmin(MMXReg *d, MMXReg *s)
1210{
1211 if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status))
1212 d->MMX_S(0) = s->MMX_S(0);
1213 if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status))
1214 d->MMX_S(1) = s->MMX_S(1);
1215}
1216
1217void helper_pfmul(MMXReg *d, MMXReg *s)
1218{
1219 d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1220 d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1221}
1222
1223void helper_pfnacc(MMXReg *d, MMXReg *s)
1224{
1225 MMXReg r;
1226 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1227 r.MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1228 *d = r;
1229}
1230
1231void helper_pfpnacc(MMXReg *d, MMXReg *s)
1232{
1233 MMXReg r;
1234 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1235 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1236 *d = r;
1237}
1238
1239void helper_pfrcp(MMXReg *d, MMXReg *s)
1240{
1241 d->MMX_S(0) = approx_rcp(s->MMX_S(0));
1242 d->MMX_S(1) = d->MMX_S(0);
1243}
1244
1245void helper_pfrsqrt(MMXReg *d, MMXReg *s)
1246{
1247 d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff;
1248 d->MMX_S(1) = approx_rsqrt(d->MMX_S(1));
1249 d->MMX_L(1) |= s->MMX_L(0) & 0x80000000;
1250 d->MMX_L(0) = d->MMX_L(1);
1251}
1252
1253void helper_pfsub(MMXReg *d, MMXReg *s)
1254{
1255 d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1256 d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1257}
1258
1259void helper_pfsubr(MMXReg *d, MMXReg *s)
1260{
1261 d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status);
1262 d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status);
1263}
1264
1265void helper_pswapd(MMXReg *d, MMXReg *s)
1266{
1267 MMXReg r;
1268 r.MMX_L(0) = s->MMX_L(1);
1269 r.MMX_L(1) = s->MMX_L(0);
1270 *d = r;
1271}
1272#endif
1273
1274/* SSSE3 op helpers */
1275void glue(helper_pshufb, SUFFIX) (Reg *d, Reg *s)
1276{
1277 int i;
1278 Reg r;
1279
1280 for (i = 0; i < (8 << SHIFT); i++)
1281 r.B(i) = (s->B(i) & 0x80) ? 0 : (d->B(s->B(i) & ((8 << SHIFT) - 1)));
1282
1283 *d = r;
1284}
1285
1286void glue(helper_phaddw, SUFFIX) (Reg *d, Reg *s)
1287{
1288 d->W(0) = (int16_t)d->W(0) + (int16_t)d->W(1);
1289 d->W(1) = (int16_t)d->W(2) + (int16_t)d->W(3);
1290 XMM_ONLY(d->W(2) = (int16_t)d->W(4) + (int16_t)d->W(5));
1291 XMM_ONLY(d->W(3) = (int16_t)d->W(6) + (int16_t)d->W(7));
1292 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) + (int16_t)s->W(1);
1293 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) + (int16_t)s->W(3);
1294 XMM_ONLY(d->W(6) = (int16_t)s->W(4) + (int16_t)s->W(5));
1295 XMM_ONLY(d->W(7) = (int16_t)s->W(6) + (int16_t)s->W(7));
1296}
1297
1298void glue(helper_phaddd, SUFFIX) (Reg *d, Reg *s)
1299{
1300 d->L(0) = (int32_t)d->L(0) + (int32_t)d->L(1);
1301 XMM_ONLY(d->L(1) = (int32_t)d->L(2) + (int32_t)d->L(3));
1302 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) + (int32_t)s->L(1);
1303 XMM_ONLY(d->L(3) = (int32_t)s->L(2) + (int32_t)s->L(3));
1304}
1305
1306void glue(helper_phaddsw, SUFFIX) (Reg *d, Reg *s)
1307{
1308 d->W(0) = satsw((int16_t)d->W(0) + (int16_t)d->W(1));
1309 d->W(1) = satsw((int16_t)d->W(2) + (int16_t)d->W(3));
1310 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) + (int16_t)d->W(5)));
1311 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) + (int16_t)d->W(7)));
1312 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) + (int16_t)s->W(1));
1313 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) + (int16_t)s->W(3));
1314 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) + (int16_t)s->W(5)));
1315 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) + (int16_t)s->W(7)));
1316}
1317
1318void glue(helper_pmaddubsw, SUFFIX) (Reg *d, Reg *s)
1319{
1320 d->W(0) = satsw((int8_t)s->B( 0) * (uint8_t)d->B( 0) +
1321 (int8_t)s->B( 1) * (uint8_t)d->B( 1));
1322 d->W(1) = satsw((int8_t)s->B( 2) * (uint8_t)d->B( 2) +
1323 (int8_t)s->B( 3) * (uint8_t)d->B( 3));
1324 d->W(2) = satsw((int8_t)s->B( 4) * (uint8_t)d->B( 4) +
1325 (int8_t)s->B( 5) * (uint8_t)d->B( 5));
1326 d->W(3) = satsw((int8_t)s->B( 6) * (uint8_t)d->B( 6) +
1327 (int8_t)s->B( 7) * (uint8_t)d->B( 7));
1328#if SHIFT == 1
1329 d->W(4) = satsw((int8_t)s->B( 8) * (uint8_t)d->B( 8) +
1330 (int8_t)s->B( 9) * (uint8_t)d->B( 9));
1331 d->W(5) = satsw((int8_t)s->B(10) * (uint8_t)d->B(10) +
1332 (int8_t)s->B(11) * (uint8_t)d->B(11));
1333 d->W(6) = satsw((int8_t)s->B(12) * (uint8_t)d->B(12) +
1334 (int8_t)s->B(13) * (uint8_t)d->B(13));
1335 d->W(7) = satsw((int8_t)s->B(14) * (uint8_t)d->B(14) +
1336 (int8_t)s->B(15) * (uint8_t)d->B(15));
1337#endif
1338}
1339
1340void glue(helper_phsubw, SUFFIX) (Reg *d, Reg *s)
1341{
1342 d->W(0) = (int16_t)d->W(0) - (int16_t)d->W(1);
1343 d->W(1) = (int16_t)d->W(2) - (int16_t)d->W(3);
1344 XMM_ONLY(d->W(2) = (int16_t)d->W(4) - (int16_t)d->W(5));
1345 XMM_ONLY(d->W(3) = (int16_t)d->W(6) - (int16_t)d->W(7));
1346 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) - (int16_t)s->W(1);
1347 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) - (int16_t)s->W(3);
1348 XMM_ONLY(d->W(6) = (int16_t)s->W(4) - (int16_t)s->W(5));
1349 XMM_ONLY(d->W(7) = (int16_t)s->W(6) - (int16_t)s->W(7));
1350}
1351
1352void glue(helper_phsubd, SUFFIX) (Reg *d, Reg *s)
1353{
1354 d->L(0) = (int32_t)d->L(0) - (int32_t)d->L(1);
1355 XMM_ONLY(d->L(1) = (int32_t)d->L(2) - (int32_t)d->L(3));
1356 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) - (int32_t)s->L(1);
1357 XMM_ONLY(d->L(3) = (int32_t)s->L(2) - (int32_t)s->L(3));
1358}
1359
1360void glue(helper_phsubsw, SUFFIX) (Reg *d, Reg *s)
1361{
1362 d->W(0) = satsw((int16_t)d->W(0) - (int16_t)d->W(1));
1363 d->W(1) = satsw((int16_t)d->W(2) - (int16_t)d->W(3));
1364 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) - (int16_t)d->W(5)));
1365 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) - (int16_t)d->W(7)));
1366 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) - (int16_t)s->W(1));
1367 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) - (int16_t)s->W(3));
1368 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) - (int16_t)s->W(5)));
1369 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) - (int16_t)s->W(7)));
1370}
1371
1372#define FABSB(_, x) x > INT8_MAX ? -(int8_t ) x : x
1373#define FABSW(_, x) x > INT16_MAX ? -(int16_t) x : x
1374#define FABSL(_, x) x > INT32_MAX ? -(int32_t) x : x
1375SSE_HELPER_B(helper_pabsb, FABSB)
1376SSE_HELPER_W(helper_pabsw, FABSW)
1377SSE_HELPER_L(helper_pabsd, FABSL)
1378
1379#define FMULHRSW(d, s) ((int16_t) d * (int16_t) s + 0x4000) >> 15
1380SSE_HELPER_W(helper_pmulhrsw, FMULHRSW)
1381
1382#define FSIGNB(d, s) s <= INT8_MAX ? s ? d : 0 : -(int8_t ) d
1383#define FSIGNW(d, s) s <= INT16_MAX ? s ? d : 0 : -(int16_t) d
1384#define FSIGNL(d, s) s <= INT32_MAX ? s ? d : 0 : -(int32_t) d
1385SSE_HELPER_B(helper_psignb, FSIGNB)
1386SSE_HELPER_W(helper_psignw, FSIGNW)
1387SSE_HELPER_L(helper_psignd, FSIGNL)
1388
1389void glue(helper_palignr, SUFFIX) (Reg *d, Reg *s, int32_t shift)
1390{
1391 Reg r;
1392
1393 /* XXX could be checked during translation */
1394 if (shift >= (16 << SHIFT)) {
1395 r.Q(0) = 0;
1396 XMM_ONLY(r.Q(1) = 0);
1397 } else {
1398 shift <<= 3;
1399#define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0)
1400#if SHIFT == 0
1401 r.Q(0) = SHR(s->Q(0), shift - 0) |
1402 SHR(d->Q(0), shift - 64);
1403#else
1404 r.Q(0) = SHR(s->Q(0), shift - 0) |
1405 SHR(s->Q(1), shift - 64) |
1406 SHR(d->Q(0), shift - 128) |
1407 SHR(d->Q(1), shift - 192);
1408 r.Q(1) = SHR(s->Q(0), shift + 64) |
1409 SHR(s->Q(1), shift - 0) |
1410 SHR(d->Q(0), shift - 64) |
1411 SHR(d->Q(1), shift - 128);
1412#endif
1413#undef SHR
1414 }
1415
1416 *d = r;
1417}
1418
1419#define XMM0 env->xmm_regs[0]
1420
1421#if SHIFT == 1
1422#define SSE_HELPER_V(name, elem, num, F)\
1423void glue(name, SUFFIX) (Reg *d, Reg *s)\
1424{\
1425 d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0));\
1426 d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1));\
1427 if (num > 2) {\
1428 d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2));\
1429 d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3));\
1430 if (num > 4) {\
1431 d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4));\
1432 d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5));\
1433 d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6));\
1434 d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7));\
1435 if (num > 8) {\
1436 d->elem(8) = F(d->elem(8), s->elem(8), XMM0.elem(8));\
1437 d->elem(9) = F(d->elem(9), s->elem(9), XMM0.elem(9));\
1438 d->elem(10) = F(d->elem(10), s->elem(10), XMM0.elem(10));\
1439 d->elem(11) = F(d->elem(11), s->elem(11), XMM0.elem(11));\
1440 d->elem(12) = F(d->elem(12), s->elem(12), XMM0.elem(12));\
1441 d->elem(13) = F(d->elem(13), s->elem(13), XMM0.elem(13));\
1442 d->elem(14) = F(d->elem(14), s->elem(14), XMM0.elem(14));\
1443 d->elem(15) = F(d->elem(15), s->elem(15), XMM0.elem(15));\
1444 }\
1445 }\
1446 }\
1447}
1448
1449#define SSE_HELPER_I(name, elem, num, F)\
1450void glue(name, SUFFIX) (Reg *d, Reg *s, uint32_t imm)\
1451{\
1452 d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1));\
1453 d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1));\
1454 if (num > 2) {\
1455 d->elem(2) = F(d->elem(2), s->elem(2), ((imm >> 2) & 1));\
1456 d->elem(3) = F(d->elem(3), s->elem(3), ((imm >> 3) & 1));\
1457 if (num > 4) {\
1458 d->elem(4) = F(d->elem(4), s->elem(4), ((imm >> 4) & 1));\
1459 d->elem(5) = F(d->elem(5), s->elem(5), ((imm >> 5) & 1));\
1460 d->elem(6) = F(d->elem(6), s->elem(6), ((imm >> 6) & 1));\
1461 d->elem(7) = F(d->elem(7), s->elem(7), ((imm >> 7) & 1));\
1462 if (num > 8) {\
1463 d->elem(8) = F(d->elem(8), s->elem(8), ((imm >> 8) & 1));\
1464 d->elem(9) = F(d->elem(9), s->elem(9), ((imm >> 9) & 1));\
1465 d->elem(10) = F(d->elem(10), s->elem(10), ((imm >> 10) & 1));\
1466 d->elem(11) = F(d->elem(11), s->elem(11), ((imm >> 11) & 1));\
1467 d->elem(12) = F(d->elem(12), s->elem(12), ((imm >> 12) & 1));\
1468 d->elem(13) = F(d->elem(13), s->elem(13), ((imm >> 13) & 1));\
1469 d->elem(14) = F(d->elem(14), s->elem(14), ((imm >> 14) & 1));\
1470 d->elem(15) = F(d->elem(15), s->elem(15), ((imm >> 15) & 1));\
1471 }\
1472 }\
1473 }\
1474}
1475
1476/* SSE4.1 op helpers */
1477#define FBLENDVB(d, s, m) (m & 0x80) ? s : d
1478#define FBLENDVPS(d, s, m) (m & 0x80000000) ? s : d
1479#define FBLENDVPD(d, s, m) (m & 0x8000000000000000LL) ? s : d
1480SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB)
1481SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS)
1482SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD)
1483
1484void glue(helper_ptest, SUFFIX) (Reg *d, Reg *s)
1485{
1486 uint64_t zf = (s->Q(0) & d->Q(0)) | (s->Q(1) & d->Q(1));
1487 uint64_t cf = (s->Q(0) & ~d->Q(0)) | (s->Q(1) & ~d->Q(1));
1488
1489 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C);
1490}
1491
1492#define SSE_HELPER_F(name, elem, num, F)\
1493void glue(name, SUFFIX) (Reg *d, Reg *s)\
1494{\
1495 d->elem(0) = F(0);\
1496 d->elem(1) = F(1);\
1497 if (num > 2) {\
1498 d->elem(2) = F(2);\
1499 d->elem(3) = F(3);\
1500 if (num > 4) {\
1501 d->elem(4) = F(4);\
1502 d->elem(5) = F(5);\
1503 d->elem(6) = F(6);\
1504 d->elem(7) = F(7);\
1505 }\
1506 }\
1507}
1508
1509SSE_HELPER_F(helper_pmovsxbw, W, 8, (int8_t) s->B)
1510SSE_HELPER_F(helper_pmovsxbd, L, 4, (int8_t) s->B)
1511SSE_HELPER_F(helper_pmovsxbq, Q, 2, (int8_t) s->B)
1512SSE_HELPER_F(helper_pmovsxwd, L, 4, (int16_t) s->W)
1513SSE_HELPER_F(helper_pmovsxwq, Q, 2, (int16_t) s->W)
1514SSE_HELPER_F(helper_pmovsxdq, Q, 2, (int32_t) s->L)
1515SSE_HELPER_F(helper_pmovzxbw, W, 8, s->B)
1516SSE_HELPER_F(helper_pmovzxbd, L, 4, s->B)
1517SSE_HELPER_F(helper_pmovzxbq, Q, 2, s->B)
1518SSE_HELPER_F(helper_pmovzxwd, L, 4, s->W)
1519SSE_HELPER_F(helper_pmovzxwq, Q, 2, s->W)
1520SSE_HELPER_F(helper_pmovzxdq, Q, 2, s->L)
1521
1522void glue(helper_pmuldq, SUFFIX) (Reg *d, Reg *s)
1523{
1524 d->Q(0) = (int64_t) (int32_t) d->L(0) * (int32_t) s->L(0);
1525 d->Q(1) = (int64_t) (int32_t) d->L(2) * (int32_t) s->L(2);
1526}
1527
1528#define FCMPEQQ(d, s) d == s ? -1 : 0
1529SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ)
1530
1531void glue(helper_packusdw, SUFFIX) (Reg *d, Reg *s)
1532{
1533 d->W(0) = satuw((int32_t) d->L(0));
1534 d->W(1) = satuw((int32_t) d->L(1));
1535 d->W(2) = satuw((int32_t) d->L(2));
1536 d->W(3) = satuw((int32_t) d->L(3));
1537 d->W(4) = satuw((int32_t) s->L(0));
1538 d->W(5) = satuw((int32_t) s->L(1));
1539 d->W(6) = satuw((int32_t) s->L(2));
1540 d->W(7) = satuw((int32_t) s->L(3));
1541}
1542
1543#define FMINSB(d, s) MIN((int8_t) d, (int8_t) s)
1544#define FMINSD(d, s) MIN((int32_t) d, (int32_t) s)
1545#define FMAXSB(d, s) MAX((int8_t) d, (int8_t) s)
1546#define FMAXSD(d, s) MAX((int32_t) d, (int32_t) s)
1547SSE_HELPER_B(helper_pminsb, FMINSB)
1548SSE_HELPER_L(helper_pminsd, FMINSD)
1549SSE_HELPER_W(helper_pminuw, MIN)
1550SSE_HELPER_L(helper_pminud, MIN)
1551SSE_HELPER_B(helper_pmaxsb, FMAXSB)
1552SSE_HELPER_L(helper_pmaxsd, FMAXSD)
1553SSE_HELPER_W(helper_pmaxuw, MAX)
1554SSE_HELPER_L(helper_pmaxud, MAX)
1555
1556#define FMULLD(d, s) (int32_t) d * (int32_t) s
1557SSE_HELPER_L(helper_pmulld, FMULLD)
1558
1559void glue(helper_phminposuw, SUFFIX) (Reg *d, Reg *s)
1560{
1561 int idx = 0;
1562
1563 if (s->W(1) < s->W(idx))
1564 idx = 1;
1565 if (s->W(2) < s->W(idx))
1566 idx = 2;
1567 if (s->W(3) < s->W(idx))
1568 idx = 3;
1569 if (s->W(4) < s->W(idx))
1570 idx = 4;
1571 if (s->W(5) < s->W(idx))
1572 idx = 5;
1573 if (s->W(6) < s->W(idx))
1574 idx = 6;
1575 if (s->W(7) < s->W(idx))
1576 idx = 7;
1577
1578 d->Q(1) = 0;
1579 d->L(1) = 0;
1580 d->W(1) = idx;
1581 d->W(0) = s->W(idx);
1582}
1583
1584void glue(helper_roundps, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1585{
1586 signed char prev_rounding_mode;
1587
1588 prev_rounding_mode = env->sse_status.float_rounding_mode;
1589 if (!(mode & (1 << 2)))
1590 switch (mode & 3) {
1591 case 0:
1592 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1593 break;
1594 case 1:
1595 set_float_rounding_mode(float_round_down, &env->sse_status);
1596 break;
1597 case 2:
1598 set_float_rounding_mode(float_round_up, &env->sse_status);
1599 break;
1600 case 3:
1601 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1602 break;
1603 }
1604
1605 d->L(0) = float64_round_to_int(s->L(0), &env->sse_status);
1606 d->L(1) = float64_round_to_int(s->L(1), &env->sse_status);
1607 d->L(2) = float64_round_to_int(s->L(2), &env->sse_status);
1608 d->L(3) = float64_round_to_int(s->L(3), &env->sse_status);
1609
1610#if 0 /* TODO */
1611 if (mode & (1 << 3))
1612 set_float_exception_flags(
1613 get_float_exception_flags(&env->sse_status) &
1614 ~float_flag_inexact,
1615 &env->sse_status);
1616#endif
1617 env->sse_status.float_rounding_mode = prev_rounding_mode;
1618}
1619
1620void glue(helper_roundpd, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1621{
1622 signed char prev_rounding_mode;
1623
1624 prev_rounding_mode = env->sse_status.float_rounding_mode;
1625 if (!(mode & (1 << 2)))
1626 switch (mode & 3) {
1627 case 0:
1628 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1629 break;
1630 case 1:
1631 set_float_rounding_mode(float_round_down, &env->sse_status);
1632 break;
1633 case 2:
1634 set_float_rounding_mode(float_round_up, &env->sse_status);
1635 break;
1636 case 3:
1637 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1638 break;
1639 }
1640
1641 d->Q(0) = float64_round_to_int(s->Q(0), &env->sse_status);
1642 d->Q(1) = float64_round_to_int(s->Q(1), &env->sse_status);
1643
1644#if 0 /* TODO */
1645 if (mode & (1 << 3))
1646 set_float_exception_flags(
1647 get_float_exception_flags(&env->sse_status) &
1648 ~float_flag_inexact,
1649 &env->sse_status);
1650#endif
1651 env->sse_status.float_rounding_mode = prev_rounding_mode;
1652}
1653
1654void glue(helper_roundss, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1655{
1656 signed char prev_rounding_mode;
1657
1658 prev_rounding_mode = env->sse_status.float_rounding_mode;
1659 if (!(mode & (1 << 2)))
1660 switch (mode & 3) {
1661 case 0:
1662 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1663 break;
1664 case 1:
1665 set_float_rounding_mode(float_round_down, &env->sse_status);
1666 break;
1667 case 2:
1668 set_float_rounding_mode(float_round_up, &env->sse_status);
1669 break;
1670 case 3:
1671 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1672 break;
1673 }
1674
1675 d->L(0) = float64_round_to_int(s->L(0), &env->sse_status);
1676
1677#if 0 /* TODO */
1678 if (mode & (1 << 3))
1679 set_float_exception_flags(
1680 get_float_exception_flags(&env->sse_status) &
1681 ~float_flag_inexact,
1682 &env->sse_status);
1683#endif
1684 env->sse_status.float_rounding_mode = prev_rounding_mode;
1685}
1686
1687void glue(helper_roundsd, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1688{
1689 signed char prev_rounding_mode;
1690
1691 prev_rounding_mode = env->sse_status.float_rounding_mode;
1692 if (!(mode & (1 << 2)))
1693 switch (mode & 3) {
1694 case 0:
1695 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1696 break;
1697 case 1:
1698 set_float_rounding_mode(float_round_down, &env->sse_status);
1699 break;
1700 case 2:
1701 set_float_rounding_mode(float_round_up, &env->sse_status);
1702 break;
1703 case 3:
1704 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1705 break;
1706 }
1707
1708 d->Q(0) = float64_round_to_int(s->Q(0), &env->sse_status);
1709
1710#if 0 /* TODO */
1711 if (mode & (1 << 3))
1712 set_float_exception_flags(
1713 get_float_exception_flags(&env->sse_status) &
1714 ~float_flag_inexact,
1715 &env->sse_status);
1716#endif
1717 env->sse_status.float_rounding_mode = prev_rounding_mode;
1718}
1719
1720#define FBLENDP(d, s, m) m ? s : d
1721SSE_HELPER_I(helper_blendps, L, 4, FBLENDP)
1722SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP)
1723SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
1724
1725void glue(helper_dpps, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
1726{
1727 float32 iresult = 0 /*float32_zero*/;
1728
1729 if (mask & (1 << 4))
1730 iresult = float32_add(iresult,
1731 float32_mul(d->L(0), s->L(0), &env->sse_status),
1732 &env->sse_status);
1733 if (mask & (1 << 5))
1734 iresult = float32_add(iresult,
1735 float32_mul(d->L(1), s->L(1), &env->sse_status),
1736 &env->sse_status);
1737 if (mask & (1 << 6))
1738 iresult = float32_add(iresult,
1739 float32_mul(d->L(2), s->L(2), &env->sse_status),
1740 &env->sse_status);
1741 if (mask & (1 << 7))
1742 iresult = float32_add(iresult,
1743 float32_mul(d->L(3), s->L(3), &env->sse_status),
1744 &env->sse_status);
1745 d->L(0) = (mask & (1 << 0)) ? iresult : 0 /*float32_zero*/;
1746 d->L(1) = (mask & (1 << 1)) ? iresult : 0 /*float32_zero*/;
1747 d->L(2) = (mask & (1 << 2)) ? iresult : 0 /*float32_zero*/;
1748 d->L(3) = (mask & (1 << 3)) ? iresult : 0 /*float32_zero*/;
1749}
1750
1751void glue(helper_dppd, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
1752{
1753 float64 iresult = 0 /*float64_zero*/;
1754
1755 if (mask & (1 << 4))
1756 iresult = float64_add(iresult,
1757 float64_mul(d->Q(0), s->Q(0), &env->sse_status),
1758 &env->sse_status);
1759 if (mask & (1 << 5))
1760 iresult = float64_add(iresult,
1761 float64_mul(d->Q(1), s->Q(1), &env->sse_status),
1762 &env->sse_status);
1763 d->Q(0) = (mask & (1 << 0)) ? iresult : 0 /*float64_zero*/;
1764 d->Q(1) = (mask & (1 << 1)) ? iresult : 0 /*float64_zero*/;
1765}
1766
1767void glue(helper_mpsadbw, SUFFIX) (Reg *d, Reg *s, uint32_t offset)
1768{
1769 int s0 = (offset & 3) << 2;
1770 int d0 = (offset & 4) << 0;
1771 int i;
1772 Reg r;
1773
1774 for (i = 0; i < 8; i++, d0++) {
1775 r.W(i) = 0;
1776 r.W(i) += abs1(d->B(d0 + 0) - s->B(s0 + 0));
1777 r.W(i) += abs1(d->B(d0 + 1) - s->B(s0 + 1));
1778 r.W(i) += abs1(d->B(d0 + 2) - s->B(s0 + 2));
1779 r.W(i) += abs1(d->B(d0 + 3) - s->B(s0 + 3));
1780 }
1781
1782 *d = r;
1783}
1784
1785/* SSE4.2 op helpers */
1786/* it's unclear whether signed or unsigned */
1787#define FCMPGTQ(d, s) d > s ? -1 : 0
1788SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ)
1789
1790static inline int pcmp_elen(int reg, uint32_t ctrl)
1791{
1792 int val;
1793
1794 /* Presence of REX.W is indicated by a bit higher than 7 set */
1795 if (ctrl >> 8)
1796 val = abs1((int64_t) env->regs[reg]);
1797 else
1798 val = abs1((int32_t) env->regs[reg]);
1799
1800 if (ctrl & 1) {
1801 if (val > 8)
1802 return 8;
1803 } else
1804 if (val > 16)
1805 return 16;
1806
1807 return val;
1808}
1809
1810static inline int pcmp_ilen(Reg *r, uint8_t ctrl)
1811{
1812 int val = 0;
1813
1814 if (ctrl & 1) {
1815 while (val < 8 && r->W(val))
1816 val++;
1817 } else
1818 while (val < 16 && r->B(val))
1819 val++;
1820
1821 return val;
1822}
1823
1824static inline int pcmp_val(Reg *r, uint8_t ctrl, int i)
1825{
1826 switch ((ctrl >> 0) & 3) {
1827 case 0:
1828 return r->B(i);
1829 case 1:
1830 return r->W(i);
1831 case 2:
1832 return (int8_t) r->B(i);
1833 case 3:
1834 default:
1835 return (int16_t) r->W(i);
1836 }
1837}
1838
1839static inline unsigned pcmpxstrx(Reg *d, Reg *s,
1840 int8_t ctrl, int valids, int validd)
1841{
1842 unsigned int res = 0;
1843 int v;
1844 int j, i;
1845 int upper = (ctrl & 1) ? 7 : 15;
1846
1847 valids--;
1848 validd--;
1849
1850 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0);
1851
1852 switch ((ctrl >> 2) & 3) {
1853 case 0:
1854 for (j = valids; j >= 0; j--) {
1855 res <<= 1;
1856 v = pcmp_val(s, ctrl, j);
1857 for (i = validd; i >= 0; i--)
1858 res |= (v == pcmp_val(d, ctrl, i));
1859 }
1860 break;
1861 case 1:
1862 for (j = valids; j >= 0; j--) {
1863 res <<= 1;
1864 v = pcmp_val(s, ctrl, j);
1865 for (i = ((validd - 1) | 1); i >= 0; i -= 2)
1866 res |= (pcmp_val(d, ctrl, i - 0) <= v &&
1867 pcmp_val(d, ctrl, i - 1) >= v);
1868 }
1869 break;
1870 case 2:
1871 res = (2 << (upper - MAX(valids, validd))) - 1;
1872 res <<= MAX(valids, validd) - MIN(valids, validd);
1873 for (i = MIN(valids, validd); i >= 0; i--) {
1874 res <<= 1;
1875 v = pcmp_val(s, ctrl, i);
1876 res |= (v == pcmp_val(d, ctrl, i));
1877 }
1878 break;
1879 case 3:
1880 for (j = valids - validd; j >= 0; j--) {
1881 res <<= 1;
1882 res |= 1;
1883 for (i = MIN(upper - j, validd); i >= 0; i--)
1884 res &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i));
1885 }
1886 break;
1887 }
1888
1889 switch ((ctrl >> 4) & 3) {
1890 case 1:
1891 res ^= (2 << upper) - 1;
1892 break;
1893 case 3:
1894 res ^= (2 << valids) - 1;
1895 break;
1896 }
1897
1898 if (res)
1899 CC_SRC |= CC_C;
1900 if (res & 1)
1901 CC_SRC |= CC_O;
1902
1903 return res;
1904}
1905
1906static inline int rffs1(unsigned int val)
1907{
1908 int ret = 1, hi;
1909
1910 for (hi = sizeof(val) * 4; hi; hi /= 2)
1911 if (val >> hi) {
1912 val >>= hi;
1913 ret += hi;
1914 }
1915
1916 return ret;
1917}
1918
1919static inline int ffs1(unsigned int val)
1920{
1921 int ret = 1, hi;
1922
1923 for (hi = sizeof(val) * 4; hi; hi /= 2)
1924 if (val << hi) {
1925 val <<= hi;
1926 ret += hi;
1927 }
1928
1929 return ret;
1930}
1931
1932void glue(helper_pcmpestri, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1933{
1934 unsigned int res = pcmpxstrx(d, s, ctrl,
1935 pcmp_elen(R_EDX, ctrl),
1936 pcmp_elen(R_EAX, ctrl));
1937
1938 if (res)
1939#ifndef VBOX
1940 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
1941#else
1942 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1(res) : ffs1(res)) - 1;
1943#endif
1944 else
1945 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
1946}
1947
1948void glue(helper_pcmpestrm, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1949{
1950 int i;
1951 unsigned int res = pcmpxstrx(d, s, ctrl,
1952 pcmp_elen(R_EDX, ctrl),
1953 pcmp_elen(R_EAX, ctrl));
1954
1955 if ((ctrl >> 6) & 1) {
1956 if (ctrl & 1)
1957 for (i = 0; i <= 8; i--, res >>= 1)
1958 d->W(i) = (res & 1) ? ~0 : 0;
1959 else
1960 for (i = 0; i <= 16; i--, res >>= 1)
1961 d->B(i) = (res & 1) ? ~0 : 0;
1962 } else {
1963 d->Q(1) = 0;
1964 d->Q(0) = res;
1965 }
1966}
1967
1968void glue(helper_pcmpistri, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1969{
1970 unsigned int res = pcmpxstrx(d, s, ctrl,
1971 pcmp_ilen(s, ctrl),
1972 pcmp_ilen(d, ctrl));
1973
1974 if (res)
1975 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
1976 else
1977 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
1978}
1979
1980void glue(helper_pcmpistrm, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1981{
1982 int i;
1983 unsigned int res = pcmpxstrx(d, s, ctrl,
1984 pcmp_ilen(s, ctrl),
1985 pcmp_ilen(d, ctrl));
1986
1987 if ((ctrl >> 6) & 1) {
1988 if (ctrl & 1)
1989 for (i = 0; i <= 8; i--, res >>= 1)
1990 d->W(i) = (res & 1) ? ~0 : 0;
1991 else
1992 for (i = 0; i <= 16; i--, res >>= 1)
1993 d->B(i) = (res & 1) ? ~0 : 0;
1994 } else {
1995 d->Q(1) = 0;
1996 d->Q(0) = res;
1997 }
1998}
1999
2000#define CRCPOLY 0x1edc6f41
2001#define CRCPOLY_BITREV 0x82f63b78
2002target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len)
2003{
2004 target_ulong crc = (msg & ((target_ulong) -1 >>
2005 (TARGET_LONG_BITS - len))) ^ crc1;
2006
2007 while (len--)
2008 crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0);
2009
2010 return crc;
2011}
2012
2013#define POPMASK(i) ((target_ulong) -1 / ((1LL << (1 << i)) + 1))
2014#define POPCOUNT(n, i) (n & POPMASK(i)) + ((n >> (1 << i)) & POPMASK(i))
2015target_ulong helper_popcnt(target_ulong n, uint32_t type)
2016{
2017 CC_SRC = n ? 0 : CC_Z;
2018
2019 n = POPCOUNT(n, 0);
2020 n = POPCOUNT(n, 1);
2021 n = POPCOUNT(n, 2);
2022 n = POPCOUNT(n, 3);
2023 if (type == 1)
2024 return n & 0xff;
2025
2026 n = POPCOUNT(n, 4);
2027#ifndef TARGET_X86_64
2028 return n;
2029#else
2030 if (type == 2)
2031 return n & 0xff;
2032
2033 return POPCOUNT(n, 5);
2034#endif
2035}
2036#endif
2037
2038#undef SHIFT
2039#undef XMM_ONLY
2040#undef Reg
2041#undef B
2042#undef W
2043#undef L
2044#undef Q
2045#undef SUFFIX
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