VirtualBox

source: vbox/trunk/src/recompiler/vl.h@ 18661

最後變更 在這個檔案從18661是 2422,由 vboxsync 提交於 18 年 前

Removed the old recompiler code.
  • 屬性 svn:eol-style 設為 native
檔案大小: 44.7 KB
行 
1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
33#ifndef VBOX
34#include <limits.h>
35#include <time.h>
36#include <ctype.h>
37#include <errno.h>
38#include <unistd.h>
39#include <fcntl.h>
40#include <sys/stat.h>
41#include "audio/audio.h"
42#endif /* !VBOX */
43
44#ifndef O_LARGEFILE
45#define O_LARGEFILE 0
46#endif
47#ifndef O_BINARY
48#define O_BINARY 0
49#endif
50
51#ifndef ENOMEDIUM
52#define ENOMEDIUM ENODEV
53#endif
54
55#ifdef _WIN32
56#ifndef VBOX
57#include <windows.h>
58#define fsync _commit
59#define lseek _lseeki64
60#define ENOTSUP 4096
61extern int qemu_ftruncate64(int, int64_t);
62#define ftruncate qemu_ftruncate64
63
64
65static inline char *realpath(const char *path, char *resolved_path)
66{
67 _fullpath(resolved_path, path, _MAX_PATH);
68 return resolved_path;
69}
70
71#define PRId64 "I64d"
72#define PRIx64 "I64x"
73#define PRIu64 "I64u"
74#define PRIo64 "I64o"
75#endif /* !VBOX */
76#endif
77
78#ifdef QEMU_TOOL
79
80/* we use QEMU_TOOL in the command line tools which do not depend on
81 the target CPU type */
82#include "config-host.h"
83#include <setjmp.h>
84#include "osdep.h"
85#include "bswap.h"
86
87#else
88
89#ifndef VBOX
90#include "audio/audio.h"
91#endif /* !VBOX */
92#include "cpu.h"
93
94#endif /* !defined(QEMU_TOOL) */
95
96#ifdef VBOX
97# include <VBox/types.h>
98# include "REMInternal.h"
99#endif /* VBOX */
100
101#ifndef glue
102#define xglue(x, y) x ## y
103#define glue(x, y) xglue(x, y)
104#define stringify(s) tostring(s)
105#define tostring(s) #s
106#endif
107
108#ifndef MIN
109#define MIN(a, b) (((a) < (b)) ? (a) : (b))
110#endif
111#ifndef MAX
112#define MAX(a, b) (((a) > (b)) ? (a) : (b))
113#endif
114
115/* cutils.c */
116void pstrcpy(char *buf, int buf_size, const char *str);
117char *pstrcat(char *buf, int buf_size, const char *s);
118int strstart(const char *str, const char *val, const char **ptr);
119int stristart(const char *str, const char *val, const char **ptr);
120
121/* vl.c */
122uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
123
124void hw_error(const char *fmt, ...);
125
126extern const char *bios_dir;
127
128extern int vm_running;
129
130typedef struct vm_change_state_entry VMChangeStateEntry;
131typedef void VMChangeStateHandler(void *opaque, int running);
132typedef void VMStopHandler(void *opaque, int reason);
133
134VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
135 void *opaque);
136void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
137
138int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
139void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
140
141void vm_start(void);
142void vm_stop(int reason);
143
144typedef void QEMUResetHandler(void *opaque);
145
146void qemu_register_reset(QEMUResetHandler *func, void *opaque);
147void qemu_system_reset_request(void);
148void qemu_system_shutdown_request(void);
149void qemu_system_powerdown_request(void);
150#if !defined(TARGET_SPARC)
151// Please implement a power failure function to signal the OS
152#define qemu_system_powerdown() do{}while(0)
153#else
154void qemu_system_powerdown(void);
155#endif
156
157void main_loop_wait(int timeout);
158
159extern int ram_size;
160extern int bios_size;
161extern int rtc_utc;
162extern int cirrus_vga_enabled;
163extern int graphic_width;
164extern int graphic_height;
165extern int graphic_depth;
166extern const char *keyboard_layout;
167extern int kqemu_allowed;
168extern int win2k_install_hack;
169extern int usb_enabled;
170extern int smp_cpus;
171extern int no_quit;
172extern int semihosting_enabled;
173extern int autostart;
174
175#ifndef VBOX
176#define MAX_OPTION_ROMS 16
177extern const char *option_rom[MAX_OPTION_ROMS];
178extern int nb_option_roms;
179
180/* XXX: make it dynamic */
181#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
182#define BIOS_SIZE ((512 + 32) * 1024)
183#elif defined(TARGET_MIPS)
184#define BIOS_SIZE (4 * 1024 * 1024)
185#else
186#define BIOS_SIZE ((256 + 64) * 1024)
187#endif
188
189/* keyboard/mouse support */
190
191#define MOUSE_EVENT_LBUTTON 0x01
192#define MOUSE_EVENT_RBUTTON 0x02
193#define MOUSE_EVENT_MBUTTON 0x04
194
195typedef void QEMUPutKBDEvent(void *opaque, int keycode);
196typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
197
198typedef struct QEMUPutMouseEntry {
199 QEMUPutMouseEvent *qemu_put_mouse_event;
200 void *qemu_put_mouse_event_opaque;
201 int qemu_put_mouse_event_absolute;
202 char *qemu_put_mouse_event_name;
203
204 /* used internally by qemu for handling mice */
205 struct QEMUPutMouseEntry *next;
206} QEMUPutMouseEntry;
207
208void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
209QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
210 void *opaque, int absolute,
211 const char *name);
212void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
213
214void kbd_put_keycode(int keycode);
215void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
216int kbd_mouse_is_absolute(void);
217
218void do_info_mice(void);
219void do_mouse_set(int index);
220
221/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
222 constants) */
223#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
224#define QEMU_KEY_BACKSPACE 0x007f
225#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
226#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
227#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
228#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
229#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
230#define QEMU_KEY_END QEMU_KEY_ESC1(4)
231#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
232#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
233#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
234
235#define QEMU_KEY_CTRL_UP 0xe400
236#define QEMU_KEY_CTRL_DOWN 0xe401
237#define QEMU_KEY_CTRL_LEFT 0xe402
238#define QEMU_KEY_CTRL_RIGHT 0xe403
239#define QEMU_KEY_CTRL_HOME 0xe404
240#define QEMU_KEY_CTRL_END 0xe405
241#define QEMU_KEY_CTRL_PAGEUP 0xe406
242#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
243
244void kbd_put_keysym(int keysym);
245
246/* async I/O support */
247
248typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
249typedef int IOCanRWHandler(void *opaque);
250typedef void IOHandler(void *opaque);
251
252int qemu_set_fd_handler2(int fd,
253 IOCanRWHandler *fd_read_poll,
254 IOHandler *fd_read,
255 IOHandler *fd_write,
256 void *opaque);
257int qemu_set_fd_handler(int fd,
258 IOHandler *fd_read,
259 IOHandler *fd_write,
260 void *opaque);
261
262/* Polling handling */
263
264/* return TRUE if no sleep should be done afterwards */
265typedef int PollingFunc(void *opaque);
266
267int qemu_add_polling_cb(PollingFunc *func, void *opaque);
268void qemu_del_polling_cb(PollingFunc *func, void *opaque);
269
270#ifdef _WIN32
271/* Wait objects handling */
272typedef void WaitObjectFunc(void *opaque);
273
274int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
275void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
276#endif
277
278typedef struct QEMUBH QEMUBH;
279
280/* character device */
281
282#define CHR_EVENT_BREAK 0 /* serial break char */
283#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
284#define CHR_EVENT_RESET 2 /* new connection established */
285
286
287#define CHR_IOCTL_SERIAL_SET_PARAMS 1
288typedef struct {
289 int speed;
290 int parity;
291 int data_bits;
292 int stop_bits;
293} QEMUSerialSetParams;
294
295#define CHR_IOCTL_SERIAL_SET_BREAK 2
296
297#define CHR_IOCTL_PP_READ_DATA 3
298#define CHR_IOCTL_PP_WRITE_DATA 4
299#define CHR_IOCTL_PP_READ_CONTROL 5
300#define CHR_IOCTL_PP_WRITE_CONTROL 6
301#define CHR_IOCTL_PP_READ_STATUS 7
302
303typedef void IOEventHandler(void *opaque, int event);
304
305typedef struct CharDriverState {
306 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
307 void (*chr_update_read_handler)(struct CharDriverState *s);
308 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
309 IOEventHandler *chr_event;
310 IOCanRWHandler *chr_can_read;
311 IOReadHandler *chr_read;
312 void *handler_opaque;
313 void (*chr_send_event)(struct CharDriverState *chr, int event);
314 void (*chr_close)(struct CharDriverState *chr);
315 void *opaque;
316 QEMUBH *bh;
317} CharDriverState;
318
319CharDriverState *qemu_chr_open(const char *filename);
320void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
321int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
322void qemu_chr_send_event(CharDriverState *s, int event);
323void qemu_chr_add_handlers(CharDriverState *s,
324 IOCanRWHandler *fd_can_read,
325 IOReadHandler *fd_read,
326 IOEventHandler *fd_event,
327 void *opaque);
328int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
329void qemu_chr_reset(CharDriverState *s);
330int qemu_chr_can_read(CharDriverState *s);
331void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
332
333/* consoles */
334
335typedef struct DisplayState DisplayState;
336typedef struct TextConsole TextConsole;
337
338typedef void (*vga_hw_update_ptr)(void *);
339typedef void (*vga_hw_invalidate_ptr)(void *);
340typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
341
342TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
343 vga_hw_invalidate_ptr invalidate,
344 vga_hw_screen_dump_ptr screen_dump,
345 void *opaque);
346void vga_hw_update(void);
347void vga_hw_invalidate(void);
348void vga_hw_screen_dump(const char *filename);
349
350int is_graphic_console(void);
351CharDriverState *text_console_init(DisplayState *ds);
352void console_select(unsigned int index);
353
354/* serial ports */
355
356#define MAX_SERIAL_PORTS 4
357
358extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
359
360/* parallel ports */
361
362#define MAX_PARALLEL_PORTS 3
363
364extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
365
366/* VLANs support */
367
368typedef struct VLANClientState VLANClientState;
369
370struct VLANClientState {
371 IOReadHandler *fd_read;
372 /* Packets may still be sent if this returns zero. It's used to
373 rate-limit the slirp code. */
374 IOCanRWHandler *fd_can_read;
375 void *opaque;
376 struct VLANClientState *next;
377 struct VLANState *vlan;
378 char info_str[256];
379};
380
381typedef struct VLANState {
382 int id;
383 VLANClientState *first_client;
384 struct VLANState *next;
385} VLANState;
386
387VLANState *qemu_find_vlan(int id);
388VLANClientState *qemu_new_vlan_client(VLANState *vlan,
389 IOReadHandler *fd_read,
390 IOCanRWHandler *fd_can_read,
391 void *opaque);
392int qemu_can_send_packet(VLANClientState *vc);
393void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
394void qemu_handler_true(void *opaque);
395
396void do_info_network(void);
397
398/* TAP win32 */
399int tap_win32_init(VLANState *vlan, const char *ifname);
400
401/* NIC info */
402
403#define MAX_NICS 8
404
405typedef struct NICInfo {
406 uint8_t macaddr[6];
407 const char *model;
408 VLANState *vlan;
409} NICInfo;
410
411extern int nb_nics;
412extern NICInfo nd_table[MAX_NICS];
413
414/* timers */
415
416typedef struct QEMUClock QEMUClock;
417typedef struct QEMUTimer QEMUTimer;
418typedef void QEMUTimerCB(void *opaque);
419
420/* The real time clock should be used only for stuff which does not
421 change the virtual machine state, as it is run even if the virtual
422 machine is stopped. The real time clock has a frequency of 1000
423 Hz. */
424extern QEMUClock *rt_clock;
425
426/* The virtual clock is only run during the emulation. It is stopped
427 when the virtual machine is stopped. Virtual timers use a high
428 precision clock, usually cpu cycles (use ticks_per_sec). */
429extern QEMUClock *vm_clock;
430
431int64_t qemu_get_clock(QEMUClock *clock);
432
433QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
434void qemu_free_timer(QEMUTimer *ts);
435void qemu_del_timer(QEMUTimer *ts);
436void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
437int qemu_timer_pending(QEMUTimer *ts);
438
439extern int64_t ticks_per_sec;
440extern int pit_min_timer_count;
441
442int64_t cpu_get_ticks(void);
443void cpu_enable_ticks(void);
444void cpu_disable_ticks(void);
445
446/* VM Load/Save */
447
448typedef struct QEMUFile QEMUFile;
449
450QEMUFile *qemu_fopen(const char *filename, const char *mode);
451void qemu_fflush(QEMUFile *f);
452void qemu_fclose(QEMUFile *f);
453void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
454void qemu_put_byte(QEMUFile *f, int v);
455void qemu_put_be16(QEMUFile *f, unsigned int v);
456void qemu_put_be32(QEMUFile *f, unsigned int v);
457void qemu_put_be64(QEMUFile *f, uint64_t v);
458int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
459int qemu_get_byte(QEMUFile *f);
460unsigned int qemu_get_be16(QEMUFile *f);
461unsigned int qemu_get_be32(QEMUFile *f);
462uint64_t qemu_get_be64(QEMUFile *f);
463
464static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
465{
466 qemu_put_be64(f, *pv);
467}
468
469static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
470{
471 qemu_put_be32(f, *pv);
472}
473
474static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
475{
476 qemu_put_be16(f, *pv);
477}
478
479static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
480{
481 qemu_put_byte(f, *pv);
482}
483
484static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
485{
486 *pv = qemu_get_be64(f);
487}
488
489static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
490{
491 *pv = qemu_get_be32(f);
492}
493
494static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
495{
496 *pv = qemu_get_be16(f);
497}
498
499static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
500{
501 *pv = qemu_get_byte(f);
502}
503
504#if TARGET_LONG_BITS == 64
505#define qemu_put_betl qemu_put_be64
506#define qemu_get_betl qemu_get_be64
507#define qemu_put_betls qemu_put_be64s
508#define qemu_get_betls qemu_get_be64s
509#else
510#define qemu_put_betl qemu_put_be32
511#define qemu_get_betl qemu_get_be32
512#define qemu_put_betls qemu_put_be32s
513#define qemu_get_betls qemu_get_be32s
514#endif
515
516int64_t qemu_ftell(QEMUFile *f);
517int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
518
519typedef void SaveStateHandler(QEMUFile *f, void *opaque);
520typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
521
522int register_savevm(const char *idstr,
523 int instance_id,
524 int version_id,
525 SaveStateHandler *save_state,
526 LoadStateHandler *load_state,
527 void *opaque);
528void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
529void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
530
531void cpu_save(QEMUFile *f, void *opaque);
532int cpu_load(QEMUFile *f, void *opaque, int version_id);
533
534void do_savevm(const char *name);
535void do_loadvm(const char *name);
536void do_delvm(const char *name);
537void do_info_snapshots(void);
538
539/* bottom halves */
540typedef void QEMUBHFunc(void *opaque);
541
542QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
543void qemu_bh_schedule(QEMUBH *bh);
544void qemu_bh_cancel(QEMUBH *bh);
545void qemu_bh_delete(QEMUBH *bh);
546int qemu_bh_poll(void);
547
548/* block.c */
549typedef struct BlockDriverState BlockDriverState;
550typedef struct BlockDriver BlockDriver;
551
552extern BlockDriver bdrv_raw;
553extern BlockDriver bdrv_host_device;
554extern BlockDriver bdrv_cow;
555extern BlockDriver bdrv_qcow;
556extern BlockDriver bdrv_vmdk;
557extern BlockDriver bdrv_cloop;
558extern BlockDriver bdrv_dmg;
559extern BlockDriver bdrv_bochs;
560extern BlockDriver bdrv_vpc;
561extern BlockDriver bdrv_vvfat;
562extern BlockDriver bdrv_qcow2;
563
564typedef struct BlockDriverInfo {
565 /* in bytes, 0 if irrelevant */
566 int cluster_size;
567 /* offset at which the VM state can be saved (0 if not possible) */
568 int64_t vm_state_offset;
569} BlockDriverInfo;
570
571typedef struct QEMUSnapshotInfo {
572 char id_str[128]; /* unique snapshot id */
573 /* the following fields are informative. They are not needed for
574 the consistency of the snapshot */
575 char name[256]; /* user choosen name */
576 uint32_t vm_state_size; /* VM state info size */
577 uint32_t date_sec; /* UTC date of the snapshot */
578 uint32_t date_nsec;
579 uint64_t vm_clock_nsec; /* VM clock relative to boot */
580} QEMUSnapshotInfo;
581
582#define BDRV_O_RDONLY 0x0000
583#define BDRV_O_RDWR 0x0002
584#define BDRV_O_ACCESS 0x0003
585#define BDRV_O_CREAT 0x0004 /* create an empty file */
586#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
587#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
588 use a disk image format on top of
589 it (default for
590 bdrv_file_open()) */
591
592void bdrv_init(void);
593BlockDriver *bdrv_find_format(const char *format_name);
594int bdrv_create(BlockDriver *drv,
595 const char *filename, int64_t size_in_sectors,
596 const char *backing_file, int flags);
597BlockDriverState *bdrv_new(const char *device_name);
598void bdrv_delete(BlockDriverState *bs);
599int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
600int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
601int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
602 BlockDriver *drv);
603void bdrv_close(BlockDriverState *bs);
604int bdrv_read(BlockDriverState *bs, int64_t sector_num,
605 uint8_t *buf, int nb_sectors);
606int bdrv_write(BlockDriverState *bs, int64_t sector_num,
607 const uint8_t *buf, int nb_sectors);
608int bdrv_pread(BlockDriverState *bs, int64_t offset,
609 void *buf, int count);
610int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
611 const void *buf, int count);
612int bdrv_truncate(BlockDriverState *bs, int64_t offset);
613int64_t bdrv_getlength(BlockDriverState *bs);
614void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
615int bdrv_commit(BlockDriverState *bs);
616void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
617/* async block I/O */
618typedef struct BlockDriverAIOCB BlockDriverAIOCB;
619typedef void BlockDriverCompletionFunc(void *opaque, int ret);
620
621BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
622 uint8_t *buf, int nb_sectors,
623 BlockDriverCompletionFunc *cb, void *opaque);
624BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
625 const uint8_t *buf, int nb_sectors,
626 BlockDriverCompletionFunc *cb, void *opaque);
627void bdrv_aio_cancel(BlockDriverAIOCB *acb);
628
629void qemu_aio_init(void);
630void qemu_aio_poll(void);
631void qemu_aio_flush(void);
632void qemu_aio_wait_start(void);
633void qemu_aio_wait(void);
634void qemu_aio_wait_end(void);
635
636/* Ensure contents are flushed to disk. */
637void bdrv_flush(BlockDriverState *bs);
638
639#define BDRV_TYPE_HD 0
640#define BDRV_TYPE_CDROM 1
641#define BDRV_TYPE_FLOPPY 2
642#define BIOS_ATA_TRANSLATION_AUTO 0
643#define BIOS_ATA_TRANSLATION_NONE 1
644#define BIOS_ATA_TRANSLATION_LBA 2
645#define BIOS_ATA_TRANSLATION_LARGE 3
646#define BIOS_ATA_TRANSLATION_RECHS 4
647
648void bdrv_set_geometry_hint(BlockDriverState *bs,
649 int cyls, int heads, int secs);
650void bdrv_set_type_hint(BlockDriverState *bs, int type);
651void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
652void bdrv_get_geometry_hint(BlockDriverState *bs,
653 int *pcyls, int *pheads, int *psecs);
654int bdrv_get_type_hint(BlockDriverState *bs);
655int bdrv_get_translation_hint(BlockDriverState *bs);
656int bdrv_is_removable(BlockDriverState *bs);
657int bdrv_is_read_only(BlockDriverState *bs);
658int bdrv_is_inserted(BlockDriverState *bs);
659int bdrv_media_changed(BlockDriverState *bs);
660int bdrv_is_locked(BlockDriverState *bs);
661void bdrv_set_locked(BlockDriverState *bs, int locked);
662void bdrv_eject(BlockDriverState *bs, int eject_flag);
663void bdrv_set_change_cb(BlockDriverState *bs,
664 void (*change_cb)(void *opaque), void *opaque);
665void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
666void bdrv_info(void);
667BlockDriverState *bdrv_find(const char *name);
668void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
669int bdrv_is_encrypted(BlockDriverState *bs);
670int bdrv_set_key(BlockDriverState *bs, const char *key);
671void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
672 void *opaque);
673const char *bdrv_get_device_name(BlockDriverState *bs);
674int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
675 const uint8_t *buf, int nb_sectors);
676int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
677
678void bdrv_get_backing_filename(BlockDriverState *bs,
679 char *filename, int filename_size);
680int bdrv_snapshot_create(BlockDriverState *bs,
681 QEMUSnapshotInfo *sn_info);
682int bdrv_snapshot_goto(BlockDriverState *bs,
683 const char *snapshot_id);
684int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
685int bdrv_snapshot_list(BlockDriverState *bs,
686 QEMUSnapshotInfo **psn_info);
687char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
688
689char *get_human_readable_size(char *buf, int buf_size, int64_t size);
690int path_is_absolute(const char *path);
691void path_combine(char *dest, int dest_size,
692 const char *base_path,
693 const char *filename);
694
695#ifndef QEMU_TOOL
696
697typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
698 int boot_device,
699 DisplayState *ds, const char **fd_filename, int snapshot,
700 const char *kernel_filename, const char *kernel_cmdline,
701 const char *initrd_filename);
702
703typedef struct QEMUMachine {
704 const char *name;
705 const char *desc;
706 QEMUMachineInitFunc *init;
707 struct QEMUMachine *next;
708} QEMUMachine;
709
710int qemu_register_machine(QEMUMachine *m);
711
712typedef void SetIRQFunc(void *opaque, int irq_num, int level);
713typedef void IRQRequestFunc(void *opaque, int level);
714
715/* ISA bus */
716
717extern target_phys_addr_t isa_mem_base;
718
719typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
720typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
721
722int register_ioport_read(int start, int length, int size,
723 IOPortReadFunc *func, void *opaque);
724int register_ioport_write(int start, int length, int size,
725 IOPortWriteFunc *func, void *opaque);
726void isa_unassign_ioport(int start, int length);
727
728void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
729
730/* PCI bus */
731
732extern target_phys_addr_t pci_mem_base;
733
734typedef struct PCIBus PCIBus;
735typedef struct PCIDevice PCIDevice;
736
737typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
738 uint32_t address, uint32_t data, int len);
739typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
740 uint32_t address, int len);
741typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
742 uint32_t addr, uint32_t size, int type);
743
744#define PCI_ADDRESS_SPACE_MEM 0x00
745#define PCI_ADDRESS_SPACE_IO 0x01
746#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
747
748typedef struct PCIIORegion {
749 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
750 uint32_t size;
751 uint8_t type;
752 PCIMapIORegionFunc *map_func;
753} PCIIORegion;
754
755#define PCI_ROM_SLOT 6
756#define PCI_NUM_REGIONS 7
757
758#define PCI_DEVICES_MAX 64
759
760#define PCI_VENDOR_ID 0x00 /* 16 bits */
761#define PCI_DEVICE_ID 0x02 /* 16 bits */
762#define PCI_COMMAND 0x04 /* 16 bits */
763#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
764#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
765#define PCI_CLASS_DEVICE 0x0a /* Device class */
766#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
767#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
768#define PCI_MIN_GNT 0x3e /* 8 bits */
769#define PCI_MAX_LAT 0x3f /* 8 bits */
770
771struct PCIDevice {
772 /* PCI config space */
773 uint8_t config[256];
774
775 /* the following fields are read only */
776 PCIBus *bus;
777 int devfn;
778 char name[64];
779 PCIIORegion io_regions[PCI_NUM_REGIONS];
780
781 /* do not access the following fields */
782 PCIConfigReadFunc *config_read;
783 PCIConfigWriteFunc *config_write;
784 /* ??? This is a PC-specific hack, and should be removed. */
785 int irq_index;
786
787 /* Current IRQ levels. Used internally by the generic PCI code. */
788 int irq_state[4];
789};
790
791PCIDevice *pci_register_device(PCIBus *bus, const char *name,
792 int instance_size, int devfn,
793 PCIConfigReadFunc *config_read,
794 PCIConfigWriteFunc *config_write);
795
796void pci_register_io_region(PCIDevice *pci_dev, int region_num,
797 uint32_t size, int type,
798 PCIMapIORegionFunc *map_func);
799
800void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
801
802uint32_t pci_default_read_config(PCIDevice *d,
803 uint32_t address, int len);
804void pci_default_write_config(PCIDevice *d,
805 uint32_t address, uint32_t val, int len);
806void pci_device_save(PCIDevice *s, QEMUFile *f);
807int pci_device_load(PCIDevice *s, QEMUFile *f);
808
809typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
810typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
811PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
812 void *pic, int devfn_min, int nirq);
813
814void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
815void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
816uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
817int pci_bus_num(PCIBus *s);
818void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
819
820void pci_info(void);
821PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
822 pci_map_irq_fn map_irq, const char *name);
823
824/* prep_pci.c */
825PCIBus *pci_prep_init(void);
826
827/* grackle_pci.c */
828PCIBus *pci_grackle_init(uint32_t base, void *pic);
829
830/* unin_pci.c */
831PCIBus *pci_pmac_init(void *pic);
832
833/* apb_pci.c */
834PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
835 void *pic);
836
837PCIBus *pci_vpb_init(void *pic, int irq, int realview);
838
839/* piix_pci.c */
840PCIBus *i440fx_init(PCIDevice **pi440fx_state);
841void i440fx_set_smm(PCIDevice *d, int val);
842int piix3_init(PCIBus *bus, int devfn);
843void i440fx_init_memory_mappings(PCIDevice *d);
844
845int piix4_init(PCIBus *bus, int devfn);
846
847/* openpic.c */
848typedef struct openpic_t openpic_t;
849void openpic_set_irq(void *opaque, int n_IRQ, int level);
850openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
851 CPUState **envp);
852
853/* heathrow_pic.c */
854typedef struct HeathrowPICS HeathrowPICS;
855void heathrow_pic_set_irq(void *opaque, int num, int level);
856HeathrowPICS *heathrow_pic_init(int *pmem_index);
857
858/* gt64xxx.c */
859PCIBus *pci_gt64120_init(void *pic);
860
861#ifdef HAS_AUDIO
862struct soundhw {
863 const char *name;
864 const char *descr;
865 int enabled;
866 int isa;
867 union {
868 int (*init_isa) (AudioState *s);
869 int (*init_pci) (PCIBus *bus, AudioState *s);
870 } init;
871};
872
873extern struct soundhw soundhw[];
874#endif
875
876/* vga.c */
877
878#define VGA_RAM_SIZE (8192 * 1024)
879
880struct DisplayState {
881 uint8_t *data;
882 int linesize;
883 int depth;
884 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
885 int width;
886 int height;
887 void *opaque;
888
889 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
890 void (*dpy_resize)(struct DisplayState *s, int w, int h);
891 void (*dpy_refresh)(struct DisplayState *s);
892 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
893};
894
895static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
896{
897 s->dpy_update(s, x, y, w, h);
898}
899
900static inline void dpy_resize(DisplayState *s, int w, int h)
901{
902 s->dpy_resize(s, w, h);
903}
904
905int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
906 unsigned long vga_ram_offset, int vga_ram_size);
907int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
908 unsigned long vga_ram_offset, int vga_ram_size,
909 unsigned long vga_bios_offset, int vga_bios_size);
910
911/* cirrus_vga.c */
912void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
913 unsigned long vga_ram_offset, int vga_ram_size);
914void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
915 unsigned long vga_ram_offset, int vga_ram_size);
916
917/* sdl.c */
918void sdl_display_init(DisplayState *ds, int full_screen);
919
920/* cocoa.m */
921void cocoa_display_init(DisplayState *ds, int full_screen);
922
923/* vnc.c */
924void vnc_display_init(DisplayState *ds, const char *display);
925
926/* x_keymap.c */
927extern uint8_t _translate_keycode(const int key);
928
929/* ide.c */
930#define MAX_DISKS 4
931
932extern BlockDriverState *bs_table[MAX_DISKS + 1];
933
934void isa_ide_init(int iobase, int iobase2, int irq,
935 BlockDriverState *hd0, BlockDriverState *hd1);
936void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
937 int secondary_ide_enabled);
938void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
939int pmac_ide_init (BlockDriverState **hd_table,
940 SetIRQFunc *set_irq, void *irq_opaque, int irq);
941
942/* cdrom.c */
943int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
944int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
945
946/* es1370.c */
947int es1370_init (PCIBus *bus, AudioState *s);
948
949/* sb16.c */
950int SB16_init (AudioState *s);
951
952/* adlib.c */
953int Adlib_init (AudioState *s);
954
955/* gus.c */
956int GUS_init (AudioState *s);
957
958/* dma.c */
959typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
960int DMA_get_channel_mode (int nchan);
961int DMA_read_memory (int nchan, void *buf, int pos, int size);
962int DMA_write_memory (int nchan, void *buf, int pos, int size);
963void DMA_hold_DREQ (int nchan);
964void DMA_release_DREQ (int nchan);
965void DMA_schedule(int nchan);
966void DMA_run (void);
967void DMA_init (int high_page_enable);
968void DMA_register_channel (int nchan,
969 DMA_transfer_handler transfer_handler,
970 void *opaque);
971/* fdc.c */
972#define MAX_FD 2
973extern BlockDriverState *fd_table[MAX_FD];
974
975typedef struct fdctrl_t fdctrl_t;
976
977fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
978 uint32_t io_base,
979 BlockDriverState **fds);
980int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
981
982/* ne2000.c */
983
984void isa_ne2000_init(int base, int irq, NICInfo *nd);
985void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
986
987/* rtl8139.c */
988
989void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
990
991/* pcnet.c */
992
993void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
994void pcnet_h_reset(void *opaque);
995void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
996
997
998/* pckbd.c */
999
1000void kbd_init(void);
1001
1002/* mc146818rtc.c */
1003
1004typedef struct RTCState RTCState;
1005
1006RTCState *rtc_init(int base, int irq);
1007void rtc_set_memory(RTCState *s, int addr, int val);
1008void rtc_set_date(RTCState *s, const struct tm *tm);
1009
1010/* serial.c */
1011
1012typedef struct SerialState SerialState;
1013SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
1014 int base, int irq, CharDriverState *chr);
1015SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
1016 target_ulong base, int it_shift,
1017 int irq, CharDriverState *chr);
1018
1019/* parallel.c */
1020
1021typedef struct ParallelState ParallelState;
1022ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1023
1024/* i8259.c */
1025
1026typedef struct PicState2 PicState2;
1027extern PicState2 *isa_pic;
1028void pic_set_irq(int irq, int level);
1029void pic_set_irq_new(void *opaque, int irq, int level);
1030PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
1031void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1032 void *alt_irq_opaque);
1033int pic_read_irq(PicState2 *s);
1034void pic_update_irq(PicState2 *s);
1035uint32_t pic_intack_read(PicState2 *s);
1036void pic_info(void);
1037void irq_info(void);
1038
1039/* APIC */
1040typedef struct IOAPICState IOAPICState;
1041
1042int apic_init(CPUState *env);
1043int apic_get_interrupt(CPUState *env);
1044IOAPICState *ioapic_init(void);
1045void ioapic_set_irq(void *opaque, int vector, int level);
1046
1047/* i8254.c */
1048
1049#define PIT_FREQ 1193182
1050
1051typedef struct PITState PITState;
1052
1053PITState *pit_init(int base, int irq);
1054void pit_set_gate(PITState *pit, int channel, int val);
1055int pit_get_gate(PITState *pit, int channel);
1056int pit_get_initial_count(PITState *pit, int channel);
1057int pit_get_mode(PITState *pit, int channel);
1058int pit_get_out(PITState *pit, int channel, int64_t current_time);
1059
1060/* pcspk.c */
1061void pcspk_init(PITState *);
1062int pcspk_audio_init(AudioState *);
1063
1064#include "hw/smbus.h"
1065
1066/* acpi.c */
1067extern int acpi_enabled;
1068void piix4_pm_init(PCIBus *bus, int devfn);
1069void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
1070void acpi_bios_init(void);
1071
1072/* smbus_eeprom.c */
1073SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf);
1074
1075/* pc.c */
1076extern QEMUMachine pc_machine;
1077extern QEMUMachine isapc_machine;
1078extern int fd_bootchk;
1079
1080void ioport_set_a20(int enable);
1081int ioport_get_a20(void);
1082
1083/* ppc.c */
1084extern QEMUMachine prep_machine;
1085extern QEMUMachine core99_machine;
1086extern QEMUMachine heathrow_machine;
1087
1088/* mips_r4k.c */
1089extern QEMUMachine mips_machine;
1090
1091/* mips_malta.c */
1092extern QEMUMachine mips_malta_machine;
1093
1094/* mips_int */
1095extern void cpu_mips_irq_request(void *opaque, int irq, int level);
1096
1097/* mips_timer.c */
1098extern void cpu_mips_clock_init(CPUState *);
1099extern void cpu_mips_irqctrl_init (void);
1100
1101/* shix.c */
1102extern QEMUMachine shix_machine;
1103
1104#ifdef TARGET_PPC
1105ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1106#endif
1107void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1108
1109extern CPUWriteMemoryFunc *PPC_io_write[];
1110extern CPUReadMemoryFunc *PPC_io_read[];
1111void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1112
1113/* sun4m.c */
1114extern QEMUMachine sun4m_machine;
1115void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
1116
1117/* iommu.c */
1118void *iommu_init(uint32_t addr);
1119void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1120 uint8_t *buf, int len, int is_write);
1121static inline void sparc_iommu_memory_read(void *opaque,
1122 target_phys_addr_t addr,
1123 uint8_t *buf, int len)
1124{
1125 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1126}
1127
1128static inline void sparc_iommu_memory_write(void *opaque,
1129 target_phys_addr_t addr,
1130 uint8_t *buf, int len)
1131{
1132 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1133}
1134
1135/* tcx.c */
1136void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1137 unsigned long vram_offset, int vram_size, int width, int height);
1138
1139/* slavio_intctl.c */
1140void *slavio_intctl_init();
1141void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1142void slavio_pic_info(void *opaque);
1143void slavio_irq_info(void *opaque);
1144void slavio_pic_set_irq(void *opaque, int irq, int level);
1145void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1146
1147/* loader.c */
1148int get_image_size(const char *filename);
1149int load_image(const char *filename, uint8_t *addr);
1150int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
1151int load_aout(const char *filename, uint8_t *addr);
1152
1153/* slavio_timer.c */
1154void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
1155
1156/* slavio_serial.c */
1157SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1158void slavio_serial_ms_kbd_init(int base, int irq);
1159
1160/* slavio_misc.c */
1161void *slavio_misc_init(uint32_t base, int irq);
1162void slavio_set_power_fail(void *opaque, int power_failing);
1163
1164/* esp.c */
1165void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1166void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1167void esp_reset(void *opaque);
1168
1169/* sparc32_dma.c */
1170void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1171 void *intctl);
1172void ledma_set_irq(void *opaque, int isr);
1173void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1174 uint8_t *buf, int len, int do_bswap);
1175void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1176 uint8_t *buf, int len, int do_bswap);
1177void espdma_raise_irq(void *opaque);
1178void espdma_clear_irq(void *opaque);
1179void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1180void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1181void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1182 void *lance_opaque);
1183
1184/* cs4231.c */
1185void cs_init(target_phys_addr_t base, int irq, void *intctl);
1186
1187/* sun4u.c */
1188extern QEMUMachine sun4u_machine;
1189
1190/* NVRAM helpers */
1191#include "hw/m48t59.h"
1192
1193void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1194uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1195void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1196uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1197void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1198uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1199void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1200 const unsigned char *str, uint32_t max);
1201int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1202void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1203 uint32_t start, uint32_t count);
1204int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1205 const unsigned char *arch,
1206 uint32_t RAM_size, int boot_device,
1207 uint32_t kernel_image, uint32_t kernel_size,
1208 const char *cmdline,
1209 uint32_t initrd_image, uint32_t initrd_size,
1210 uint32_t NVRAM_image,
1211 int width, int height, int depth);
1212
1213/* adb.c */
1214
1215#define MAX_ADB_DEVICES 16
1216
1217#define ADB_MAX_OUT_LEN 16
1218
1219typedef struct ADBDevice ADBDevice;
1220
1221/* buf = NULL means polling */
1222typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1223 const uint8_t *buf, int len);
1224typedef int ADBDeviceReset(ADBDevice *d);
1225
1226struct ADBDevice {
1227 struct ADBBusState *bus;
1228 int devaddr;
1229 int handler;
1230 ADBDeviceRequest *devreq;
1231 ADBDeviceReset *devreset;
1232 void *opaque;
1233};
1234
1235typedef struct ADBBusState {
1236 ADBDevice devices[MAX_ADB_DEVICES];
1237 int nb_devices;
1238 int poll_index;
1239} ADBBusState;
1240
1241int adb_request(ADBBusState *s, uint8_t *buf_out,
1242 const uint8_t *buf, int len);
1243int adb_poll(ADBBusState *s, uint8_t *buf_out);
1244
1245ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1246 ADBDeviceRequest *devreq,
1247 ADBDeviceReset *devreset,
1248 void *opaque);
1249void adb_kbd_init(ADBBusState *bus);
1250void adb_mouse_init(ADBBusState *bus);
1251
1252/* cuda.c */
1253
1254extern ADBBusState adb_bus;
1255int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1256
1257#include "hw/usb.h"
1258
1259/* usb ports of the VM */
1260
1261void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1262 usb_attachfn attach);
1263
1264#define VM_USB_HUB_SIZE 8
1265
1266void do_usb_add(const char *devname);
1267void do_usb_del(const char *devname);
1268void usb_info(void);
1269
1270/* scsi-disk.c */
1271enum scsi_reason {
1272 SCSI_REASON_DONE, /* Command complete. */
1273 SCSI_REASON_DATA /* Transfer complete, more data required. */
1274};
1275
1276typedef struct SCSIDevice SCSIDevice;
1277typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1278 uint32_t arg);
1279
1280SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1281 int tcq,
1282 scsi_completionfn completion,
1283 void *opaque);
1284void scsi_disk_destroy(SCSIDevice *s);
1285
1286int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1287/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1288 layer the completion routine may be called directly by
1289 scsi_{read,write}_data. */
1290void scsi_read_data(SCSIDevice *s, uint32_t tag);
1291int scsi_write_data(SCSIDevice *s, uint32_t tag);
1292void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1293uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1294
1295/* lsi53c895a.c */
1296void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1297void *lsi_scsi_init(PCIBus *bus, int devfn);
1298
1299/* integratorcp.c */
1300extern QEMUMachine integratorcp926_machine;
1301extern QEMUMachine integratorcp1026_machine;
1302
1303/* versatilepb.c */
1304extern QEMUMachine versatilepb_machine;
1305extern QEMUMachine versatileab_machine;
1306
1307/* realview.c */
1308extern QEMUMachine realview_machine;
1309
1310/* ps2.c */
1311void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1312void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1313void ps2_write_mouse(void *, int val);
1314void ps2_write_keyboard(void *, int val);
1315uint32_t ps2_read_data(void *);
1316void ps2_queue(void *, int b);
1317void ps2_keyboard_set_translation(void *opaque, int mode);
1318
1319/* smc91c111.c */
1320void smc91c111_init(NICInfo *, uint32_t, void *, int);
1321
1322/* pl110.c */
1323void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1324
1325/* pl011.c */
1326void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1327
1328/* pl050.c */
1329void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1330
1331/* pl080.c */
1332void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1333
1334/* pl190.c */
1335void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1336
1337/* arm-timer.c */
1338void sp804_init(uint32_t base, void *pic, int irq);
1339void icp_pit_init(uint32_t base, void *pic, int irq);
1340
1341/* arm_sysctl.c */
1342void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1343
1344/* arm_gic.c */
1345void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1346
1347/* arm_boot.c */
1348
1349void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
1350 const char *kernel_cmdline, const char *initrd_filename,
1351 int board_id);
1352
1353/* sh7750.c */
1354struct SH7750State;
1355
1356struct SH7750State *sh7750_init(CPUState * cpu);
1357
1358typedef struct {
1359 /* The callback will be triggered if any of the designated lines change */
1360 uint16_t portamask_trigger;
1361 uint16_t portbmask_trigger;
1362 /* Return 0 if no action was taken */
1363 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1364 uint16_t * periph_pdtra,
1365 uint16_t * periph_portdira,
1366 uint16_t * periph_pdtrb,
1367 uint16_t * periph_portdirb);
1368} sh7750_io_device;
1369
1370int sh7750_register_io_device(struct SH7750State *s,
1371 sh7750_io_device * device);
1372/* tc58128.c */
1373int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1374
1375/* NOR flash devices */
1376typedef struct pflash_t pflash_t;
1377
1378pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1379 BlockDriverState *bs,
1380 target_ulong sector_len, int nb_blocs, int width,
1381 uint16_t id0, uint16_t id1,
1382 uint16_t id2, uint16_t id3);
1383
1384#include "gdbstub.h"
1385
1386#endif /* defined(QEMU_TOOL) */
1387
1388/* monitor.c */
1389void monitor_init(CharDriverState *hd, int show_banner);
1390void term_puts(const char *str);
1391void term_vprintf(const char *fmt, va_list ap);
1392void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1393void term_print_filename(const char *filename);
1394void term_flush(void);
1395void term_print_help(void);
1396void monitor_readline(const char *prompt, int is_password,
1397 char *buf, int buf_size);
1398
1399/* readline.c */
1400typedef void ReadLineFunc(void *opaque, const char *str);
1401
1402extern int completion_index;
1403void add_completion(const char *str);
1404void readline_handle_byte(int ch);
1405void readline_find_completion(const char *cmdline);
1406const char *readline_get_history(unsigned int index);
1407void readline_start(const char *prompt, int is_password,
1408 ReadLineFunc *readline_func, void *opaque);
1409
1410void kqemu_record_dump(void);
1411
1412#endif /* !VBOX */
1413
1414#endif /* VL_H */
注意: 瀏覽 TracBrowser 來幫助您使用儲存庫瀏覽器

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette