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source: vbox/trunk/src/recompiler_new/softmmu_header.h@ 19058

最後變更 在這個檔案從19058是 13731,由 vboxsync 提交於 16 年 前

more cleanup, 32-bit mode still doesn't work.
Very hard to tell why.

  • 屬性 svn:eol-style 設為 native
檔案大小: 10.6 KB
 
1/*
2 * Software MMU support
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23 * other than GPL or LGPL is available it will apply instead, Sun elects to use only
24 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25 * a choice of LGPL license versions is made available with the language indicating
26 * that LGPLv2 or any later version may be used, or where a choice of which version
27 * of the LGPL is applied is otherwise unspecified.
28 */
29#if DATA_SIZE == 8
30#define SUFFIX q
31#define USUFFIX q
32#define DATA_TYPE uint64_t
33#elif DATA_SIZE == 4
34#define SUFFIX l
35#define USUFFIX l
36#define DATA_TYPE uint32_t
37#elif DATA_SIZE == 2
38#define SUFFIX w
39#define USUFFIX uw
40#define DATA_TYPE uint16_t
41#define DATA_STYPE int16_t
42#elif DATA_SIZE == 1
43#define SUFFIX b
44#define USUFFIX ub
45#define DATA_TYPE uint8_t
46#define DATA_STYPE int8_t
47#else
48#error unsupported data size
49#endif
50
51#if ACCESS_TYPE < (NB_MMU_MODES)
52
53#define CPU_MMU_INDEX ACCESS_TYPE
54#define MMUSUFFIX _mmu
55
56#elif ACCESS_TYPE == (NB_MMU_MODES)
57
58#define CPU_MMU_INDEX (cpu_mmu_index(env))
59#define MMUSUFFIX _mmu
60
61#elif ACCESS_TYPE == (NB_MMU_MODES + 1)
62
63#define CPU_MMU_INDEX (cpu_mmu_index(env))
64#define MMUSUFFIX _cmmu
65
66#else
67#error invalid ACCESS_TYPE
68#endif
69
70#if DATA_SIZE == 8
71#define RES_TYPE uint64_t
72#else
73#define RES_TYPE int
74#endif
75
76#if ACCESS_TYPE == (NB_MMU_MODES + 1)
77#define ADDR_READ addr_code
78#else
79#define ADDR_READ addr_read
80#endif
81
82#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
83 (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU) && !defined(VBOX)
84
85static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
86{
87 int res;
88
89 asm volatile ("movl %1, %%edx\n"
90 "movl %1, %%eax\n"
91 "shrl %3, %%edx\n"
92 "andl %4, %%eax\n"
93 "andl %2, %%edx\n"
94 "leal %5(%%edx, %%ebp), %%edx\n"
95 "cmpl (%%edx), %%eax\n"
96 "movl %1, %%eax\n"
97 "je 1f\n"
98 "movl %6, %%edx\n"
99 "call %7\n"
100 "movl %%eax, %0\n"
101 "jmp 2f\n"
102 "1:\n"
103 "addl 12(%%edx), %%eax\n"
104#if DATA_SIZE == 1
105 "movzbl (%%eax), %0\n"
106#elif DATA_SIZE == 2
107 "movzwl (%%eax), %0\n"
108#elif DATA_SIZE == 4
109 "movl (%%eax), %0\n"
110#else
111#error unsupported size
112#endif
113 "2:\n"
114 : "=r" (res)
115 : "r" (ptr),
116 "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
117 "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
118 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
119 "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
120 "i" (CPU_MMU_INDEX),
121 "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
122 : "%eax", "%ecx", "%edx", "memory", "cc");
123 return res;
124}
125
126#if DATA_SIZE <= 2
127static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
128{
129 int res;
130
131 asm volatile ("movl %1, %%edx\n"
132 "movl %1, %%eax\n"
133 "shrl %3, %%edx\n"
134 "andl %4, %%eax\n"
135 "andl %2, %%edx\n"
136 "leal %5(%%edx, %%ebp), %%edx\n"
137 "cmpl (%%edx), %%eax\n"
138 "movl %1, %%eax\n"
139 "je 1f\n"
140 "movl %6, %%edx\n"
141 "call %7\n"
142#if DATA_SIZE == 1
143 "movsbl %%al, %0\n"
144#elif DATA_SIZE == 2
145 "movswl %%ax, %0\n"
146#else
147#error unsupported size
148#endif
149 "jmp 2f\n"
150 "1:\n"
151 "addl 12(%%edx), %%eax\n"
152#if DATA_SIZE == 1
153 "movsbl (%%eax), %0\n"
154#elif DATA_SIZE == 2
155 "movswl (%%eax), %0\n"
156#else
157#error unsupported size
158#endif
159 "2:\n"
160 : "=r" (res)
161 : "r" (ptr),
162 "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
163 "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
164 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
165 "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)),
166 "i" (CPU_MMU_INDEX),
167 "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
168 : "%eax", "%ecx", "%edx", "memory", "cc");
169 return res;
170}
171#endif
172
173static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
174{
175 asm volatile ("movl %0, %%edx\n"
176 "movl %0, %%eax\n"
177 "shrl %3, %%edx\n"
178 "andl %4, %%eax\n"
179 "andl %2, %%edx\n"
180 "leal %5(%%edx, %%ebp), %%edx\n"
181 "cmpl (%%edx), %%eax\n"
182 "movl %0, %%eax\n"
183 "je 1f\n"
184#if DATA_SIZE == 1
185 "movzbl %b1, %%edx\n"
186#elif DATA_SIZE == 2
187 "movzwl %w1, %%edx\n"
188#elif DATA_SIZE == 4
189 "movl %1, %%edx\n"
190#else
191#error unsupported size
192#endif
193 "movl %6, %%ecx\n"
194 "call %7\n"
195 "jmp 2f\n"
196 "1:\n"
197 "addl 8(%%edx), %%eax\n"
198#if DATA_SIZE == 1
199 "movb %b1, (%%eax)\n"
200#elif DATA_SIZE == 2
201 "movw %w1, (%%eax)\n"
202#elif DATA_SIZE == 4
203 "movl %1, (%%eax)\n"
204#else
205#error unsupported size
206#endif
207 "2:\n"
208 :
209 : "r" (ptr),
210#if DATA_SIZE == 1
211 "q" (v),
212#else
213 "r" (v),
214#endif
215 "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
216 "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
217 "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
218 "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)),
219 "i" (CPU_MMU_INDEX),
220 "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
221 : "%eax", "%ecx", "%edx", "memory", "cc");
222}
223#else
224
225/* generic load/store macros */
226
227#ifndef VBOX
228static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
229#else
230DECLINLINE(RES_TYPE) glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
231#endif
232{
233
234 int page_index;
235 RES_TYPE res;
236 target_ulong addr;
237 unsigned long physaddr;
238 int mmu_idx;
239
240 addr = ptr;
241 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
242 mmu_idx = CPU_MMU_INDEX;
243 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
244 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
245 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
246 } else {
247 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
248 res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
249 }
250 return res;
251}
252
253#if DATA_SIZE <= 2
254#ifndef VBOX
255static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
256#else
257DECLINLINE(int) glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
258#endif
259{
260 int res, page_index;
261 target_ulong addr;
262 unsigned long physaddr;
263 int mmu_idx;
264
265 addr = ptr;
266 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
267 mmu_idx = CPU_MMU_INDEX;
268 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
269 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
270 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
271 } else {
272 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
273 res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
274 }
275 return res;
276}
277#endif
278
279#if ACCESS_TYPE != (NB_MMU_MODES + 1)
280
281/* generic store macro */
282#ifndef VBOX
283static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
284#else
285DECLINLINE(void) glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
286#endif
287{
288 int page_index;
289 target_ulong addr;
290 unsigned long physaddr;
291 int mmu_idx;
292
293 addr = ptr;
294 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
295 mmu_idx = CPU_MMU_INDEX;
296 if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
297 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
298 glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
299 } else {
300 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
301 glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
302 }
303}
304
305#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
306
307#endif /* !asm */
308
309#if ACCESS_TYPE != (NB_MMU_MODES + 1)
310
311#if DATA_SIZE == 8
312#ifndef VBOX
313static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
314#else
315DECLINLINE(float64) glue(ldfq, MEMSUFFIX)(target_ulong ptr)
316#endif
317{
318 union {
319 float64 d;
320 uint64_t i;
321 } u;
322 u.i = glue(ldq, MEMSUFFIX)(ptr);
323 return u.d;
324}
325
326#ifndef VBOX
327static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
328#else
329DECLINLINE(void) glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
330#endif
331{
332 union {
333 float64 d;
334 uint64_t i;
335 } u;
336 u.d = v;
337 glue(stq, MEMSUFFIX)(ptr, u.i);
338}
339#endif /* DATA_SIZE == 8 */
340
341#if DATA_SIZE == 4
342#ifndef VBOX
343static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
344#else
345DECLINLINE(float32) glue(ldfl, MEMSUFFIX)(target_ulong ptr)
346#endif
347{
348 union {
349 float32 f;
350 uint32_t i;
351 } u;
352 u.i = glue(ldl, MEMSUFFIX)(ptr);
353 return u.f;
354}
355
356#ifndef VBOX
357static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
358#else
359DECLINLINE(void) glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
360#endif
361{
362 union {
363 float32 f;
364 uint32_t i;
365 } u;
366 u.f = v;
367 glue(stl, MEMSUFFIX)(ptr, u.i);
368}
369#endif /* DATA_SIZE == 4 */
370
371#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
372
373#undef RES_TYPE
374#undef DATA_TYPE
375#undef DATA_STYPE
376#undef SUFFIX
377#undef USUFFIX
378#undef DATA_SIZE
379#undef CPU_MMU_INDEX
380#undef MMUSUFFIX
381#undef ADDR_READ
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