| 1 | /*
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| 2 | * Software MMU support
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| 3 | *
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| 4 | * Copyright (c) 2003 Fabrice Bellard
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| 5 | *
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| 6 | * This library is free software; you can redistribute it and/or
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| 7 | * modify it under the terms of the GNU Lesser General Public
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| 8 | * License as published by the Free Software Foundation; either
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| 9 | * version 2 of the License, or (at your option) any later version.
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| 10 | *
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| 11 | * This library is distributed in the hope that it will be useful,
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| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 14 | * Lesser General Public License for more details.
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| 15 | *
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| 16 | * You should have received a copy of the GNU Lesser General Public
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| 17 | * License along with this library; if not, write to the Free Software
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| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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| 19 | */
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| 20 |
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| 21 | /*
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| 22 | * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
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| 23 | * other than GPL or LGPL is available it will apply instead, Sun elects to use only
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| 24 | * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
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| 25 | * a choice of LGPL license versions is made available with the language indicating
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| 26 | * that LGPLv2 or any later version may be used, or where a choice of which version
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| 27 | * of the LGPL is applied is otherwise unspecified.
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| 28 | */
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| 29 | #if DATA_SIZE == 8
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| 30 | #define SUFFIX q
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| 31 | #define USUFFIX q
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| 32 | #define DATA_TYPE uint64_t
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| 33 | #elif DATA_SIZE == 4
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| 34 | #define SUFFIX l
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| 35 | #define USUFFIX l
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| 36 | #define DATA_TYPE uint32_t
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| 37 | #elif DATA_SIZE == 2
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| 38 | #define SUFFIX w
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| 39 | #define USUFFIX uw
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| 40 | #define DATA_TYPE uint16_t
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| 41 | #define DATA_STYPE int16_t
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| 42 | #elif DATA_SIZE == 1
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| 43 | #define SUFFIX b
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| 44 | #define USUFFIX ub
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| 45 | #define DATA_TYPE uint8_t
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| 46 | #define DATA_STYPE int8_t
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| 47 | #else
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| 48 | #error unsupported data size
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| 49 | #endif
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| 50 |
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| 51 | #if ACCESS_TYPE < (NB_MMU_MODES)
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| 52 |
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| 53 | #define CPU_MMU_INDEX ACCESS_TYPE
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| 54 | #define MMUSUFFIX _mmu
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| 55 |
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| 56 | #elif ACCESS_TYPE == (NB_MMU_MODES)
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| 57 |
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| 58 | #define CPU_MMU_INDEX (cpu_mmu_index(env))
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| 59 | #define MMUSUFFIX _mmu
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| 60 |
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| 61 | #elif ACCESS_TYPE == (NB_MMU_MODES + 1)
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| 62 |
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| 63 | #define CPU_MMU_INDEX (cpu_mmu_index(env))
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| 64 | #define MMUSUFFIX _cmmu
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| 65 |
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| 66 | #else
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| 67 | #error invalid ACCESS_TYPE
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| 68 | #endif
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| 69 |
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| 70 | #if DATA_SIZE == 8
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| 71 | #define RES_TYPE uint64_t
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| 72 | #else
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| 73 | #define RES_TYPE int
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| 74 | #endif
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| 75 |
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| 76 | #if ACCESS_TYPE == (NB_MMU_MODES + 1)
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| 77 | #define ADDR_READ addr_code
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| 78 | #else
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| 79 | #define ADDR_READ addr_read
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| 80 | #endif
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| 81 |
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| 82 | #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
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| 83 | (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU)
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| 84 |
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| 85 | #ifdef VBOX
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| 86 | /* generic store macro */
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| 87 |
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| 88 | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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| 89 | {
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| 90 | int index;
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| 91 | target_ulong addr;
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| 92 | unsigned long physaddr;
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| 93 | int is_user;
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| 94 |
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| 95 | addr = ptr;
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| 96 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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| 97 | is_user = CPU_MMU_INDEX;
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| 98 | if (__builtin_expect(env->tlb_table[is_user][index].addr_write !=
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| 99 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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| 100 | glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
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| 101 | } else {
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| 102 | physaddr = addr + env->tlb_table[is_user][index].addend;
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| 103 | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
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| 104 | }
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| 105 | }
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| 106 |
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| 107 | #else /* !VBOX */
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| 108 |
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| 109 | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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| 110 | {
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| 111 | asm volatile ("movl %0, %%edx\n"
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| 112 | "movl %0, %%eax\n"
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| 113 | "shrl %3, %%edx\n"
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| 114 | "andl %4, %%eax\n"
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| 115 | "andl %2, %%edx\n"
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| 116 | "leal %5(%%edx, %%ebp), %%edx\n"
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| 117 | "cmpl (%%edx), %%eax\n"
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| 118 | "movl %0, %%eax\n"
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| 119 | "je 1f\n"
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| 120 | #if DATA_SIZE == 1
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| 121 | "movzbl %b1, %%edx\n"
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| 122 | #elif DATA_SIZE == 2
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| 123 | "movzwl %w1, %%edx\n"
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| 124 | #elif DATA_SIZE == 4
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| 125 | "movl %1, %%edx\n"
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| 126 | #else
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| 127 | #error unsupported size
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| 128 | #endif
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| 129 | "pushl %6\n"
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| 130 | "call %7\n"
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| 131 | "popl %%eax\n"
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| 132 | "jmp 2f\n"
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| 133 | "1:\n"
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| 134 | "addl 8(%%edx), %%eax\n"
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| 135 | #if DATA_SIZE == 1
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| 136 | "movb %b1, (%%eax)\n"
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| 137 | #elif DATA_SIZE == 2
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| 138 | "movw %w1, (%%eax)\n"
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| 139 | #elif DATA_SIZE == 4
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| 140 | "movl %1, (%%eax)\n"
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| 141 | #else
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| 142 | #error unsupported size
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| 143 | #endif
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| 144 | "2:\n"
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| 145 | :
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| 146 | : "r" (ptr),
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| 147 | /* NOTE: 'q' would be needed as constraint, but we could not use it
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| 148 | with T1 ! */
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| 149 | "r" (v),
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| 150 | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
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| 151 | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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| 152 | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
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| 153 | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)),
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| 154 | "i" (CPU_MMU_INDEX),
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| 155 | "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
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| 156 | : "%eax", "%ecx", "%edx", "memory", "cc");
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| 157 | }
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| 158 | #endif /* !VBOX */
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| 159 |
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| 160 | #else
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| 161 |
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| 162 | /* generic load/store macros */
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| 163 |
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| 164 | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
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| 165 | {
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| 166 | int index;
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| 167 | RES_TYPE res;
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| 168 | target_ulong addr;
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| 169 | unsigned long physaddr;
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| 170 | int is_user;
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| 171 |
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| 172 | addr = ptr;
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| 173 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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| 174 | is_user = CPU_MMU_INDEX;
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| 175 | if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
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| 176 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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| 177 | res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
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| 178 | } else {
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| 179 | physaddr = addr + env->tlb_table[is_user][index].addend;
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| 180 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
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| 181 | }
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| 182 | return res;
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| 183 | }
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| 184 |
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| 185 | #if DATA_SIZE <= 2
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| 186 | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
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| 187 | {
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| 188 | int res, index;
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| 189 | target_ulong addr;
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| 190 | unsigned long physaddr;
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| 191 | int is_user;
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| 192 |
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| 193 | addr = ptr;
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| 194 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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| 195 | is_user = CPU_MMU_INDEX;
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| 196 | if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
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| 197 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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| 198 | res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
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| 199 | } else {
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| 200 | physaddr = addr + env->tlb_table[is_user][index].addend;
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| 201 | res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
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| 202 | }
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| 203 | return res;
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| 204 | }
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| 205 | #endif
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| 206 |
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| 207 | #if ACCESS_TYPE != (NB_MMU_MODES + 1)
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| 208 |
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| 209 | /* generic store macro */
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| 210 |
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| 211 | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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| 212 | {
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| 213 | int index;
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| 214 | target_ulong addr;
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| 215 | unsigned long physaddr;
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| 216 | int is_user;
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| 217 |
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| 218 | addr = ptr;
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| 219 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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| 220 | is_user = CPU_MMU_INDEX;
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| 221 | if (__builtin_expect(env->tlb_table[is_user][index].addr_write !=
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| 222 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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| 223 | glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
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| 224 | } else {
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| 225 | physaddr = addr + env->tlb_table[is_user][index].addend;
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| 226 | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
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| 227 | }
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| 228 | }
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| 229 |
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| 230 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
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| 231 |
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| 232 | #endif /* !asm */
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| 233 |
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| 234 | #if ACCESS_TYPE != (NB_MMU_MODES + 1)
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| 235 |
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| 236 | #if DATA_SIZE == 8
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| 237 | static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
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| 238 | {
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| 239 | union {
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| 240 | float64 d;
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| 241 | uint64_t i;
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| 242 | } u;
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| 243 | u.i = glue(ldq, MEMSUFFIX)(ptr);
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| 244 | return u.d;
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| 245 | }
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| 246 |
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| 247 | static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
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| 248 | {
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| 249 | union {
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| 250 | float64 d;
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| 251 | uint64_t i;
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| 252 | } u;
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| 253 | u.d = v;
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| 254 | glue(stq, MEMSUFFIX)(ptr, u.i);
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| 255 | }
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| 256 | #endif /* DATA_SIZE == 8 */
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| 257 |
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| 258 | #if DATA_SIZE == 4
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| 259 | static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
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| 260 | {
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| 261 | union {
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| 262 | float32 f;
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| 263 | uint32_t i;
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| 264 | } u;
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| 265 | u.i = glue(ldl, MEMSUFFIX)(ptr);
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| 266 | return u.f;
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| 267 | }
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| 268 |
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| 269 | static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
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| 270 | {
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| 271 | union {
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| 272 | float32 f;
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| 273 | uint32_t i;
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| 274 | } u;
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| 275 | u.f = v;
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| 276 | glue(stl, MEMSUFFIX)(ptr, u.i);
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| 277 | }
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| 278 | #endif /* DATA_SIZE == 4 */
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| 279 |
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| 280 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
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| 281 |
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| 282 | #undef RES_TYPE
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| 283 | #undef DATA_TYPE
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| 284 | #undef DATA_STYPE
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| 285 | #undef SUFFIX
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| 286 | #undef USUFFIX
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| 287 | #undef DATA_SIZE
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| 288 | #undef CPU_MMU_INDEX
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| 289 | #undef MMUSUFFIX
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| 290 | #undef ADDR_READ
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