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source: vbox/trunk/src/recompiler_new/target-i386/exec.h@ 13440

最後變更 在這個檔案從13440是 13440,由 vboxsync 提交於 16 年 前

further MSVC stuff, almost there
  • 屬性 svn:eol-style 設為 native
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1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23 * other than GPL or LGPL is available it will apply instead, Sun elects to use only
24 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25 * a choice of LGPL license versions is made available with the language indicating
26 * that LGPLv2 or any later version may be used, or where a choice of which version
27 * of the LGPL is applied is otherwise unspecified.
28 */
29#include "config.h"
30#include "dyngen-exec.h"
31
32/* XXX: factorize this mess */
33#ifdef TARGET_X86_64
34#define TARGET_LONG_BITS 64
35#else
36#define TARGET_LONG_BITS 32
37#endif
38
39#include "cpu-defs.h"
40
41#ifndef VBOX
42/* at least 4 register variables are defined */
43register struct CPUX86State *env asm(AREG0);
44#else
45REGISTER_BOUND_GLOBAL(struct CPUX86State*, env, AREG0);
46#endif /* VBOX */
47
48#include "qemu-log.h"
49
50#ifndef reg_EAX
51#define EAX (env->regs[R_EAX])
52#endif
53#ifndef reg_ECX
54#define ECX (env->regs[R_ECX])
55#endif
56#ifndef reg_EDX
57#define EDX (env->regs[R_EDX])
58#endif
59#ifndef reg_EBX
60#define EBX (env->regs[R_EBX])
61#endif
62#ifndef reg_ESP
63#define ESP (env->regs[R_ESP])
64#endif
65#ifndef reg_EBP
66#define EBP (env->regs[R_EBP])
67#endif
68#ifndef reg_ESI
69#define ESI (env->regs[R_ESI])
70#endif
71#ifndef reg_EDI
72#define EDI (env->regs[R_EDI])
73#endif
74#define EIP (env->eip)
75#define DF (env->df)
76
77#define CC_SRC (env->cc_src)
78#define CC_DST (env->cc_dst)
79#define CC_OP (env->cc_op)
80
81/* float macros */
82#define FT0 (env->ft0)
83#define ST0 (env->fpregs[env->fpstt].d)
84#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
85#define ST1 ST(1)
86
87#include "cpu.h"
88#include "exec-all.h"
89
90void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
91void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
92int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
93 int is_write, int mmu_idx, int is_softmmu);
94void __hidden cpu_lock(void);
95void __hidden cpu_unlock(void);
96void do_interrupt(int intno, int is_int, int error_code,
97 target_ulong next_eip, int is_hw);
98void do_interrupt_user(int intno, int is_int, int error_code,
99 target_ulong next_eip);
100void raise_interrupt(int intno, int is_int, int error_code,
101 int next_eip_addend);
102void raise_exception_err(int exception_index, int error_code);
103void raise_exception(int exception_index);
104void do_smm_enter(void);
105void __hidden cpu_loop_exit(void);
106
107void OPPROTO op_movl_eflags_T0(void);
108void OPPROTO op_movl_T0_eflags(void);
109#ifdef VBOX
110void OPPROTO op_movl_T0_eflags_vme(void);
111void OPPROTO op_movw_eflags_T0_vme(void);
112void OPPROTO op_cli_vme(void);
113void OPPROTO op_sti_vme(void);
114#endif
115
116/* n must be a constant to be efficient */
117#ifndef VBOX
118static inline target_long lshift(target_long x, int n)
119#else
120DECLINLINE(target_long) lshift(target_long x, int n)
121#endif
122{
123 if (n >= 0)
124 return x << n;
125 else
126 return x >> (-n);
127}
128
129#include "helper.h"
130
131#ifndef VBOX
132static inline void svm_check_intercept(uint32_t type)
133#else
134DECLINLINE(void) svm_check_intercept(uint32_t type)
135#endif
136{
137 helper_svm_check_intercept_param(type, 0);
138}
139
140void check_iob_T0(void);
141void check_iow_T0(void);
142void check_iol_T0(void);
143void check_iob_DX(void);
144void check_iow_DX(void);
145void check_iol_DX(void);
146
147#if !defined(CONFIG_USER_ONLY)
148
149#include "softmmu_exec.h"
150
151#ifndef VBOX
152static inline double ldfq(target_ulong ptr)
153#else
154DECLINLINE(double) ldfq(target_ulong ptr)
155#endif
156{
157 union {
158 double d;
159 uint64_t i;
160 } u;
161 u.i = ldq(ptr);
162 return u.d;
163}
164
165#ifndef VBOX
166static inline void stfq(target_ulong ptr, double v)
167#else
168DECLINLINE(void) stfq(target_ulong ptr, double v)
169#endif
170{
171 union {
172 double d;
173 uint64_t i;
174 } u;
175 u.d = v;
176 stq(ptr, u.i);
177}
178
179#ifndef VBOX
180static inline float ldfl(target_ulong ptr)
181#else
182DECLINLINE(float) ldfl(target_ulong ptr)
183#endif
184{
185 union {
186 float f;
187 uint32_t i;
188 } u;
189 u.i = ldl(ptr);
190 return u.f;
191}
192
193#ifndef VBOX
194static inline void stfl(target_ulong ptr, float v)
195#else
196DECLINLINE(void) stfl(target_ulong ptr, float v)
197#endif
198{
199 union {
200 float f;
201 uint32_t i;
202 } u;
203 u.f = v;
204 stl(ptr, u.i);
205}
206
207#endif /* !defined(CONFIG_USER_ONLY) */
208
209#ifdef USE_X86LDOUBLE
210/* use long double functions */
211#define floatx_to_int32 floatx80_to_int32
212#define floatx_to_int64 floatx80_to_int64
213#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
214#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
215#define int32_to_floatx int32_to_floatx80
216#define int64_to_floatx int64_to_floatx80
217#define float32_to_floatx float32_to_floatx80
218#define float64_to_floatx float64_to_floatx80
219#define floatx_to_float32 floatx80_to_float32
220#define floatx_to_float64 floatx80_to_float64
221#define floatx_abs floatx80_abs
222#define floatx_chs floatx80_chs
223#define floatx_round_to_int floatx80_round_to_int
224#define floatx_compare floatx80_compare
225#define floatx_compare_quiet floatx80_compare_quiet
226#ifdef VBOX
227#undef sin
228#undef cos
229#undef sqrt
230#undef pow
231#undef log
232#undef tan
233#undef atan2
234#undef floor
235#undef ceil
236#undef ldexp
237#endif /* !VBOX */
238#if !defined(VBOX) || !defined(_MSC_VER)
239#define sin sinl
240#define cos cosl
241#define sqrt sqrtl
242#define pow powl
243#define log logl
244#define tan tanl
245#define atan2 atan2l
246#define floor floorl
247#define ceil ceill
248#define ldexp ldexpl
249#endif
250#else
251#define floatx_to_int32 float64_to_int32
252#define floatx_to_int64 float64_to_int64
253#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
254#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
255#define int32_to_floatx int32_to_float64
256#define int64_to_floatx int64_to_float64
257#define float32_to_floatx float32_to_float64
258#define float64_to_floatx(x, e) (x)
259#define floatx_to_float32 float64_to_float32
260#define floatx_to_float64(x, e) (x)
261#define floatx_abs float64_abs
262#define floatx_chs float64_chs
263#define floatx_round_to_int float64_round_to_int
264#define floatx_compare float64_compare
265#define floatx_compare_quiet float64_compare_quiet
266#endif
267
268#ifdef VBOX
269#ifndef _MSC_VER
270extern CPU86_LDouble sin(CPU86_LDouble x);
271extern CPU86_LDouble cos(CPU86_LDouble x);
272extern CPU86_LDouble sqrt(CPU86_LDouble x);
273extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
274extern CPU86_LDouble log(CPU86_LDouble x);
275extern CPU86_LDouble tan(CPU86_LDouble x);
276extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
277extern CPU86_LDouble floor(CPU86_LDouble x);
278extern CPU86_LDouble ceil(CPU86_LDouble x);
279#endif /* !_MSC_VER */
280#endif /* VBOX */
281
282#define RC_MASK 0xc00
283#ifndef RC_NEAR
284#define RC_NEAR 0x000
285#endif
286#ifndef RC_DOWN
287#define RC_DOWN 0x400
288#endif
289#ifndef RC_UP
290#define RC_UP 0x800
291#endif
292#ifndef RC_CHOP
293#define RC_CHOP 0xc00
294#endif
295
296#define MAXTAN 9223372036854775808.0
297
298#ifdef USE_X86LDOUBLE
299
300/* only for x86 */
301typedef union {
302 long double d;
303 struct {
304 unsigned long long lower;
305 unsigned short upper;
306 } l;
307} CPU86_LDoubleU;
308
309/* the following deal with x86 long double-precision numbers */
310#define MAXEXPD 0x7fff
311#define EXPBIAS 16383
312#define EXPD(fp) (fp.l.upper & 0x7fff)
313#define SIGND(fp) ((fp.l.upper) & 0x8000)
314#define MANTD(fp) (fp.l.lower)
315#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
316
317#else
318
319/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
320typedef union {
321 double d;
322#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
323 struct {
324 uint32_t lower;
325 int32_t upper;
326 } l;
327#else
328 struct {
329 int32_t upper;
330 uint32_t lower;
331 } l;
332#endif
333#ifndef __arm__
334 int64_t ll;
335#endif
336} CPU86_LDoubleU;
337
338/* the following deal with IEEE double-precision numbers */
339#define MAXEXPD 0x7ff
340#define EXPBIAS 1023
341#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
342#define SIGND(fp) ((fp.l.upper) & 0x80000000)
343#ifdef __arm__
344#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
345#else
346#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
347#endif
348#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
349#endif
350
351#ifndef VBOX
352static inline void fpush(void)
353#else
354DECLINLINE(void) fpush(void)
355#endif
356{
357 env->fpstt = (env->fpstt - 1) & 7;
358 env->fptags[env->fpstt] = 0; /* validate stack entry */
359}
360
361#ifndef VBOX
362static inline void fpop(void)
363#else
364DECLINLINE(void) fpop(void)
365#endif
366{
367 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
368 env->fpstt = (env->fpstt + 1) & 7;
369}
370
371#ifndef USE_X86LDOUBLE
372static inline CPU86_LDouble helper_fldt(target_ulong ptr)
373{
374 CPU86_LDoubleU temp;
375 int upper, e;
376 uint64_t ll;
377
378 /* mantissa */
379 upper = lduw(ptr + 8);
380 /* XXX: handle overflow ? */
381 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
382 e |= (upper >> 4) & 0x800; /* sign */
383 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
384#ifdef __arm__
385 temp.l.upper = (e << 20) | (ll >> 32);
386 temp.l.lower = ll;
387#else
388 temp.ll = ll | ((uint64_t)e << 52);
389#endif
390 return temp.d;
391}
392
393static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
394{
395 CPU86_LDoubleU temp;
396 int e;
397
398 temp.d = f;
399 /* mantissa */
400 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
401 /* exponent + sign */
402 e = EXPD(temp) - EXPBIAS + 16383;
403 e |= SIGND(temp) >> 16;
404 stw(ptr + 8, e);
405}
406#else
407
408/* XXX: same endianness assumed */
409
410#ifdef CONFIG_USER_ONLY
411
412static inline CPU86_LDouble helper_fldt(target_ulong ptr)
413{
414 return *(CPU86_LDouble *)ptr;
415}
416
417static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
418{
419 *(CPU86_LDouble *)ptr = f;
420}
421
422#else
423
424/* we use memory access macros */
425
426#ifndef VBOX
427static inline CPU86_LDouble helper_fldt(target_ulong ptr)
428#else
429DECLINLINE(CPU86_LDouble) helper_fldt(target_ulong ptr)
430#endif
431{
432 CPU86_LDoubleU temp;
433
434 temp.l.lower = ldq(ptr);
435 temp.l.upper = lduw(ptr + 8);
436 return temp.d;
437}
438
439#ifndef VBOX
440static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
441#else
442DECLINLINE(void) helper_fstt(CPU86_LDouble f, target_ulong ptr)
443#endif
444{
445 CPU86_LDoubleU temp;
446
447 temp.d = f;
448 stq(ptr, temp.l.lower);
449 stw(ptr + 8, temp.l.upper);
450}
451
452#endif /* !CONFIG_USER_ONLY */
453
454#endif /* USE_X86LDOUBLE */
455
456#define FPUS_IE (1 << 0)
457#define FPUS_DE (1 << 1)
458#define FPUS_ZE (1 << 2)
459#define FPUS_OE (1 << 3)
460#define FPUS_UE (1 << 4)
461#define FPUS_PE (1 << 5)
462#define FPUS_SF (1 << 6)
463#define FPUS_SE (1 << 7)
464#define FPUS_B (1 << 15)
465
466#define FPUC_EM 0x3f
467
468extern const CPU86_LDouble f15rk[7];
469
470void fpu_raise_exception(void);
471void restore_native_fp_state(CPUState *env);
472void save_native_fp_state(CPUState *env);
473
474extern const uint8_t parity_table[256];
475extern const uint8_t rclw_table[32];
476extern const uint8_t rclb_table[32];
477
478#ifndef VBOX
479static inline uint32_t compute_eflags(void)
480#else
481DECLINLINE(uint32_t) compute_eflags(void)
482#endif
483{
484 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
485}
486
487/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
488#ifndef VBOX
489static inline void load_eflags(int eflags, int update_mask)
490#else
491DECLINLINE(void) load_eflags(int eflags, int update_mask)
492#endif
493{
494 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
495 DF = 1 - (2 * ((eflags >> 10) & 1));
496 env->eflags = (env->eflags & ~update_mask) |
497 (eflags & update_mask);
498}
499
500#ifndef VBOX
501static inline void env_to_regs(void)
502#else
503DECLINLINE(void) env_to_regs(void)
504#endif
505{
506#ifdef reg_EAX
507 EAX = env->regs[R_EAX];
508#endif
509#ifdef reg_ECX
510 ECX = env->regs[R_ECX];
511#endif
512#ifdef reg_EDX
513 EDX = env->regs[R_EDX];
514#endif
515#ifdef reg_EBX
516 EBX = env->regs[R_EBX];
517#endif
518#ifdef reg_ESP
519 ESP = env->regs[R_ESP];
520#endif
521#ifdef reg_EBP
522 EBP = env->regs[R_EBP];
523#endif
524#ifdef reg_ESI
525 ESI = env->regs[R_ESI];
526#endif
527#ifdef reg_EDI
528 EDI = env->regs[R_EDI];
529#endif
530}
531
532#ifndef VBOX
533static inline void regs_to_env(void)
534#else
535DECLINLINE(void) regs_to_env(void)
536#endif
537{
538#ifdef reg_EAX
539 env->regs[R_EAX] = EAX;
540#endif
541#ifdef reg_ECX
542 env->regs[R_ECX] = ECX;
543#endif
544#ifdef reg_EDX
545 env->regs[R_EDX] = EDX;
546#endif
547#ifdef reg_EBX
548 env->regs[R_EBX] = EBX;
549#endif
550#ifdef reg_ESP
551 env->regs[R_ESP] = ESP;
552#endif
553#ifdef reg_EBP
554 env->regs[R_EBP] = EBP;
555#endif
556#ifdef reg_ESI
557 env->regs[R_ESI] = ESI;
558#endif
559#ifdef reg_EDI
560 env->regs[R_EDI] = EDI;
561#endif
562}
563
564#ifndef VBOX
565static inline int cpu_halted(CPUState *env) {
566#else
567DECLINLINE(int) cpu_halted(CPUState *env) {
568#endif
569 /* handle exit of HALTED state */
570 if (!env->halted)
571 return 0;
572 /* disable halt condition */
573 if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
574 (env->eflags & IF_MASK)) ||
575 (env->interrupt_request & CPU_INTERRUPT_NMI)) {
576 env->halted = 0;
577 return 0;
578 }
579 return EXCP_HALTED;
580}
581
582/* load efer and update the corresponding hflags. XXX: do consistency
583 checks with cpuid bits ? */
584#ifndef VBOX
585static inline void cpu_load_efer(CPUState *env, uint64_t val)
586#else
587DECLINLINE(void) cpu_load_efer(CPUState *env, uint64_t val)
588#endif
589{
590 env->efer = val;
591 env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
592 if (env->efer & MSR_EFER_LMA)
593 env->hflags |= HF_LMA_MASK;
594 if (env->efer & MSR_EFER_SVME)
595 env->hflags |= HF_SVME_MASK;
596}
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