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source: vbox/trunk/src/recompiler_new/target-i386/exec.h@ 13480

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1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23 * other than GPL or LGPL is available it will apply instead, Sun elects to use only
24 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25 * a choice of LGPL license versions is made available with the language indicating
26 * that LGPLv2 or any later version may be used, or where a choice of which version
27 * of the LGPL is applied is otherwise unspecified.
28 */
29#include "config.h"
30#include "dyngen-exec.h"
31
32/* XXX: factorize this mess */
33#ifdef TARGET_X86_64
34#define TARGET_LONG_BITS 64
35#else
36#define TARGET_LONG_BITS 32
37#endif
38
39#include "cpu-defs.h"
40
41#ifndef VBOX
42/* at least 4 register variables are defined */
43register struct CPUX86State *env asm(AREG0);
44#else
45REGISTER_BOUND_GLOBAL(struct CPUX86State*, env, AREG0);
46#endif /* VBOX */
47
48#include "qemu-log.h"
49
50#ifdef VBOX
51void cpu_exec_init_all(unsigned long tb_size);
52#endif
53
54#ifndef reg_EAX
55#define EAX (env->regs[R_EAX])
56#endif
57#ifndef reg_ECX
58#define ECX (env->regs[R_ECX])
59#endif
60#ifndef reg_EDX
61#define EDX (env->regs[R_EDX])
62#endif
63#ifndef reg_EBX
64#define EBX (env->regs[R_EBX])
65#endif
66#ifndef reg_ESP
67#define ESP (env->regs[R_ESP])
68#endif
69#ifndef reg_EBP
70#define EBP (env->regs[R_EBP])
71#endif
72#ifndef reg_ESI
73#define ESI (env->regs[R_ESI])
74#endif
75#ifndef reg_EDI
76#define EDI (env->regs[R_EDI])
77#endif
78#define EIP (env->eip)
79#define DF (env->df)
80
81#define CC_SRC (env->cc_src)
82#define CC_DST (env->cc_dst)
83#define CC_OP (env->cc_op)
84
85/* float macros */
86#define FT0 (env->ft0)
87#define ST0 (env->fpregs[env->fpstt].d)
88#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
89#define ST1 ST(1)
90
91#include "cpu.h"
92#include "exec-all.h"
93
94void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
95void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
96int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
97 int is_write, int mmu_idx, int is_softmmu);
98void __hidden cpu_lock(void);
99void __hidden cpu_unlock(void);
100void do_interrupt(int intno, int is_int, int error_code,
101 target_ulong next_eip, int is_hw);
102void do_interrupt_user(int intno, int is_int, int error_code,
103 target_ulong next_eip);
104void raise_interrupt(int intno, int is_int, int error_code,
105 int next_eip_addend);
106void raise_exception_err(int exception_index, int error_code);
107void raise_exception(int exception_index);
108void do_smm_enter(void);
109void __hidden cpu_loop_exit(void);
110
111void OPPROTO op_movl_eflags_T0(void);
112void OPPROTO op_movl_T0_eflags(void);
113#ifdef VBOX
114void OPPROTO op_movl_T0_eflags_vme(void);
115void OPPROTO op_movw_eflags_T0_vme(void);
116void OPPROTO op_cli_vme(void);
117void OPPROTO op_sti_vme(void);
118#endif
119
120/* n must be a constant to be efficient */
121#ifndef VBOX
122static inline target_long lshift(target_long x, int n)
123#else
124DECLINLINE(target_long) lshift(target_long x, int n)
125#endif
126{
127 if (n >= 0)
128 return x << n;
129 else
130 return x >> (-n);
131}
132
133#include "helper.h"
134
135#ifndef VBOX
136static inline void svm_check_intercept(uint32_t type)
137#else
138DECLINLINE(void) svm_check_intercept(uint32_t type)
139#endif
140{
141 helper_svm_check_intercept_param(type, 0);
142}
143
144void check_iob_T0(void);
145void check_iow_T0(void);
146void check_iol_T0(void);
147void check_iob_DX(void);
148void check_iow_DX(void);
149void check_iol_DX(void);
150
151#if !defined(CONFIG_USER_ONLY)
152
153#include "softmmu_exec.h"
154
155#ifndef VBOX
156static inline double ldfq(target_ulong ptr)
157#else
158DECLINLINE(double) ldfq(target_ulong ptr)
159#endif
160{
161 union {
162 double d;
163 uint64_t i;
164 } u;
165 u.i = ldq(ptr);
166 return u.d;
167}
168
169#ifndef VBOX
170static inline void stfq(target_ulong ptr, double v)
171#else
172DECLINLINE(void) stfq(target_ulong ptr, double v)
173#endif
174{
175 union {
176 double d;
177 uint64_t i;
178 } u;
179 u.d = v;
180 stq(ptr, u.i);
181}
182
183#ifndef VBOX
184static inline float ldfl(target_ulong ptr)
185#else
186DECLINLINE(float) ldfl(target_ulong ptr)
187#endif
188{
189 union {
190 float f;
191 uint32_t i;
192 } u;
193 u.i = ldl(ptr);
194 return u.f;
195}
196
197#ifndef VBOX
198static inline void stfl(target_ulong ptr, float v)
199#else
200DECLINLINE(void) stfl(target_ulong ptr, float v)
201#endif
202{
203 union {
204 float f;
205 uint32_t i;
206 } u;
207 u.f = v;
208 stl(ptr, u.i);
209}
210
211#endif /* !defined(CONFIG_USER_ONLY) */
212
213#ifdef USE_X86LDOUBLE
214/* use long double functions */
215#define floatx_to_int32 floatx80_to_int32
216#define floatx_to_int64 floatx80_to_int64
217#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
218#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
219#define int32_to_floatx int32_to_floatx80
220#define int64_to_floatx int64_to_floatx80
221#define float32_to_floatx float32_to_floatx80
222#define float64_to_floatx float64_to_floatx80
223#define floatx_to_float32 floatx80_to_float32
224#define floatx_to_float64 floatx80_to_float64
225#define floatx_abs floatx80_abs
226#define floatx_chs floatx80_chs
227#define floatx_round_to_int floatx80_round_to_int
228#define floatx_compare floatx80_compare
229#define floatx_compare_quiet floatx80_compare_quiet
230#ifdef VBOX
231#undef sin
232#undef cos
233#undef sqrt
234#undef pow
235#undef log
236#undef tan
237#undef atan2
238#undef floor
239#undef ceil
240#undef ldexp
241#endif /* !VBOX */
242#if !defined(VBOX) || !defined(_MSC_VER)
243#define sin sinl
244#define cos cosl
245#define sqrt sqrtl
246#define pow powl
247#define log logl
248#define tan tanl
249#define atan2 atan2l
250#define floor floorl
251#define ceil ceill
252#define ldexp ldexpl
253#endif
254#else
255#define floatx_to_int32 float64_to_int32
256#define floatx_to_int64 float64_to_int64
257#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
258#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
259#define int32_to_floatx int32_to_float64
260#define int64_to_floatx int64_to_float64
261#define float32_to_floatx float32_to_float64
262#define float64_to_floatx(x, e) (x)
263#define floatx_to_float32 float64_to_float32
264#define floatx_to_float64(x, e) (x)
265#define floatx_abs float64_abs
266#define floatx_chs float64_chs
267#define floatx_round_to_int float64_round_to_int
268#define floatx_compare float64_compare
269#define floatx_compare_quiet float64_compare_quiet
270#endif
271
272#ifdef VBOX
273#ifndef _MSC_VER
274extern CPU86_LDouble sin(CPU86_LDouble x);
275extern CPU86_LDouble cos(CPU86_LDouble x);
276extern CPU86_LDouble sqrt(CPU86_LDouble x);
277extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
278extern CPU86_LDouble log(CPU86_LDouble x);
279extern CPU86_LDouble tan(CPU86_LDouble x);
280extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
281extern CPU86_LDouble floor(CPU86_LDouble x);
282extern CPU86_LDouble ceil(CPU86_LDouble x);
283#endif /* !_MSC_VER */
284#endif /* VBOX */
285
286#define RC_MASK 0xc00
287#ifndef RC_NEAR
288#define RC_NEAR 0x000
289#endif
290#ifndef RC_DOWN
291#define RC_DOWN 0x400
292#endif
293#ifndef RC_UP
294#define RC_UP 0x800
295#endif
296#ifndef RC_CHOP
297#define RC_CHOP 0xc00
298#endif
299
300#define MAXTAN 9223372036854775808.0
301
302#ifdef USE_X86LDOUBLE
303
304/* only for x86 */
305typedef union {
306 long double d;
307 struct {
308 unsigned long long lower;
309 unsigned short upper;
310 } l;
311} CPU86_LDoubleU;
312
313/* the following deal with x86 long double-precision numbers */
314#define MAXEXPD 0x7fff
315#define EXPBIAS 16383
316#define EXPD(fp) (fp.l.upper & 0x7fff)
317#define SIGND(fp) ((fp.l.upper) & 0x8000)
318#define MANTD(fp) (fp.l.lower)
319#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
320
321#else
322
323/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
324typedef union {
325 double d;
326#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
327 struct {
328 uint32_t lower;
329 int32_t upper;
330 } l;
331#else
332 struct {
333 int32_t upper;
334 uint32_t lower;
335 } l;
336#endif
337#ifndef __arm__
338 int64_t ll;
339#endif
340} CPU86_LDoubleU;
341
342/* the following deal with IEEE double-precision numbers */
343#define MAXEXPD 0x7ff
344#define EXPBIAS 1023
345#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
346#define SIGND(fp) ((fp.l.upper) & 0x80000000)
347#ifdef __arm__
348#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
349#else
350#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
351#endif
352#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
353#endif
354
355#ifndef VBOX
356static inline void fpush(void)
357#else
358DECLINLINE(void) fpush(void)
359#endif
360{
361 env->fpstt = (env->fpstt - 1) & 7;
362 env->fptags[env->fpstt] = 0; /* validate stack entry */
363}
364
365#ifndef VBOX
366static inline void fpop(void)
367#else
368DECLINLINE(void) fpop(void)
369#endif
370{
371 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
372 env->fpstt = (env->fpstt + 1) & 7;
373}
374
375#ifndef USE_X86LDOUBLE
376static inline CPU86_LDouble helper_fldt(target_ulong ptr)
377{
378 CPU86_LDoubleU temp;
379 int upper, e;
380 uint64_t ll;
381
382 /* mantissa */
383 upper = lduw(ptr + 8);
384 /* XXX: handle overflow ? */
385 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
386 e |= (upper >> 4) & 0x800; /* sign */
387 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
388#ifdef __arm__
389 temp.l.upper = (e << 20) | (ll >> 32);
390 temp.l.lower = ll;
391#else
392 temp.ll = ll | ((uint64_t)e << 52);
393#endif
394 return temp.d;
395}
396
397static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
398{
399 CPU86_LDoubleU temp;
400 int e;
401
402 temp.d = f;
403 /* mantissa */
404 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
405 /* exponent + sign */
406 e = EXPD(temp) - EXPBIAS + 16383;
407 e |= SIGND(temp) >> 16;
408 stw(ptr + 8, e);
409}
410#else
411
412/* XXX: same endianness assumed */
413
414#ifdef CONFIG_USER_ONLY
415
416static inline CPU86_LDouble helper_fldt(target_ulong ptr)
417{
418 return *(CPU86_LDouble *)ptr;
419}
420
421static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
422{
423 *(CPU86_LDouble *)ptr = f;
424}
425
426#else
427
428/* we use memory access macros */
429
430#ifndef VBOX
431static inline CPU86_LDouble helper_fldt(target_ulong ptr)
432#else
433DECLINLINE(CPU86_LDouble) helper_fldt(target_ulong ptr)
434#endif
435{
436 CPU86_LDoubleU temp;
437
438 temp.l.lower = ldq(ptr);
439 temp.l.upper = lduw(ptr + 8);
440 return temp.d;
441}
442
443#ifndef VBOX
444static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
445#else
446DECLINLINE(void) helper_fstt(CPU86_LDouble f, target_ulong ptr)
447#endif
448{
449 CPU86_LDoubleU temp;
450
451 temp.d = f;
452 stq(ptr, temp.l.lower);
453 stw(ptr + 8, temp.l.upper);
454}
455
456#endif /* !CONFIG_USER_ONLY */
457
458#endif /* USE_X86LDOUBLE */
459
460#define FPUS_IE (1 << 0)
461#define FPUS_DE (1 << 1)
462#define FPUS_ZE (1 << 2)
463#define FPUS_OE (1 << 3)
464#define FPUS_UE (1 << 4)
465#define FPUS_PE (1 << 5)
466#define FPUS_SF (1 << 6)
467#define FPUS_SE (1 << 7)
468#define FPUS_B (1 << 15)
469
470#define FPUC_EM 0x3f
471
472extern const CPU86_LDouble f15rk[7];
473
474void fpu_raise_exception(void);
475void restore_native_fp_state(CPUState *env);
476void save_native_fp_state(CPUState *env);
477
478extern const uint8_t parity_table[256];
479extern const uint8_t rclw_table[32];
480extern const uint8_t rclb_table[32];
481
482#ifndef VBOX
483static inline uint32_t compute_eflags(void)
484#else
485DECLINLINE(uint32_t) compute_eflags(void)
486#endif
487{
488 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
489}
490
491/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
492#ifndef VBOX
493static inline void load_eflags(int eflags, int update_mask)
494#else
495DECLINLINE(void) load_eflags(int eflags, int update_mask)
496#endif
497{
498 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
499 DF = 1 - (2 * ((eflags >> 10) & 1));
500 env->eflags = (env->eflags & ~update_mask) |
501 (eflags & update_mask);
502}
503
504#ifndef VBOX
505static inline void env_to_regs(void)
506#else
507DECLINLINE(void) env_to_regs(void)
508#endif
509{
510#ifdef reg_EAX
511 EAX = env->regs[R_EAX];
512#endif
513#ifdef reg_ECX
514 ECX = env->regs[R_ECX];
515#endif
516#ifdef reg_EDX
517 EDX = env->regs[R_EDX];
518#endif
519#ifdef reg_EBX
520 EBX = env->regs[R_EBX];
521#endif
522#ifdef reg_ESP
523 ESP = env->regs[R_ESP];
524#endif
525#ifdef reg_EBP
526 EBP = env->regs[R_EBP];
527#endif
528#ifdef reg_ESI
529 ESI = env->regs[R_ESI];
530#endif
531#ifdef reg_EDI
532 EDI = env->regs[R_EDI];
533#endif
534}
535
536#ifndef VBOX
537static inline void regs_to_env(void)
538#else
539DECLINLINE(void) regs_to_env(void)
540#endif
541{
542#ifdef reg_EAX
543 env->regs[R_EAX] = EAX;
544#endif
545#ifdef reg_ECX
546 env->regs[R_ECX] = ECX;
547#endif
548#ifdef reg_EDX
549 env->regs[R_EDX] = EDX;
550#endif
551#ifdef reg_EBX
552 env->regs[R_EBX] = EBX;
553#endif
554#ifdef reg_ESP
555 env->regs[R_ESP] = ESP;
556#endif
557#ifdef reg_EBP
558 env->regs[R_EBP] = EBP;
559#endif
560#ifdef reg_ESI
561 env->regs[R_ESI] = ESI;
562#endif
563#ifdef reg_EDI
564 env->regs[R_EDI] = EDI;
565#endif
566}
567
568#ifndef VBOX
569static inline int cpu_halted(CPUState *env) {
570#else
571DECLINLINE(int) cpu_halted(CPUState *env) {
572#endif
573 /* handle exit of HALTED state */
574 if (!env->halted)
575 return 0;
576 /* disable halt condition */
577 if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
578 (env->eflags & IF_MASK)) ||
579 (env->interrupt_request & CPU_INTERRUPT_NMI)) {
580 env->halted = 0;
581 return 0;
582 }
583 return EXCP_HALTED;
584}
585
586/* load efer and update the corresponding hflags. XXX: do consistency
587 checks with cpuid bits ? */
588#ifndef VBOX
589static inline void cpu_load_efer(CPUState *env, uint64_t val)
590#else
591DECLINLINE(void) cpu_load_efer(CPUState *env, uint64_t val)
592#endif
593{
594 env->efer = val;
595 env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
596 if (env->efer & MSR_EFER_LMA)
597 env->hflags |= HF_LMA_MASK;
598 if (env->efer & MSR_EFER_SVME)
599 env->hflags |= HF_SVME_MASK;
600}
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