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source: vbox/trunk/src/recompiler_new/tcg/x86_64/tcg-target.h@ 15272

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1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24/*
25 * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
26 * other than GPL or LGPL is available it will apply instead, Sun elects to use only
27 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
28 * a choice of LGPL license versions is made available with the language indicating
29 * that LGPLv2 or any later version may be used, or where a choice of which version
30 * of the LGPL is applied is otherwise unspecified.
31 */
32#define TCG_TARGET_X86_64 1
33
34#define TCG_TARGET_REG_BITS 64
35//#define TCG_TARGET_WORDS_BIGENDIAN
36
37#define TCG_TARGET_NB_REGS 16
38
39enum {
40 TCG_REG_RAX = 0,
41 TCG_REG_RCX,
42 TCG_REG_RDX,
43 TCG_REG_RBX,
44 TCG_REG_RSP,
45 TCG_REG_RBP,
46 TCG_REG_RSI,
47 TCG_REG_RDI,
48 TCG_REG_R8,
49 TCG_REG_R9,
50 TCG_REG_R10,
51 TCG_REG_R11,
52 TCG_REG_R12,
53 TCG_REG_R13,
54 TCG_REG_R14,
55 TCG_REG_R15,
56};
57
58#define TCG_CT_CONST_S32 0x100
59#define TCG_CT_CONST_U32 0x200
60
61/* used for function call generation */
62#define TCG_REG_CALL_STACK TCG_REG_RSP
63#define TCG_TARGET_STACK_ALIGN 16
64#define TCG_TARGET_CALL_STACK_OFFSET 0
65
66/* optional instructions */
67#define TCG_TARGET_HAS_bswap_i32
68#define TCG_TARGET_HAS_bswap_i64
69#define TCG_TARGET_HAS_neg_i32
70#define TCG_TARGET_HAS_neg_i64
71#define TCG_TARGET_HAS_ext8s_i32
72#define TCG_TARGET_HAS_ext16s_i32
73#define TCG_TARGET_HAS_ext8s_i64
74#define TCG_TARGET_HAS_ext16s_i64
75#define TCG_TARGET_HAS_ext32s_i64
76
77/* Must be in sync with dyngen register notion, see dyngen-exec.h */
78#define TCG_AREG0 TCG_REG_R14
79#define TCG_AREG1 TCG_REG_R15
80#define TCG_AREG2 TCG_REG_R12
81#define TCG_AREG3 TCG_REG_R13
82
83static inline void flush_icache_range(unsigned long start, unsigned long stop)
84{
85}
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