vbox的更動 11163 路徑 trunk/src/VBox/Devices/Graphics
- 時間撮記:
- 2008-8-6 上午12:13:32 (16 年 以前)
- 位置:
- trunk/src/VBox/Devices/Graphics
- 檔案:
-
- 修改 2 筆資料
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trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r10278 r11163 66 66 67 67 /** Converts a vga adaptor state pointer to a device instance pointer. */ 68 #define VGASTATE2DEVINS(pVgaState) ((pVgaState)->CTX SUFF(pDevIns))68 #define VGASTATE2DEVINS(pVgaState) ((pVgaState)->CTX_SUFF(pDevIns)) 69 69 70 70 /** Use VBE bytewise I/O */ … … 937 937 s->vbe_regs[VBE_DISPI_INDEX_YRES] * s->vbe_line_offset); 938 938 #else /* VBOX */ 939 memset( CTXSUFF(s->vram_ptr), 0,939 memset(s->CTX_SUFF(vram_ptr), 0, 940 940 s->vbe_regs[VBE_DISPI_INDEX_YRES] * s->vbe_line_offset); 941 941 #endif /* VBOX */ … … 1047 1047 else if (val == VBOX_VIDEO_INTERPRET_ADAPTER_MEMORY) 1048 1048 { 1049 s->pDrv->pfnProcessAdapterData(s->pDrv, s->CTX SUFF(vram_ptr), s->vram_size);1049 s->pDrv->pfnProcessAdapterData(s->pDrv, s->CTX_SUFF(vram_ptr), s->vram_size); 1050 1050 } 1051 1051 else if ((val & 0xFFFF0000) == VBOX_VIDEO_INTERPRET_DISPLAY_MEMORY_BASE) 1052 1052 { 1053 s->pDrv->pfnProcessDisplayData(s->pDrv, s->CTX SUFF(vram_ptr), val & 0xFFFF);1053 s->pDrv->pfnProcessDisplayData(s->pDrv, s->CTX_SUFF(vram_ptr), val & 0xFFFF); 1054 1054 } 1055 1055 #endif /* IN_RING3 */ … … 1111 1111 ret = s->vram_ptr[addr]; 1112 1112 #else /* VBOX */ 1113 ret = s->CTX SUFF(vram_ptr)[addr];1113 ret = s->CTX_SUFF(vram_ptr)[addr]; 1114 1114 #endif /* VBOX */ 1115 1115 } else if (!(s->sr[4] & 0x04)) { /* Host access is controlled by SR4, not GR5! */ … … 1120 1120 #else /* VBOX */ 1121 1121 /* See the comment for a similar line in vga_mem_writeb. */ 1122 ret = s->CTX SUFF(vram_ptr)[((addr & ~1) << 2) | plane];1122 ret = s->CTX_SUFF(vram_ptr)[((addr & ~1) << 2) | plane]; 1123 1123 #endif /* VBOX */ 1124 1124 } else { … … 1127 1127 s->latch = ((uint32_t *)s->vram_ptr)[addr]; 1128 1128 #else /* VBOX && IN_GC */ 1129 s->latch = ((uint32_t *)s->CTX SUFF(vram_ptr))[addr];1129 s->latch = ((uint32_t *)s->CTX_SUFF(vram_ptr))[addr]; 1130 1130 #endif /* VBOX && IN_GC */ 1131 1131 … … 1236 1236 } 1237 1237 #endif 1238 s->CTX SUFF(vram_ptr)[addr] = val;1238 s->CTX_SUFF(vram_ptr)[addr] = val; 1239 1239 #endif /* VBOX */ 1240 1240 #ifdef DEBUG_VGA_MEM … … 1277 1277 } 1278 1278 #endif 1279 s->CTX SUFF(vram_ptr)[addr] = val;1279 s->CTX_SUFF(vram_ptr)[addr] = val; 1280 1280 #endif /* VBOX */ 1281 1281 #ifdef DEBUG_VGA_MEM … … 1371 1371 (val & write_mask); 1372 1372 #else /* VBOX */ 1373 ((uint32_t *)s->CTX SUFF(vram_ptr))[addr] =1374 (((uint32_t *)s->CTX SUFF(vram_ptr))[addr] & ~write_mask) |1373 ((uint32_t *)s->CTX_SUFF(vram_ptr))[addr] = 1374 (((uint32_t *)s->CTX_SUFF(vram_ptr))[addr] & ~write_mask) | 1375 1375 (val & write_mask); 1376 1376 #endif /* VBOX */ … … 1699 1699 font_base[0] = s->vram_ptr + offset; 1700 1700 #else /* VBOX */ 1701 font_base[0] = s->CTX SUFF(vram_ptr) + offset;1701 font_base[0] = s->CTX_SUFF(vram_ptr) + offset; 1702 1702 #endif /* VBOX */ 1703 1703 … … 1706 1706 font_base[1] = s->vram_ptr + offset; 1707 1707 #else /* VBOX */ 1708 font_base[1] = s->CTX SUFF(vram_ptr) + offset;1708 font_base[1] = s->CTX_SUFF(vram_ptr) + offset; 1709 1709 #endif /* VBOX */ 1710 1710 if (offset != s->font_offsets[1]) { … … 1724 1724 s1 = s->vram_ptr + (s->start_addr * 4); 1725 1725 #else /* VBOX */ 1726 s1 = s->CTX SUFF(vram_ptr) + (s->start_addr * 8);1726 s1 = s->CTX_SUFF(vram_ptr) + (s->start_addr * 8); 1727 1727 #endif /* VBOX */ 1728 1728 … … 1801 1801 depth_index = get_depth_index(s->ds->depth); 1802 1802 #else /* VBOX */ 1803 cursor_ptr = s->CTX SUFF(vram_ptr) + (s->start_addr + cursor_offset) * 8;1803 cursor_ptr = s->CTX_SUFF(vram_ptr) + (s->start_addr + cursor_offset) * 8; 1804 1804 depth_index = get_depth_index(s->pDrv->cBits); 1805 1805 #endif /* VBOX */ … … 2033 2033 /** @todo r=sunlover: If the guest changes VBE_DISPI_INDEX_X_OFFSET, VBE_DISPI_INDEX_Y_OFFSET 2034 2034 * registers, then the third parameter of the following call should be 2035 * probably 's->CTX SUFF(vram_ptr) + s->vbe_start_addr'.2035 * probably 's->CTX_SUFF(vram_ptr) + s->vbe_start_addr'. 2036 2036 */ 2037 int rc = s->pDrv->pfnResize(s->pDrv, cBits, s->CTX SUFF(vram_ptr), s->line_offset, cx, cy);2037 int rc = s->pDrv->pfnResize(s->pDrv, cBits, s->CTX_SUFF(vram_ptr), s->line_offset, cx, cy); 2038 2038 2039 2039 /* last stuff */ … … 2242 2242 #else /* VBOX */ 2243 2243 if (s->fRenderVRAM) 2244 vga_draw_line(s, d, s->CTX SUFF(vram_ptr) + addr, width);2244 vga_draw_line(s, d, s->CTX_SUFF(vram_ptr) + addr, width); 2245 2245 #endif /* VBOX */ 2246 2246 if (s->cursor_draw_line) … … 2328 2328 uint32_t cbScanline = s->pDrv->cbScanline; 2329 2329 2330 if (s->pDrv->pu8Data == s->vram_ptr HC) /* Do not clear the VRAM itself. */2330 if (s->pDrv->pu8Data == s->vram_ptrR3) /* Do not clear the VRAM itself. */ 2331 2331 return; 2332 2332 if (!full_update) … … 3265 3265 if (pData->sr[2] & (1 << (GCPhysAddr & 3))) 3266 3266 { 3267 CTXSUFF(pData->vram_ptr)[GCPhysAddr] = aVal[i];3267 pData->CTX_SUFF(vram_ptr)[GCPhysAddr] = aVal[i]; 3268 3268 vga_set_dirty(pData, GCPhysAddr); 3269 3269 } … … 3288 3288 if (pData->sr[2] & (1 << plane)) { 3289 3289 RTGCPHYS PhysAddr2 = ((GCPhysAddr & ~1) << 2) | plane; 3290 CTXSUFF(pData->vram_ptr)[PhysAddr2] = aVal[i];3290 pData->CTX_SUFF(vram_ptr)[PhysAddr2] = aVal[i]; 3291 3291 vga_set_dirty(pData, PhysAddr2); 3292 3292 } … … 3369 3369 while (cItems-- > 0) 3370 3370 { 3371 ((uint32_t *)pData->CTX SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTXSUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[0] & write_mask);3371 ((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[0] & write_mask); 3372 3372 vga_set_dirty(pData, GCPhysAddr << 2); 3373 3373 GCPhysAddr++; … … 3379 3379 while (cItems-- > 0) 3380 3380 { 3381 ((uint32_t *)pData->CTX SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTXSUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[0] & write_mask);3381 ((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[0] & write_mask); 3382 3382 vga_set_dirty(pData, GCPhysAddr << 2); 3383 3383 GCPhysAddr++; 3384 3384 3385 ((uint32_t *)pData->CTX SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTXSUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[1] & write_mask);3385 ((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[1] & write_mask); 3386 3386 vga_set_dirty(pData, GCPhysAddr << 2); 3387 3387 GCPhysAddr++; … … 3395 3395 for (i = 0; i < cbItem; i++) 3396 3396 { 3397 ((uint32_t *)pData->CTX SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTXSUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[i] & write_mask);3397 ((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] = (((uint32_t *)pData->CTX_SUFF(vram_ptr))[GCPhysAddr] & ~write_mask) | (aVal[i] & write_mask); 3398 3398 vga_set_dirty(pData, GCPhysAddr << 2); 3399 3399 GCPhysAddr++; … … 4050 4050 4051 4051 if (pData->vram_size >= LOGO_MAX_SIZE * 2) 4052 pu8Dst = pData->vram_ptr HC+ LOGO_MAX_SIZE;4052 pu8Dst = pData->vram_ptrR3 + LOGO_MAX_SIZE; 4053 4053 else 4054 pu8Dst = pData->vram_ptr HC;4054 pu8Dst = pData->vram_ptrR3; 4055 4055 4056 4056 /* Clear screen - except on power on... */ … … 4084 4084 if (pData->vram_size >= LOGO_MAX_SIZE * 2) 4085 4085 { 4086 uint32_t *pu32TmpDst = (uint32_t *)pData->vram_ptr HC;4087 uint32_t *pu32TmpSrc = (uint32_t *)(pData->vram_ptr HC+ LOGO_MAX_SIZE);4086 uint32_t *pu32TmpDst = (uint32_t *)pData->vram_ptrR3; 4087 uint32_t *pu32TmpSrc = (uint32_t *)(pData->vram_ptrR3 + LOGO_MAX_SIZE); 4088 4088 for (int i = 0; i < LOGO_MAX_WIDTH; i++) 4089 4089 { … … 4338 4338 if (pData->fHaveDirtyBits && pData->GCPhysVRAM && pData->GCPhysVRAM != NIL_RTGCPHYS32) 4339 4339 { 4340 PPDMDEVINS pDevIns = pData-> pDevInsHC;4340 PPDMDEVINS pDevIns = pData->CTX_SUFF(pDevIns); 4341 4341 PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), pData->GCPhysVRAM); 4342 4342 pData->fHaveDirtyBits = false; … … 4371 4371 if (pData->GCPhysVRAM && pData->GCPhysVRAM != NIL_RTGCPHYS32) 4372 4372 { 4373 PPDMDEVINS pDevIns = pData-> pDevInsHC;4373 PPDMDEVINS pDevIns = pData->CTX_SUFF(pDevIns); 4374 4374 PGMHandlerPhysicalReset(PDMDevHlpGetVM(pDevIns), pData->GCPhysVRAM); 4375 4375 } … … 4717 4717 * This is true because coordinates were verified. 4718 4718 */ 4719 pu8Src = s->vram_ptr HC;4719 pu8Src = s->vram_ptrR3; 4720 4720 pu8Src += u32OffsetSrc + y * cbLineSrc + x * cbPixelSrc; 4721 4721 … … 4863 4863 4864 4864 /* Clear the VRAM ourselves. */ 4865 if (pData->vram_ptr HC&& pData->vram_size)4865 if (pData->vram_ptrR3 && pData->vram_size) 4866 4866 { 4867 4867 #ifdef LOG_ENABLED /** @todo separate function. */ … … 4885 4885 4886 4886 line_offset = s->line_offset; 4887 s1 = s->CTX SUFF(vram_ptr) + (s->start_addr * 4);4887 s1 = s->CTX_SUFF(vram_ptr) + (s->start_addr * 4); 4888 4888 4889 4889 /* total width & height */ … … 4940 4940 4941 4941 #endif /* LOG_ENABLED */ 4942 memset(pData->vram_ptr HC, 0, pData->vram_size);4942 memset(pData->vram_ptrR3, 0, pData->vram_size); 4943 4943 } 4944 4944 … … 4946 4946 * Zero most of it. 4947 4947 * 4948 * Unlike vga_reset we're leaving out a few members which believe must4949 * remain unchanged....4948 * Unlike vga_reset we're leaving out a few members which we believe 4949 * must remain unchanged.... 4950 4950 */ 4951 4951 /* 1st part. */ … … 5013 5013 LogFlow(("vgaRelocate: offDelta = %08X\n", offDelta)); 5014 5014 5015 pData->GCPtrLFBHandler += offDelta; 5016 pData->vram_ptrGC += offDelta; 5015 pData->RCPtrLFBHandler += offDelta; 5016 pData->vram_ptrRC += offDelta; 5017 pData->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 5017 5018 } 5018 5019 } … … 5133 5134 static DECLCALLBACK(int) vgaR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 5134 5135 { 5135 static bool fExpandDone = false;5136 static bool s_fExpandDone = false; 5136 5137 bool f; 5137 5138 int rc; … … 5152 5153 * Init static data. 5153 5154 */ 5154 if (! fExpandDone)5155 { 5156 fExpandDone = true;5155 if (!s_fExpandDone) 5156 { 5157 s_fExpandDone = true; 5157 5158 vga_init_expand(); 5158 5159 } … … 5220 5221 Log(("VGA: fR0Enabled=%d\n", pData->fR0Enabled)); 5221 5222 5222 pData->pDevInsHC = pDevIns; 5223 pData->pDevInsR3 = pDevIns; 5224 pData->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 5225 pData->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 5223 5226 5224 5227 vgaR3Reset(pDevIns); … … 5236 5239 5237 5240 /* The LBF access handler - error handling is better here than in the map function. */ 5238 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, "vgaGCLFBAccessHandler", &pData-> GCPtrLFBHandler);5241 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, "vgaGCLFBAccessHandler", &pData->RCPtrLFBHandler); 5239 5242 if (VBOX_FAILURE(rc)) 5240 5243 { … … 5259 5262 * Allocate the VRAM and map the first 256KB of it into GC so we can speed up VGA support. 5260 5263 */ 5261 rc = PDMDevHlpMMIO2Register(pDevIns, 0 /* iRegion */, pData->vram_size, 0, (void **)&pData->vram_ptr HC, "VRam");5264 rc = PDMDevHlpMMIO2Register(pDevIns, 0 /* iRegion */, pData->vram_size, 0, (void **)&pData->vram_ptrR3, "VRam"); 5262 5265 AssertMsgRC(rc, ("PDMDevHlpMMIO2Register(%#x,) -> %Rrc\n", pData->vram_size, rc)); 5263 5264 RTGCPTR pGCMapping = 0; 5265 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 0 /* iRegion */, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pGCMapping); 5266 pData->vram_ptrR0 = (RTR0PTR)pData->vram_ptrR3; /** @todo #1865 Map parts into R0 or just use PGM access (Mac only). */ 5267 5268 RTRCPTR pRCMapping = 0; 5269 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 0 /* iRegion */, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pRCMapping); 5266 5270 AssertMsgRC(rc, ("MMR3HyperMapGCPhys(%#x,) -> %Rrc\n", pData->vram_size, rc)); 5267 #if GC_ARCH_BITS == 64 5268 Assert(!(pGCMapping >> 32ULL)); 5269 #endif 5270 pData->vram_ptrGC = pGCMapping; 5271 pData->vram_ptrRC = pRCMapping; 5271 5272 5272 5273 /* -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r9212 r11163 187 187 some type changes, and some padding have been added. */ 188 188 #define VGA_STATE_COMMON \ 189 R3 R0PTRTYPE(uint8_t *) vram_ptrHC;\189 R3PTRTYPE(uint8_t *) vram_ptrR3; \ 190 190 uint32_t vram_size; \ 191 191 uint32_t latch; \ … … 250 250 /** The physical address the VRAM was assigned. */ 251 251 RTGCPHYS32 GCPhysVRAM; 252 /** Pointer to GC vram mapping. */ 253 RCPTRTYPE(uint8_t *) vram_ptrGC; 254 /** @todo r=bird: bool not RTUINT (my fault I guess). */ 252 /** The R0 vram pointer... */ 253 R0PTRTYPE(uint8_t *) vram_ptrR0; 254 /** Pointer to the GC vram mapping. */ 255 RCPTRTYPE(uint8_t *) vram_ptrRC; 255 256 /** LFB was updated flag. */ 256 RTUINTfLFBUpdated;257 bool fLFBUpdated; 257 258 /** Indicates if the GC extensions are enabled or not. */ 258 RTUINTfGCEnabled;259 bool fGCEnabled; 259 260 /** Indicates if the R0 extensions are enabled or not. */ 260 RTUINT fR0Enabled; 261 /** Pointer to vgaGCLFBAccessHandler(). */ 262 RTGCPTR32 GCPtrLFBHandler; 261 bool fR0Enabled; 263 262 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */ 264 263 bool fHaveDirtyBits; 264 /** Pointer to vgaGCLFBAccessHandler(). */ 265 RTRCPTR RCPtrLFBHandler; 265 266 /** Bitmap tracking dirty pages. */ 266 267 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32]; 267 /** Pointer to the device instance - HC Ptr. */ 268 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 269 /* * Pointer to the device instance - GC Ptr. */ 270 /*RCPTRTYPE(PPDMDEVINS) pDevInsGC;*/ 268 /** Pointer to the device instance - RC Ptr. */ 269 PPDMDEVINSRC pDevInsRC; 270 /** Pointer to the device instance - R3 Ptr. */ 271 PPDMDEVINSR3 pDevInsR3; 272 /** Pointer to the device instance - R0 Ptr. */ 273 PPDMDEVINSR0 pDevInsR0; 271 274 272 275 /** The display port base interface. */
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