vbox的更動 11193 路徑 trunk/src/VBox/Devices/Graphics
- 時間撮記:
- 2008-8-6 下午07:30:52 (16 年 以前)
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- 修改 1 筆資料
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trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r11166 r11193 2912 2912 NOREF(pvUser); 2913 2913 if (cb == 1) 2914 vga_ioport_write(PDMINS 2DATA(pDevIns, PVGASTATE), Port, u32);2914 vga_ioport_write(PDMINS_2_DATA(pDevIns, PVGASTATE), Port, u32); 2915 2915 else if (cb == 2) 2916 2916 { 2917 vga_ioport_write(PDMINS 2DATA(pDevIns, PVGASTATE), Port, u32 & 0xff);2918 vga_ioport_write(PDMINS 2DATA(pDevIns, PVGASTATE), Port + 1, u32 >> 8);2917 vga_ioport_write(PDMINS_2_DATA(pDevIns, PVGASTATE), Port, u32 & 0xff); 2918 vga_ioport_write(PDMINS_2_DATA(pDevIns, PVGASTATE), Port + 1, u32 >> 8); 2919 2919 } 2920 2920 return VINF_SUCCESS; … … 2938 2938 if (cb == 1) 2939 2939 { 2940 *pu32 = vga_ioport_read(PDMINS 2DATA(pDevIns, PVGASTATE), Port);2940 *pu32 = vga_ioport_read(PDMINS_2_DATA(pDevIns, PVGASTATE), Port); 2941 2941 return VINF_SUCCESS; 2942 2942 } 2943 2943 else if (cb == 2) 2944 2944 { 2945 *pu32 = vga_ioport_read(PDMINS 2DATA(pDevIns, PVGASTATE), Port)2946 | (vga_ioport_read(PDMINS 2DATA(pDevIns, PVGASTATE), Port + 1) << 8);2945 *pu32 = vga_ioport_read(PDMINS_2_DATA(pDevIns, PVGASTATE), Port) 2946 | (vga_ioport_read(PDMINS_2_DATA(pDevIns, PVGASTATE), Port + 1) << 8); 2947 2947 return VINF_SUCCESS; 2948 2948 } … … 2964 2964 PDMBOTHCBDECL(int) vgaIOPortWriteVBEData(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 2965 2965 { 2966 VGAState *s = PDMINS 2DATA(pDevIns, PVGASTATE);2966 VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); 2967 2967 2968 2968 NOREF(pvUser); … … 3045 3045 if (cb == 1) 3046 3046 { 3047 VGAState *s = PDMINS 2DATA(pDevIns, PVGASTATE);3047 VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); 3048 3048 if (!s->fWriteVBEIndex) 3049 3049 { … … 3062 3062 #endif 3063 3063 if (cb == 2) 3064 vbe_ioport_write_index(PDMINS 2DATA(pDevIns, PVGASTATE), Port, u32);3064 vbe_ioport_write_index(PDMINS_2_DATA(pDevIns, PVGASTATE), Port, u32); 3065 3065 else 3066 3066 AssertMsgFailed(("vgaIOPortWriteVBEIndex: Port=%#x cb=%d u32=%#x\n", Port, cb, u32)); … … 3086 3086 if (cb == 1) 3087 3087 { 3088 VGAState *s = PDMINS 2DATA(pDevIns, PVGASTATE);3088 VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); 3089 3089 3090 3090 if (!s->fReadVBEData) … … 3105 3105 if (cb == 2) 3106 3106 { 3107 *pu32 = vbe_ioport_read_data(PDMINS 2DATA(pDevIns, PVGASTATE), Port);3107 *pu32 = vbe_ioport_read_data(PDMINS_2_DATA(pDevIns, PVGASTATE), Port); 3108 3108 return VINF_SUCCESS; 3109 3109 } 3110 3110 else if (cb == 4) 3111 3111 { 3112 VGAState *s = PDMINS 2DATA(pDevIns, PVGASTATE);3112 VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); 3113 3113 /* Quick hack for getting the vram size. */ 3114 3114 *pu32 = s->vram_size; … … 3137 3137 if (cb == 1) 3138 3138 { 3139 VGAState *s = PDMINS 2DATA(pDevIns, PVGASTATE);3139 VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE); 3140 3140 3141 3141 if (!s->fReadVBEIndex) … … 3156 3156 if (cb == 2) 3157 3157 { 3158 *pu32 = vbe_ioport_read_index(PDMINS 2DATA(pDevIns, PVGASTATE), Port);3158 *pu32 = vbe_ioport_read_index(PDMINS_2_DATA(pDevIns, PVGASTATE), Port); 3159 3159 return VINF_SUCCESS; 3160 3160 } … … 3211 3211 PDMBOTHCBDECL(int) vgaMMIOFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems) 3212 3212 { 3213 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);3213 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 3214 3214 uint32_t b; 3215 3215 uint32_t write_mask, bit_mask, set_mask; … … 3418 3418 PDMBOTHCBDECL(int) vgaMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 3419 3419 { 3420 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);3420 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 3421 3421 STAM_PROFILE_START(&pData->StatGCMemoryRead, a); 3422 3422 NOREF(pvUser); … … 3470 3470 PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 3471 3471 { 3472 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);3472 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 3473 3473 uint8_t *pu8 = (uint8_t *)pv; 3474 3474 int rc = VINF_SUCCESS; … … 3558 3558 */ 3559 3559 rc = PGMHandlerPhysicalPageTempOff(pVM, pData->GCPhysVRAM, GCPhys); 3560 if ( VBOX_SUCCESS(rc))3560 if (RT_SUCCESS(rc)) 3561 3561 { 3562 3562 #ifndef IN_RING3 3563 3563 rc = PGMShwModifyPage(pVM, GCPtr, 1, X86_PTE_RW, ~(uint64_t)X86_PTE_RW); 3564 if ( VBOX_SUCCESS(rc))3564 if (RT_SUCCESS(rc)) 3565 3565 return VINF_SUCCESS; 3566 3566 else … … 3645 3645 Assert(GCPhys >= pData->GCPhysVRAM); 3646 3646 rc = vgaLFBAccess(pVM, pData, GCPhys, 0); 3647 if ( VBOX_SUCCESS(rc))3647 if (RT_SUCCESS(rc)) 3648 3648 return VINF_PGM_HANDLER_DO_DEFAULT; 3649 3649 AssertMsg(rc <= VINF_SUCCESS, ("rc=%Vrc\n", rc)); … … 3671 3671 PDMBOTHCBDECL(int) vbeIOPortWriteVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 3672 3672 { 3673 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);3673 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 3674 3674 NOREF(pvUser); 3675 3675 NOREF(Port); … … 3700 3700 PDMBOTHCBDECL(int) vbeIOPortReadVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 3701 3701 { 3702 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);3702 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 3703 3703 NOREF(pvUser); 3704 3704 NOREF(Port); … … 4020 4020 PDMBOTHCBDECL(int) vbeIOPortWriteCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 4021 4021 { 4022 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);4022 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 4023 4023 NOREF(pvUser); 4024 4024 NOREF(Port); … … 4129 4129 PDMBOTHCBDECL(int) vbeIOPortReadCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 4130 4130 { 4131 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);4131 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 4132 4132 NOREF(pvUser); 4133 4133 NOREF(Port); … … 4555 4555 break; 4556 4556 } 4557 if ( VBOX_SUCCESS(rc))4557 if (RT_SUCCESS(rc)) 4558 4558 { 4559 4559 /* … … 4750 4750 static DECLCALLBACK(void) vgaTimerRefresh(PPDMDEVINS pDevIns, PTMTIMER pTimer) 4751 4751 { 4752 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);4752 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 4753 4753 if (pData->pDrv) 4754 4754 pData->pDrv->pfnRefresh(pData->pDrv); … … 4775 4775 int rc; 4776 4776 PPDMDEVINS pDevIns = pPciDev->pDevIns; 4777 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);4777 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 4778 4778 LogFlow(("vgaR3IORegionMap: iRegion=%d GCPhysAddress=%VGp cb=%#x enmType=%d\n", iRegion, GCPhysAddress, cb, enmType)); 4779 4779 AssertReturn(iRegion == 0 && enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH, VERR_INTERNAL_ERROR); … … 4826 4826 static DECLCALLBACK(int) vgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 4827 4827 { 4828 vga_save(pSSMHandle, PDMINS 2DATA(pDevIns, PVGASTATE));4828 vga_save(pSSMHandle, PDMINS_2_DATA(pDevIns, PVGASTATE)); 4829 4829 return VINF_SUCCESS; 4830 4830 } … … 4841 4841 static DECLCALLBACK(int) vgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, uint32_t u32Version) 4842 4842 { 4843 if (vga_load(pSSMHandle, PDMINS 2DATA(pDevIns, PVGASTATE), u32Version))4843 if (vga_load(pSSMHandle, PDMINS_2_DATA(pDevIns, PVGASTATE), u32Version)) 4844 4844 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION; 4845 4845 return VINF_SUCCESS; … … 4857 4857 static DECLCALLBACK(void) vgaR3Reset(PPDMDEVINS pDevIns) 4858 4858 { 4859 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);4859 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 4860 4860 char *pchStart; 4861 4861 char *pchEnd; … … 5010 5010 if (offDelta) 5011 5011 { 5012 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);5012 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 5013 5013 LogFlow(("vgaRelocate: offDelta = %08X\n", offDelta)); 5014 5014 … … 5035 5035 static DECLCALLBACK(int) vgaAttach(PPDMDEVINS pDevIns, unsigned iLUN) 5036 5036 { 5037 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);5037 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 5038 5038 switch (iLUN) 5039 5039 { … … 5042 5042 { 5043 5043 int rc = PDMDevHlpDriverAttach(pDevIns, iLUN, &pData->Base, &pData->pDrvBase, "Display Port"); 5044 if ( VBOX_SUCCESS(rc))5044 if (RT_SUCCESS(rc)) 5045 5045 { 5046 5046 pData->pDrv = (PDMIDISPLAYCONNECTOR*)pData->pDrvBase->pfnQueryInterface(pData->pDrvBase, PDMINTERFACE_DISPLAY_CONNECTOR); … … 5075 5075 } 5076 5076 else 5077 Assert MsgFailed(("Failed to attach LUN #0! rc=%Vrc\n", rc));5077 AssertLogRelMsgFailed(("Failed to attach LUN #0! rc=%Vrc\n", rc)); 5078 5078 return rc; 5079 5079 } … … 5102 5102 * Reset the interfaces and update the controller state. 5103 5103 */ 5104 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);5104 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 5105 5105 switch (iLUN) 5106 5106 { … … 5138 5138 int rc; 5139 5139 unsigned i; 5140 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);5140 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 5141 5141 PVM pVM = PDMDevHlpGetVM(pDevIns); 5142 5142 #ifdef VBE_NEW_DYN_LIST … … 5194 5194 * Init state data. 5195 5195 */ 5196 rc = CFGMR3QueryU32(pCfgHandle, "VRamSize", &pData->vram_size); 5197 if (VBOX_FAILURE(rc) || !pData->vram_size) 5198 pData->vram_size = VGA_VRAM_DEFAULT; 5199 else if (pData->vram_size > VGA_VRAM_MAX) 5200 { 5201 AssertMsgFailed(("vram_size=%d max=%d\n", pData->vram_size, VGA_VRAM_MAX)); 5202 pData->vram_size = VGA_VRAM_MAX; 5203 } 5204 else if (pData->vram_size < VGA_VRAM_MIN) 5205 { 5206 AssertMsgFailed(("vram_size=%d min=%d\n", pData->vram_size, VGA_VRAM_MIN)); 5207 pData->vram_size = RT_ALIGN_32(pData->vram_size, _1M); 5208 } 5209 Log(("VGA: VRamSize=%#x\n", pData->vram_size)); 5210 5211 pData->fGCEnabled = true; 5212 rc = CFGMR3QueryBool(pCfgHandle, "GCEnabled", &f); 5213 if (VBOX_SUCCESS(rc) && !f) 5214 pData->fGCEnabled = false; 5196 rc = CFGMR3QueryU32Def(pCfgHandle, "VRamSize", &pData->vram_size, VGA_VRAM_DEFAULT); 5197 AssertLogRelRCReturn(rc, rc); 5198 if (pData->vram_size > VGA_VRAM_MAX) 5199 return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS, 5200 "VRamSize is too large, %#x, max %#x", pData->vram_size, VGA_VRAM_MAX); 5201 if (pData->vram_size < VGA_VRAM_MIN) 5202 return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS, 5203 "VRamSize is too small, %#x, max %#x", pData->vram_size, VGA_VRAM_MIN); 5204 5205 rc = CFGMR3QueryBoolDef(pCfgHandle, "GCEnabled", &f, true); 5206 AssertLogRelRCReturn(rc, rc); 5215 5207 Log(("VGA: fGCEnabled=%d\n", pData->fGCEnabled)); 5216 5208 5217 pData->fR0Enabled = true; 5218 rc = CFGMR3QueryBool(pCfgHandle, "R0Enabled", &f); 5219 if (VBOX_SUCCESS(rc) && !f) 5220 pData->fR0Enabled = false; 5221 Log(("VGA: fR0Enabled=%d\n", pData->fR0Enabled)); 5209 rc = CFGMR3QueryBoolDef(pCfgHandle, "R0Enabled", &f, true); 5210 AssertLogRelRCReturn(rc, rc); 5211 Log(("VGA: VRamSize=%#x fGCenabled=%RTbool fR0Enabled=%RTbool\n", pData->vram_size, pData->fGCEnabled, pData->fR0Enabled)); 5222 5212 5223 5213 pData->pDevInsR3 = pDevIns; … … 5228 5218 5229 5219 /* The PCI devices configuration. */ 5230 pData->Dev.config[0x00] = 0xee; /* PCI vendor, just a free bogus value */ 5231 pData->Dev.config[0x01] = 0x80; 5232 5233 pData->Dev.config[0x02] = 0xef; /* Device ID */ 5234 pData->Dev.config[0x03] = 0xbe; 5235 5236 pData->Dev.config[0x0a] = 0x00; /* VGA controller */ 5237 pData->Dev.config[0x0b] = 0x03; 5238 pData->Dev.config[0x0e] = 0x00; /* header_type */ 5220 PCIDevSetVendorId( &pData->Dev, 0x80ee); /* PCI vendor, just a free bogus value */ 5221 PCIDevSetDeviceId( &pData->Dev, 0xbeef); 5222 PCIDevSetClassSub( &pData->Dev, 0x00); /* VGA controller */ 5223 PCIDevSetClassBase( &pData->Dev, 0x03); 5224 PCIDevSetHeaderType(&pData->Dev, 0x00); 5239 5225 5240 5226 /* The LBF access handler - error handling is better here than in the map function. */ 5241 5227 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, "vgaGCLFBAccessHandler", &pData->RCPtrLFBHandler); 5242 if ( VBOX_FAILURE(rc))5228 if (RT_FAILURE(rc)) 5243 5229 { 5244 5230 AssertReleaseMsgFailed(("PDMR3GetSymbolGC(, %s, \"vgaGCLFBAccessHandler\",) -> %Vrc\n", pDevIns->pDevReg->szGCMod, rc)); … … 5263 5249 */ 5264 5250 rc = PDMDevHlpMMIO2Register(pDevIns, 0 /* iRegion */, pData->vram_size, 0, (void **)&pData->vram_ptrR3, "VRam"); 5265 Assert MsgRC(rc, ("PDMDevHlpMMIO2Register(%#x,) -> %Rrc\n", pData->vram_size, rc));5251 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMIO2Register(%#x,) -> %Rrc\n", pData->vram_size, rc), rc); 5266 5252 pData->vram_ptrR0 = (RTR0PTR)pData->vram_ptrR3; /** @todo #1865 Map parts into R0 or just use PGM access (Mac only). */ 5267 5253 5268 5254 RTRCPTR pRCMapping = 0; 5269 5255 rc = PDMDevHlpMMHyperMapMMIO2(pDevIns, 0 /* iRegion */, 0 /* off */, VGA_MAPPING_SIZE, "VGA VRam", &pRCMapping); 5270 Assert MsgRC(rc, ("MMR3HyperMapGCPhys(%#x,) -> %Rrc\n", pData->vram_size, rc));5256 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMHyperMapMMIO2(%#x,) -> %Rrc\n", pData->vram_size, rc), rc); 5271 5257 pData->vram_ptrRC = pRCMapping; 5272 5258 … … 5275 5261 */ 5276 5262 rc = PDMDevHlpIOPortRegister(pDevIns, 0x3c0, 16, NULL, vgaIOPortWrite, vgaIOPortRead, NULL, NULL, "VGA - 3c0"); 5277 if ( VBOX_FAILURE(rc))5263 if (RT_FAILURE(rc)) 5278 5264 return rc; 5279 5265 rc = PDMDevHlpIOPortRegister(pDevIns, 0x3b4, 2, NULL, vgaIOPortWrite, vgaIOPortRead, NULL, NULL, "VGA - 3b4"); 5280 if ( VBOX_FAILURE(rc))5266 if (RT_FAILURE(rc)) 5281 5267 return rc; 5282 5268 rc = PDMDevHlpIOPortRegister(pDevIns, 0x3ba, 1, NULL, vgaIOPortWrite, vgaIOPortRead, NULL, NULL, "VGA - 3ba"); 5283 if ( VBOX_FAILURE(rc))5269 if (RT_FAILURE(rc)) 5284 5270 return rc; 5285 5271 rc = PDMDevHlpIOPortRegister(pDevIns, 0x3d4, 2, NULL, vgaIOPortWrite, vgaIOPortRead, NULL, NULL, "VGA - 3d4"); 5286 if ( VBOX_FAILURE(rc))5272 if (RT_FAILURE(rc)) 5287 5273 return rc; 5288 5274 rc = PDMDevHlpIOPortRegister(pDevIns, 0x3da, 1, NULL, vgaIOPortWrite, vgaIOPortRead, NULL, NULL, "VGA - 3da"); 5289 if ( VBOX_FAILURE(rc))5275 if (RT_FAILURE(rc)) 5290 5276 return rc; 5291 5277 5292 5278 #ifdef CONFIG_BOCHS_VBE 5293 5279 rc = PDMDevHlpIOPortRegister(pDevIns, 0x1ce, 1, NULL, vgaIOPortWriteVBEIndex, vgaIOPortReadVBEIndex, NULL, NULL, "VGA/VBE - Index"); 5294 if ( VBOX_FAILURE(rc))5280 if (RT_FAILURE(rc)) 5295 5281 return rc; 5296 5282 rc = PDMDevHlpIOPortRegister(pDevIns, 0x1cf, 1, NULL, vgaIOPortWriteVBEData, vgaIOPortReadVBEData, NULL, NULL, "VGA/VBE - Data"); 5297 if ( VBOX_FAILURE(rc))5283 if (RT_FAILURE(rc)) 5298 5284 return rc; 5299 5285 #if 0 … … 5302 5288 /* Old Bochs. */ 5303 5289 rc = PDMDevHlpIOPortRegister(pDevIns, 0xff80, 1, NULL, vgaIOPortWriteVBEIndex, vgaIOPortReadVBEIndex, "VGA/VBE - Index Old"); 5304 if ( VBOX_FAILURE(rc))5290 if (RT_FAILURE(rc)) 5305 5291 return rc; 5306 5292 rc = PDMDevHlpIOPortRegister(pDevIns, 0xff81, 1, NULL, vgaIOPortWriteVBEData, vgaIOPortReadVBEData, "VGA/VBE - Data Old"); 5307 if ( VBOX_FAILURE(rc))5293 if (RT_FAILURE(rc)) 5308 5294 return rc; 5309 5295 #endif … … 5314 5300 { 5315 5301 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0x3c0, 16, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3c0 (GC)"); 5316 if ( VBOX_FAILURE(rc))5302 if (RT_FAILURE(rc)) 5317 5303 return rc; 5318 5304 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0x3b4, 2, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3b4 (GC)"); 5319 if ( VBOX_FAILURE(rc))5305 if (RT_FAILURE(rc)) 5320 5306 return rc; 5321 5307 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0x3ba, 1, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3ba (GC)"); 5322 if ( VBOX_FAILURE(rc))5308 if (RT_FAILURE(rc)) 5323 5309 return rc; 5324 5310 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0x3d4, 2, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3d4 (GC)"); 5325 if ( VBOX_FAILURE(rc))5311 if (RT_FAILURE(rc)) 5326 5312 return rc; 5327 5313 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0x3da, 1, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3da (GC)"); 5328 if ( VBOX_FAILURE(rc))5314 if (RT_FAILURE(rc)) 5329 5315 return rc; 5330 5316 #ifdef CONFIG_BOCHS_VBE 5331 5317 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0x1ce, 1, 0, "vgaIOPortWriteVBEIndex", "vgaIOPortReadVBEIndex", NULL, NULL, "VGA/VBE - Index (GC)"); 5332 if ( VBOX_FAILURE(rc))5318 if (RT_FAILURE(rc)) 5333 5319 return rc; 5334 5320 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0x1cf, 1, 0, "vgaIOPortWriteVBEData", "vgaIOPortReadVBEData", NULL, NULL, "VGA/VBE - Data (GC)"); 5335 if ( VBOX_FAILURE(rc))5321 if (RT_FAILURE(rc)) 5336 5322 return rc; 5337 5323 … … 5341 5327 /* Old Bochs. */ 5342 5328 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0xff80, 1, 0, "vgaIOPortWriteVBEIndex", "vgaIOPortReadVBEIndex", "VGA/VBE - Index Old (GC)"); 5343 if ( VBOX_FAILURE(rc))5329 if (RT_FAILURE(rc)) 5344 5330 return rc; 5345 5331 rc = PDMDevHlpIOPortRegisterGC(pDevIns, 0xff81, 1, 0, "vgaIOPortWriteVBEData", "vgaIOPortReadVBEData", "VGA/VBE - Index Old (GC)"); 5346 if ( VBOX_FAILURE(rc))5332 if (RT_FAILURE(rc)) 5347 5333 return rc; 5348 5334 #endif … … 5355 5341 { 5356 5342 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x3c0, 16, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3c0 (GC)"); 5357 if ( VBOX_FAILURE(rc))5343 if (RT_FAILURE(rc)) 5358 5344 return rc; 5359 5345 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x3b4, 2, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3b4 (GC)"); 5360 if ( VBOX_FAILURE(rc))5346 if (RT_FAILURE(rc)) 5361 5347 return rc; 5362 5348 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x3ba, 1, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3ba (GC)"); 5363 if ( VBOX_FAILURE(rc))5349 if (RT_FAILURE(rc)) 5364 5350 return rc; 5365 5351 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x3d4, 2, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3d4 (GC)"); 5366 if ( VBOX_FAILURE(rc))5352 if (RT_FAILURE(rc)) 5367 5353 return rc; 5368 5354 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x3da, 1, 0, "vgaIOPortWrite", "vgaIOPortRead", NULL, NULL, "VGA - 3da (GC)"); 5369 if ( VBOX_FAILURE(rc))5355 if (RT_FAILURE(rc)) 5370 5356 return rc; 5371 5357 #ifdef CONFIG_BOCHS_VBE 5372 5358 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x1ce, 1, 0, "vgaIOPortWriteVBEIndex", "vgaIOPortReadVBEIndex", NULL, NULL, "VGA/VBE - Index (GC)"); 5373 if ( VBOX_FAILURE(rc))5359 if (RT_FAILURE(rc)) 5374 5360 return rc; 5375 5361 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x1cf, 1, 0, "vgaIOPortWriteVBEData", "vgaIOPortReadVBEData", NULL, NULL, "VGA/VBE - Data (GC)"); 5376 if ( VBOX_FAILURE(rc))5362 if (RT_FAILURE(rc)) 5377 5363 return rc; 5378 5364 … … 5382 5368 /* Old Bochs. */ 5383 5369 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0xff80, 1, 0, "vgaIOPortWriteVBEIndex", "vgaIOPortReadVBEIndex", "VGA/VBE - Index Old (GC)"); 5384 if ( VBOX_FAILURE(rc))5370 if (RT_FAILURE(rc)) 5385 5371 return rc; 5386 5372 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0xff81, 1, 0, "vgaIOPortWriteVBEData", "vgaIOPortReadVBEData", "VGA/VBE - Index Old (GC)"); 5387 if ( VBOX_FAILURE(rc))5373 if (RT_FAILURE(rc)) 5388 5374 return rc; 5389 5375 #endif … … 5394 5380 /* vga mmio */ 5395 5381 rc = PDMDevHlpMMIORegister(pDevIns, 0x000a0000, 0x00020000, 0, vgaMMIOWrite, vgaMMIORead, vgaMMIOFill, "VGA - VGA Video Buffer"); 5396 if ( VBOX_FAILURE(rc))5382 if (RT_FAILURE(rc)) 5397 5383 return rc; 5398 5384 if (pData->fGCEnabled) 5399 5385 { 5400 5386 rc = PDMDevHlpMMIORegisterGC(pDevIns, 0x000a0000, 0x00020000, 0, "vgaMMIOWrite", "vgaMMIORead", "vgaMMIOFill"); 5401 if ( VBOX_FAILURE(rc))5387 if (RT_FAILURE(rc)) 5402 5388 return rc; 5403 5389 } … … 5405 5391 { 5406 5392 rc = PDMDevHlpMMIORegisterR0(pDevIns, 0x000a0000, 0x00020000, 0, "vgaMMIOWrite", "vgaMMIORead", "vgaMMIOFill"); 5407 if ( VBOX_FAILURE(rc))5393 if (RT_FAILURE(rc)) 5408 5394 return rc; 5409 5395 } … … 5411 5397 /* vga bios */ 5412 5398 rc = PDMDevHlpIOPortRegister(pDevIns, VBE_PRINTF_PORT, 1, NULL, vgaIOPortWriteBIOS, vgaIOPortReadBIOS, NULL, NULL, "VGA BIOS debug/panic"); 5413 if ( VBOX_FAILURE(rc))5399 if (RT_FAILURE(rc)) 5414 5400 return rc; 5415 5401 AssertReleaseMsg(g_cbVgaBiosBinary <= _64K && g_cbVgaBiosBinary >= 32*_1K, ("g_cbVgaBiosBinary=%#x\n", g_cbVgaBiosBinary)); … … 5417 5403 rc = PDMDevHlpROMRegister(pDevIns, 0x000c0000, g_cbVgaBiosBinary, &g_abVgaBiosBinary[0], 5418 5404 false /* fShadow */, "VGA BIOS"); 5419 if ( VBOX_FAILURE(rc))5405 if (RT_FAILURE(rc)) 5420 5406 return rc; 5421 5407 … … 5424 5410 NULL, vgaR3SaveExec, NULL, 5425 5411 NULL, vgaR3LoadExec, NULL); 5426 if ( VBOX_FAILURE(rc))5412 if (RT_FAILURE(rc)) 5427 5413 return rc; 5428 5414 5429 5415 /* PCI */ 5430 5416 rc = PDMDevHlpPCIRegister(pDevIns, &pData->Dev); 5431 if ( VBOX_FAILURE(rc))5417 if (RT_FAILURE(rc)) 5432 5418 return rc; 5433 5419 /*AssertMsg(pData->Dev.devfn == 16 || iInstance != 0, ("pData->Dev.devfn=%d\n", pData->Dev.devfn));*/ … … 5436 5422 5437 5423 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0 /* iRegion */, pData->vram_size, PCI_ADDRESS_SPACE_MEM_PREFETCH, vgaR3IORegionMap); 5438 if ( VBOX_FAILURE(rc))5424 if (RT_FAILURE(rc)) 5439 5425 return rc; 5440 5426 … … 5443 5429 */ 5444 5430 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_REAL, vgaTimerRefresh, "VGA Refresh Timer", &pData->RefreshTimer); 5445 if ( VBOX_FAILURE(rc))5431 if (RT_FAILURE(rc)) 5446 5432 return rc; 5447 5433 … … 5450 5436 */ 5451 5437 rc = vgaAttach(pDevIns, 0 /* display LUN # */); 5452 if ( VBOX_FAILURE(rc))5438 if (RT_FAILURE(rc)) 5453 5439 return rc; 5454 5440 … … 5460 5446 5461 5447 rc = CFGMR3QueryU32(pCfgHandle, "HeightReduction", &cyReduction); 5462 if ( VBOX_SUCCESS(rc) && cyReduction)5448 if (RT_SUCCESS(rc) && cyReduction) 5463 5449 cb *= 2; /* Default mode list will be twice long */ 5464 5450 else … … 5466 5452 5467 5453 rc = CFGMR3QueryU32(pCfgHandle, "CustomVideoModes", &cCustomModes); 5468 if ( VBOX_SUCCESS(rc) && cCustomModes)5454 if (RT_SUCCESS(rc) && cCustomModes) 5469 5455 cb += sizeof(ModeInfoListItem) * cCustomModes; 5470 5456 else … … 5553 5539 RTStrPrintf(szExtraDataKey, sizeof(szExtraDataKey), "CustomVideoMode%d", i); 5554 5540 rc = CFGMR3QueryStringAlloc(pCfgHandle, szExtraDataKey, &pszExtraData); 5555 if ( VBOX_SUCCESS(rc))5541 if (RT_SUCCESS(rc)) 5556 5542 { 5557 5543 ModeInfoListItem *pDefMode = mode_info_list; … … 5647 5633 */ 5648 5634 rc = PDMDevHlpIOPortRegister(pDevIns, VBE_EXTRA_PORT, 1, NULL, vbeIOPortWriteVBEExtra, vbeIOPortReadVBEExtra, NULL, NULL, "VBE BIOS Extra Data"); 5649 if ( VBOX_FAILURE(rc))5635 if (RT_FAILURE(rc)) 5650 5636 return rc; 5651 5637 #endif … … 5655 5641 */ 5656 5642 rc = PDMDevHlpIOPortRegister(pDevIns, LOGO_IO_PORT, 1, NULL, vbeIOPortWriteCMDLogo, vbeIOPortReadCMDLogo, NULL, NULL, "BIOS Logo"); 5657 if ( VBOX_FAILURE(rc))5643 if (RT_FAILURE(rc)) 5658 5644 return rc; 5659 5645 … … 5666 5652 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 5667 5653 LogoHdr.fu8FadeIn = 1; 5668 else if ( VBOX_FAILURE(rc))5654 else if (RT_FAILURE(rc)) 5669 5655 return PDMDEV_SET_ERROR(pDevIns, rc, 5670 5656 N_("Configuration error: Querying \"FadeIn\" as integer failed")); … … 5673 5659 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 5674 5660 LogoHdr.fu8FadeOut = 1; 5675 else if ( VBOX_FAILURE(rc))5661 else if (RT_FAILURE(rc)) 5676 5662 return PDMDEV_SET_ERROR(pDevIns, rc, 5677 5663 N_("Configuration error: Querying \"FadeOut\" as integer failed")); … … 5680 5666 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 5681 5667 LogoHdr.u16LogoMillies = 0; 5682 else if ( VBOX_FAILURE(rc))5668 else if (RT_FAILURE(rc)) 5683 5669 return PDMDEV_SET_ERROR(pDevIns, rc, 5684 5670 N_("Configuration error: Querying \"LogoTime\" as integer failed")); … … 5691 5677 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 5692 5678 LogoHdr.fu8ShowBootMenu = 0; 5693 else if ( VBOX_FAILURE(rc))5679 else if (RT_FAILURE(rc)) 5694 5680 return PDMDEV_SET_ERROR(pDevIns, rc, 5695 5681 N_("Configuration error: Querying \"ShowBootMenu\" as integer failed")); … … 5701 5687 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 5702 5688 pData->pszLogoFile = NULL; 5703 else if ( VBOX_FAILURE(rc))5689 else if (RT_FAILURE(rc)) 5704 5690 return PDMDEV_SET_ERROR(pDevIns, rc, 5705 5691 N_("Configuration error: Querying \"LogoFile\" as a string failed")); … … 5719 5705 rc = RTFileOpen(&FileLogo, pData->pszLogoFile, 5720 5706 RTFILE_O_READ | RTFILE_O_OPEN | RTFILE_O_DENY_WRITE); 5721 if ( VBOX_SUCCESS(rc))5707 if (RT_SUCCESS(rc)) 5722 5708 { 5723 5709 uint64_t cbFile; 5724 5710 rc = RTFileGetSize(FileLogo, &cbFile); 5725 if ( VBOX_SUCCESS(rc))5711 if (RT_SUCCESS(rc)) 5726 5712 { 5727 5713 if (cbFile > 0 && cbFile < 32*_1M) … … 5731 5717 } 5732 5718 } 5733 if ( VBOX_FAILURE(rc))5719 if (RT_FAILURE(rc)) 5734 5720 { 5735 5721 /* … … 5771 5757 { 5772 5758 rc = RTFileRead(FileLogo, pLogoHdr + 1, LogoHdr.cbLogo, NULL); 5773 if ( VBOX_FAILURE(rc))5759 if (RT_FAILURE(rc)) 5774 5760 { 5775 5761 AssertMsgFailed(("RTFileRead(,,%d,NULL) -> %Vrc\n", LogoHdr.cbLogo, rc)); … … 5782 5768 5783 5769 rc = vbeParseBitmap(pData); 5784 if ( VBOX_FAILURE(rc))5770 if (RT_FAILURE(rc)) 5785 5771 { 5786 5772 AssertMsgFailed(("vbeParseBitmap() -> %Vrc\n", rc)); … … 5790 5776 5791 5777 rc = vbeParseBitmap(pData); 5792 if ( VBOX_FAILURE(rc))5778 if (RT_FAILURE(rc)) 5793 5779 AssertReleaseMsgFailed(("Internal bitmap failed! vbeParseBitmap() -> %Vrc\n", rc)); 5794 5780 … … 5827 5813 { 5828 5814 #ifdef VBE_NEW_DYN_LIST 5829 PVGASTATE pData = PDMINS 2DATA(pDevIns, PVGASTATE);5815 PVGASTATE pData = PDMINS_2_DATA(pDevIns, PVGASTATE); 5830 5816 LogFlow(("vgaR3Destruct:\n")); 5831 5817
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