vbox的更動 11264 路徑 trunk/src/VBox/Devices/PC
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- 2008-8-8 下午03:52:17 (16 年 以前)
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- 修改 1 筆資料
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trunk/src/VBox/Devices/PC/DevPIC.cpp
r11263 r11264 153 153 static inline void DumpPICState(PicState *s, const char *szFn) 154 154 { 155 PDEVPIC p Data= PDMINS_2_DATA(s->CTX_SUFF(pDevIns), PDEVPIC);155 PDEVPIC pThis = PDMINS_2_DATA(s->CTX_SUFF(pDevIns), PDEVPIC); 156 156 157 157 Log2(("%s: pic%d: elcr=%x last_irr=%x irr=%x imr=%x isr=%x irq_base=%x\n", 158 szFn, (&p Data->aPics[0] == s) ? 0 : 1,158 szFn, (&pThis->aPics[0] == s) ? 0 : 1, 159 159 s->elcr, s->last_irr, s->irr, s->imr, s->isr, s->irq_base)); 160 160 } 161 161 #else 162 # define DumpPICState(p Data, szFn) do { } while (0)162 # define DumpPICState(pThis, szFn) do { } while (0) 163 163 #endif 164 164 … … 240 240 /* raise irq to CPU if necessary. must be called every time the active 241 241 irq may change */ 242 static int pic_update_irq(PDEVPIC p Data)243 { 244 PicState *pics = &p Data->aPics[0];242 static int pic_update_irq(PDEVPIC pThis) 243 { 244 PicState *pics = &pThis->aPics[0]; 245 245 int irq2, irq; 246 246 … … 271 271 Log(("pic: cpu_interrupt\n")); 272 272 #endif 273 p Data->CTX_SUFF(pPicHlp)->pfnSetInterruptFF(pData->CTX_SUFF(pDevIns));273 pThis->CTX_SUFF(pPicHlp)->pfnSetInterruptFF(pThis->CTX_SUFF(pDevIns)); 274 274 } 275 275 else 276 276 { 277 STAM_COUNTER_INC(&p Data->StatClearedActiveIRQ2);277 STAM_COUNTER_INC(&pThis->StatClearedActiveIRQ2); 278 278 Log(("pic_update_irq: irq 2 is active, but no interrupt is pending on the slave pic!!\n")); 279 279 /* Clear it here, so lower priority interrupts can still be dispatched. */ 280 280 281 281 /* if this was the only pending irq, then we must clear the interrupt ff flag */ 282 p Data->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pData->CTX_SUFF(pDevIns));282 pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pThis->CTX_SUFF(pDevIns)); 283 283 284 284 /** @note Is this correct? */ … … 286 286 287 287 /* Call ourselves again just in case other interrupts are pending */ 288 return pic_update_irq(p Data);288 return pic_update_irq(pThis); 289 289 } 290 290 } … … 294 294 295 295 /* we must clear the interrupt ff flag */ 296 p Data->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pData->CTX_SUFF(pDevIns));296 pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pThis->CTX_SUFF(pDevIns)); 297 297 } 298 298 return VINF_SUCCESS; … … 300 300 301 301 /** @note if an interrupt line state changes from unmasked to masked, then it must be deactivated when currently pending! */ 302 static void pic_update_imr(PDEVPIC p Data, PicState *s, uint8_t val)302 static void pic_update_imr(PDEVPIC pThis, PicState *s, uint8_t val) 303 303 { 304 304 int irq, intno; … … 306 306 307 307 /* Query the current pending irq, if any. */ 308 pActivePIC = &p Data->aPics[0];308 pActivePIC = &pThis->aPics[0]; 309 309 intno = irq = pic_get_irq(pActivePIC); 310 310 if (irq == 2) 311 311 { 312 pActivePIC = &p Data->aPics[1];312 pActivePIC = &pThis->aPics[1]; 313 313 irq = pic_get_irq(pActivePIC); 314 314 intno = irq + 8; … … 323 323 { 324 324 Log(("pic_update_imr: pic0: elcr=%x last_irr=%x irr=%x imr=%x isr=%x irq_base=%x\n", 325 p Data->aPics[0].elcr, pData->aPics[0].last_irr, pData->aPics[0].irr, pData->aPics[0].imr, pData->aPics[0].isr, pData->aPics[0].irq_base));325 pThis->aPics[0].elcr, pThis->aPics[0].last_irr, pThis->aPics[0].irr, pThis->aPics[0].imr, pThis->aPics[0].isr, pThis->aPics[0].irq_base)); 326 326 Log(("pic_update_imr: pic1: elcr=%x last_irr=%x irr=%x imr=%x isr=%x irq_base=%x\n", 327 p Data->aPics[1].elcr, pData->aPics[1].last_irr, pData->aPics[1].irr, pData->aPics[1].imr, pData->aPics[1].isr, pData->aPics[1].irq_base));327 pThis->aPics[1].elcr, pThis->aPics[1].last_irr, pThis->aPics[1].irr, pThis->aPics[1].imr, pThis->aPics[1].isr, pThis->aPics[1].irq_base)); 328 328 329 329 /* Clear pending IRQ 2 on master controller in case of slave interrupt. */ … … 331 331 if (intno > 7) 332 332 { 333 p Data->aPics[0].irr &= ~(1 << 2);334 STAM_COUNTER_INC(&p Data->StatClearedActiveSlaveIRQ);333 pThis->aPics[0].irr &= ~(1 << 2); 334 STAM_COUNTER_INC(&pThis->StatClearedActiveSlaveIRQ); 335 335 } 336 336 else 337 STAM_COUNTER_INC(&p Data->StatClearedActiveMasterIRQ);337 STAM_COUNTER_INC(&pThis->StatClearedActiveMasterIRQ); 338 338 339 339 Log(("pic_update_imr: clear pending interrupt %d\n", intno)); 340 p Data->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pData->CTX_SUFF(pDevIns));340 pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pThis->CTX_SUFF(pDevIns)); 341 341 } 342 342 } … … 352 352 PDMBOTHCBDECL(void) picSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel) 353 353 { 354 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);355 Assert(p Data->CTX_SUFF(pDevIns) == pDevIns);356 Assert(p Data->aPics[0].CTX_SUFF(pDevIns) == pDevIns);357 Assert(p Data->aPics[1].CTX_SUFF(pDevIns) == pDevIns);354 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 355 Assert(pThis->CTX_SUFF(pDevIns) == pDevIns); 356 Assert(pThis->aPics[0].CTX_SUFF(pDevIns) == pDevIns); 357 Assert(pThis->aPics[1].CTX_SUFF(pDevIns) == pDevIns); 358 358 AssertMsg(iIrq < 16, ("iIrq=%d\n", iIrq)); 359 359 360 360 Log(("picSetIrq %d %d\n", iIrq, iLevel)); 361 DumpPICState(&p Data->aPics[0], "picSetIrq");362 DumpPICState(&p Data->aPics[1], "picSetIrq");363 STAM_COUNTER_INC(&p Data->CTXSUFF(StatSetIrq));364 pic_set_irq1(&p Data->aPics[iIrq >> 3], iIrq & 7, iLevel & PDM_IRQ_LEVEL_HIGH);365 pic_update_irq(p Data);361 DumpPICState(&pThis->aPics[0], "picSetIrq"); 362 DumpPICState(&pThis->aPics[1], "picSetIrq"); 363 STAM_COUNTER_INC(&pThis->CTXSUFF(StatSetIrq)); 364 pic_set_irq1(&pThis->aPics[iIrq >> 3], iIrq & 7, iLevel & PDM_IRQ_LEVEL_HIGH); 365 pic_update_irq(pThis); 366 366 if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP) 367 367 { 368 pic_set_irq1(&p Data->aPics[iIrq >> 3], iIrq & 7, 0);369 pic_update_irq(p Data);368 pic_set_irq1(&pThis->aPics[iIrq >> 3], iIrq & 7, 0); 369 pic_update_irq(pThis); 370 370 } 371 371 } … … 398 398 PDMBOTHCBDECL(int) picGetInterrupt(PPDMDEVINS pDevIns) 399 399 { 400 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);400 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 401 401 int irq; 402 402 int irq2; … … 404 404 405 405 /* read the irq from the PIC */ 406 DumpPICState(&p Data->aPics[0], "picGetInterrupt");407 DumpPICState(&p Data->aPics[1], "picGetInterrupt");408 409 irq = pic_get_irq(&p Data->aPics[0]);406 DumpPICState(&pThis->aPics[0], "picGetInterrupt"); 407 DumpPICState(&pThis->aPics[1], "picGetInterrupt"); 408 409 irq = pic_get_irq(&pThis->aPics[0]); 410 410 if (irq >= 0) 411 411 { 412 pic_intack(&p Data->aPics[0], irq);412 pic_intack(&pThis->aPics[0], irq); 413 413 if (irq == 2) 414 414 { 415 irq2 = pic_get_irq(&p Data->aPics[1]);415 irq2 = pic_get_irq(&pThis->aPics[1]); 416 416 if (irq2 >= 0) { 417 pic_intack(&p Data->aPics[1], irq2);417 pic_intack(&pThis->aPics[1], irq2); 418 418 } 419 419 else … … 423 423 irq2 = 7; 424 424 } 425 intno = p Data->aPics[1].irq_base + irq2;426 Log2(("picGetInterrupt1: %x base=%x irq=%x\n", intno, p Data->aPics[1].irq_base, irq2));425 intno = pThis->aPics[1].irq_base + irq2; 426 Log2(("picGetInterrupt1: %x base=%x irq=%x\n", intno, pThis->aPics[1].irq_base, irq2)); 427 427 irq = irq2 + 8; 428 428 } 429 429 else { 430 intno = p Data->aPics[0].irq_base + irq;431 Log2(("picGetInterrupt0: %x base=%x irq=%x\n", intno, p Data->aPics[0].irq_base, irq));430 intno = pThis->aPics[0].irq_base + irq; 431 Log2(("picGetInterrupt0: %x base=%x irq=%x\n", intno, pThis->aPics[0].irq_base, irq)); 432 432 } 433 433 } … … 437 437 AssertMsgFailed(("picGetInterrupt: spurious IRQ on master controller\n")); 438 438 irq = 7; 439 intno = p Data->aPics[0].irq_base + irq;440 } 441 pic_update_irq(p Data);442 443 Log(("picGetInterrupt: 0x%02x pending 0:%d 1:%d\n", intno, pic_get_irq(&p Data->aPics[0]), pic_get_irq(&pData->aPics[1])));439 intno = pThis->aPics[0].irq_base + irq; 440 } 441 pic_update_irq(pThis); 442 443 Log(("picGetInterrupt: 0x%02x pending 0:%d 1:%d\n", intno, pic_get_irq(&pThis->aPics[0]), pic_get_irq(&pThis->aPics[1]))); 444 444 445 445 return intno; … … 467 467 { 468 468 PicState *s = (PicState*)opaque; 469 PDEVPIC p Data= PDMINS_2_DATA(s->CTX_SUFF(pDevIns), PDEVPIC);469 PDEVPIC pThis = PDMINS_2_DATA(s->CTX_SUFF(pDevIns), PDEVPIC); 470 470 int rc = VINF_SUCCESS; 471 471 int priority, cmd, irq; … … 478 478 pic_reset(s); 479 479 /* deassert a pending interrupt */ 480 p Data->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pData->CTX_SUFF(pDevIns));480 pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pThis->CTX_SUFF(pDevIns)); 481 481 482 482 s->init_state = 1; … … 510 510 if (cmd == 5) 511 511 s->priority_add = (irq + 1) & 7; 512 rc = pic_update_irq(p Data);512 rc = pic_update_irq(pThis); 513 513 Assert(rc == VINF_SUCCESS); 514 514 DumpPICState(s, "eoi"); … … 521 521 Log(("pic_write: EOI2 for irq %d\n", irq)); 522 522 s->isr &= ~(1 << irq); 523 rc = pic_update_irq(p Data);523 rc = pic_update_irq(pThis); 524 524 Assert(rc == VINF_SUCCESS); 525 525 DumpPICState(s, "eoi2"); … … 530 530 s->priority_add = (val + 1) & 7; 531 531 Log(("pic_write: lowest priority %d (highest %d)\n", val & 7, s->priority_add)); 532 rc = pic_update_irq(p Data);532 rc = pic_update_irq(pThis); 533 533 Assert(rc == VINF_SUCCESS); 534 534 break; … … 540 540 s->isr &= ~(1 << irq); 541 541 s->priority_add = (irq + 1) & 7; 542 rc = pic_update_irq(p Data);542 rc = pic_update_irq(pThis); 543 543 Assert(rc == VINF_SUCCESS); 544 544 DumpPICState(s, "eoi3"); … … 555 555 { 556 556 /* normal mode */ 557 pic_update_imr(p Data, s, val);558 559 rc = pic_update_irq(p Data);557 pic_update_imr(pThis, s, val); 558 559 rc = pic_update_irq(pThis); 560 560 Assert(rc == VINF_SUCCESS); 561 561 break; … … 587 587 static uint32_t pic_poll_read (PicState *s, uint32_t addr1) 588 588 { 589 PDEVPIC p Data= PDMINS_2_DATA(s->CTX_SUFF(pDevIns), PDEVPIC);590 PicState *pics = &p Data->aPics[0];589 PDEVPIC pThis = PDMINS_2_DATA(s->CTX_SUFF(pDevIns), PDEVPIC); 590 PicState *pics = &pThis->aPics[0]; 591 591 int ret; 592 592 … … 602 602 s->isr &= ~(1 << ret); 603 603 if (addr1 >> 7 || ret != 2) 604 pic_update_irq(p Data);604 pic_update_irq(pThis); 605 605 } else { 606 606 ret = 0x07; 607 pic_update_irq(p Data);607 pic_update_irq(pThis); 608 608 } 609 609 … … 706 706 PDMBOTHCBDECL(int) picIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 707 707 { 708 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);708 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 709 709 uint32_t iPic = (uint32_t)(uintptr_t)pvUser; 710 710 … … 713 713 { 714 714 int rc; 715 PIC_LOCK(p Data, VINF_IOM_HC_IOPORT_READ);716 *pu32 = pic_ioport_read(&p Data->aPics[iPic], Port, &rc);717 PIC_UNLOCK(p Data);715 PIC_LOCK(pThis, VINF_IOM_HC_IOPORT_READ); 716 *pu32 = pic_ioport_read(&pThis->aPics[iPic], Port, &rc); 717 PIC_UNLOCK(pThis); 718 718 return rc; 719 719 } … … 734 734 PDMBOTHCBDECL(int) picIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 735 735 { 736 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);736 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 737 737 uint32_t iPic = (uint32_t)(uintptr_t)pvUser; 738 738 … … 742 742 { 743 743 int rc; 744 PIC_LOCK(p Data, VINF_IOM_HC_IOPORT_WRITE);745 rc = pic_ioport_write(&p Data->aPics[iPic], Port, u32);746 PIC_UNLOCK(p Data);744 PIC_LOCK(pThis, VINF_IOM_HC_IOPORT_WRITE); 745 rc = pic_ioport_write(&pThis->aPics[iPic], Port, u32); 746 PIC_UNLOCK(pThis); 747 747 return rc; 748 748 } … … 811 811 static DECLCALLBACK(void) picInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 812 812 { 813 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);813 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 814 814 815 815 /* … … 819 819 { 820 820 pHlp->pfnPrintf(pHlp, "PIC%d:\n", i); 821 pHlp->pfnPrintf(pHlp, " last_irr = %02x\n", p Data->aPics[i].last_irr);822 pHlp->pfnPrintf(pHlp, " irr = %02x\n", p Data->aPics[i].irr);823 pHlp->pfnPrintf(pHlp, " imr = %02x\n", p Data->aPics[i].imr);824 pHlp->pfnPrintf(pHlp, " isr = %02x\n", p Data->aPics[i].isr);825 pHlp->pfnPrintf(pHlp, " priority_add = %02x\n", p Data->aPics[i].priority_add);826 pHlp->pfnPrintf(pHlp, " irq_base = %02x\n", p Data->aPics[i].irq_base);827 pHlp->pfnPrintf(pHlp, " read_reg_select = %02x\n", p Data->aPics[i].read_reg_select);828 pHlp->pfnPrintf(pHlp, " poll = %02x\n", p Data->aPics[i].poll);829 pHlp->pfnPrintf(pHlp, " special_mask = %02x\n", p Data->aPics[i].special_mask);830 pHlp->pfnPrintf(pHlp, " init_state = %02x\n", p Data->aPics[i].init_state);831 pHlp->pfnPrintf(pHlp, " auto_eoi = %02x\n", p Data->aPics[i].auto_eoi);832 pHlp->pfnPrintf(pHlp, " rotate_on_auto_eoi = %02x\n", p Data->aPics[i].rotate_on_auto_eoi);833 pHlp->pfnPrintf(pHlp, " special_fully_nested_mode = %02x\n", p Data->aPics[i].special_fully_nested_mode);834 pHlp->pfnPrintf(pHlp, " init4 = %02x\n", p Data->aPics[i].init4);835 pHlp->pfnPrintf(pHlp, " elcr = %02x\n", p Data->aPics[i].elcr);836 pHlp->pfnPrintf(pHlp, " elcr_mask = %02x\n", p Data->aPics[i].elcr_mask);821 pHlp->pfnPrintf(pHlp, " last_irr = %02x\n", pThis->aPics[i].last_irr); 822 pHlp->pfnPrintf(pHlp, " irr = %02x\n", pThis->aPics[i].irr); 823 pHlp->pfnPrintf(pHlp, " imr = %02x\n", pThis->aPics[i].imr); 824 pHlp->pfnPrintf(pHlp, " isr = %02x\n", pThis->aPics[i].isr); 825 pHlp->pfnPrintf(pHlp, " priority_add = %02x\n", pThis->aPics[i].priority_add); 826 pHlp->pfnPrintf(pHlp, " irq_base = %02x\n", pThis->aPics[i].irq_base); 827 pHlp->pfnPrintf(pHlp, " read_reg_select = %02x\n", pThis->aPics[i].read_reg_select); 828 pHlp->pfnPrintf(pHlp, " poll = %02x\n", pThis->aPics[i].poll); 829 pHlp->pfnPrintf(pHlp, " special_mask = %02x\n", pThis->aPics[i].special_mask); 830 pHlp->pfnPrintf(pHlp, " init_state = %02x\n", pThis->aPics[i].init_state); 831 pHlp->pfnPrintf(pHlp, " auto_eoi = %02x\n", pThis->aPics[i].auto_eoi); 832 pHlp->pfnPrintf(pHlp, " rotate_on_auto_eoi = %02x\n", pThis->aPics[i].rotate_on_auto_eoi); 833 pHlp->pfnPrintf(pHlp, " special_fully_nested_mode = %02x\n", pThis->aPics[i].special_fully_nested_mode); 834 pHlp->pfnPrintf(pHlp, " init4 = %02x\n", pThis->aPics[i].init4); 835 pHlp->pfnPrintf(pHlp, " elcr = %02x\n", pThis->aPics[i].elcr); 836 pHlp->pfnPrintf(pHlp, " elcr_mask = %02x\n", pThis->aPics[i].elcr_mask); 837 837 } 838 838 } … … 848 848 static DECLCALLBACK(int) picSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 849 849 { 850 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);851 pic_save(pSSMHandle, &p Data->aPics[0]);852 pic_save(pSSMHandle, &p Data->aPics[1]);850 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 851 pic_save(pSSMHandle, &pThis->aPics[0]); 852 pic_save(pSSMHandle, &pThis->aPics[1]); 853 853 return VINF_SUCCESS; 854 854 } … … 865 865 static DECLCALLBACK(int) picLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, uint32_t u32Version) 866 866 { 867 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);868 int rc = pic_load(pSSMHandle, &p Data->aPics[0], u32Version);867 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 868 int rc = pic_load(pSSMHandle, &pThis->aPics[0], u32Version); 869 869 if (RT_SUCCESS(rc)) 870 rc = pic_load(pSSMHandle, &p Data->aPics[1], u32Version);870 rc = pic_load(pSSMHandle, &pThis->aPics[1], u32Version); 871 871 return rc; 872 872 } … … 883 883 static DECLCALLBACK(void) picReset(PPDMDEVINS pDevIns) 884 884 { 885 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);885 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 886 886 unsigned i; 887 887 LogFlow(("picReset:\n")); 888 p Data->pPicHlpR3->pfnLock(pDevIns, VERR_INTERNAL_ERROR);889 890 for (i = 0; i < RT_ELEMENTS(p Data->aPics); i++)891 pic_reset(&p Data->aPics[i]);892 893 PIC_UNLOCK(p Data);888 pThis->pPicHlpR3->pfnLock(pDevIns, VERR_INTERNAL_ERROR); 889 890 for (i = 0; i < RT_ELEMENTS(pThis->aPics); i++) 891 pic_reset(&pThis->aPics[i]); 892 893 PIC_UNLOCK(pThis); 894 894 } 895 895 … … 900 900 static DECLCALLBACK(void) picRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 901 901 { 902 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);902 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 903 903 unsigned i; 904 904 905 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);906 p Data->pPicHlpRC = pData->pPicHlpR3->pfnGetRCHelpers(pDevIns);907 for (i = 0; i < RT_ELEMENTS(p Data->aPics); i++)908 p Data->aPics[i].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);905 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 906 pThis->pPicHlpRC = pThis->pPicHlpR3->pfnGetRCHelpers(pDevIns); 907 for (i = 0; i < RT_ELEMENTS(pThis->aPics); i++) 908 pThis->aPics[i].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 909 909 } 910 910 … … 915 915 static DECLCALLBACK(int) picConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 916 916 { 917 PDEVPIC p Data= PDMINS_2_DATA(pDevIns, PDEVPIC);917 PDEVPIC pThis = PDMINS_2_DATA(pDevIns, PDEVPIC); 918 918 PDMPICREG PicReg; 919 919 int rc; … … 943 943 * Init the data. 944 944 */ 945 Assert(RT_ELEMENTS(p Data->aPics) == 2);946 p Data->pDevInsR3 = pDevIns;947 p Data->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);948 p Data->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);949 p Data->aPics[0].elcr_mask = 0xf8;950 p Data->aPics[1].elcr_mask = 0xde;951 p Data->aPics[0].pDevInsR3 = pDevIns;952 p Data->aPics[1].pDevInsR3 = pDevIns;953 p Data->aPics[0].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);954 p Data->aPics[1].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);955 p Data->aPics[0].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);956 p Data->aPics[1].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);945 Assert(RT_ELEMENTS(pThis->aPics) == 2); 946 pThis->pDevInsR3 = pDevIns; 947 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 948 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 949 pThis->aPics[0].elcr_mask = 0xf8; 950 pThis->aPics[1].elcr_mask = 0xde; 951 pThis->aPics[0].pDevInsR3 = pDevIns; 952 pThis->aPics[1].pDevInsR3 = pDevIns; 953 pThis->aPics[0].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 954 pThis->aPics[1].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 955 pThis->aPics[0].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 956 pThis->aPics[1].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 957 957 958 958 /* … … 986 986 987 987 Assert(pDevIns->pDevHlp->pfnPICRegister); 988 rc = pDevIns->pDevHlp->pfnPICRegister(pDevIns, &PicReg, &p Data->pPicHlpR3);988 rc = pDevIns->pDevHlp->pfnPICRegister(pDevIns, &PicReg, &pThis->pPicHlpR3); 989 989 AssertLogRelMsgRCReturn(rc, ("PICRegister -> %Vrc\n", rc), rc); 990 990 if (fGCEnabled) 991 p Data->pPicHlpRC = pData->pPicHlpR3->pfnGetRCHelpers(pDevIns);991 pThis->pPicHlpRC = pThis->pPicHlpR3->pfnGetRCHelpers(pDevIns); 992 992 if (fR0Enabled) 993 p Data->pPicHlpR0 = pData->pPicHlpR3->pfnGetR0Helpers(pDevIns);993 pThis->pPicHlpR0 = pThis->pPicHlpR3->pfnGetR0Helpers(pDevIns); 994 994 995 995 … … 1022 1022 } 1023 1023 1024 rc = PDMDevHlpIOPortRegister(pDevIns, 0x4d0, 1, &p Data->aPics[0],1024 rc = PDMDevHlpIOPortRegister(pDevIns, 0x4d0, 1, &pThis->aPics[0], 1025 1025 picIOPortElcrWrite, picIOPortElcrRead, NULL, NULL, "i8259 PIC #0 - elcr"); 1026 1026 if (RT_FAILURE(rc)) 1027 1027 return rc; 1028 rc = PDMDevHlpIOPortRegister(pDevIns, 0x4d1, 1, &p Data->aPics[1],1028 rc = PDMDevHlpIOPortRegister(pDevIns, 0x4d1, 1, &pThis->aPics[1], 1029 1029 picIOPortElcrWrite, picIOPortElcrRead, NULL, NULL, "i8259 PIC #1 - elcr"); 1030 1030 if (RT_FAILURE(rc)) … … 1055 1055 } 1056 1056 1057 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 1 /* version */, sizeof(*p Data),1057 rc = PDMDevHlpSSMRegister(pDevIns, pDevIns->pDevReg->szDeviceName, iInstance, 1 /* version */, sizeof(*pThis), 1058 1058 NULL, picSaveExec, NULL, 1059 1059 NULL, picLoadExec, NULL); … … 1078 1078 * Statistics. 1079 1079 */ 1080 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatSetIrqGC, STAMTYPE_COUNTER, "/PDM/PIC/SetIrqGC", STAMUNIT_OCCURENCES, "Number of PIC SetIrq calls in GC.");1081 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatSetIrqHC, STAMTYPE_COUNTER, "/PDM/PIC/SetIrqHC", STAMUNIT_OCCURENCES, "Number of PIC SetIrq calls in HC.");1082 1083 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatClearedActiveIRQ2, STAMTYPE_COUNTER, "/PDM/PIC/Masked/ActiveIRQ2", STAMUNIT_OCCURENCES, "Number of cleared irq 2.");1084 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatClearedActiveMasterIRQ, STAMTYPE_COUNTER, "/PDM/PIC/Masked/ActiveMaster", STAMUNIT_OCCURENCES, "Number of cleared master irqs.");1085 PDMDevHlpSTAMRegister(pDevIns, &p Data->StatClearedActiveSlaveIRQ, STAMTYPE_COUNTER, "/PDM/PIC/Masked/ActiveSlave", STAMUNIT_OCCURENCES, "Number of cleared slave irqs.");1080 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatSetIrqGC, STAMTYPE_COUNTER, "/PDM/PIC/SetIrqGC", STAMUNIT_OCCURENCES, "Number of PIC SetIrq calls in GC."); 1081 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatSetIrqHC, STAMTYPE_COUNTER, "/PDM/PIC/SetIrqHC", STAMUNIT_OCCURENCES, "Number of PIC SetIrq calls in HC."); 1082 1083 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveIRQ2, STAMTYPE_COUNTER, "/PDM/PIC/Masked/ActiveIRQ2", STAMUNIT_OCCURENCES, "Number of cleared irq 2."); 1084 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveMasterIRQ, STAMTYPE_COUNTER, "/PDM/PIC/Masked/ActiveMaster", STAMUNIT_OCCURENCES, "Number of cleared master irqs."); 1085 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveSlaveIRQ, STAMTYPE_COUNTER, "/PDM/PIC/Masked/ActiveSlave", STAMUNIT_OCCURENCES, "Number of cleared slave irqs."); 1086 1086 #endif 1087 1087
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