儲存庫 vbox 的更動 12090

時間撮記:

2008-9-4 下午12:51:46 (16 年 以前)

作者:

vboxsync

訊息:

Started with hardware debug register support.
Fixed out of sync tr/ldtr/gdtr/idtr in AMD-V & VT-x.

位置:

trunk/src/VBox/VMM

檔案:

• HWACCMInternal.h (修改) (1 筆差異)
• VMMR0/HWACCMR0.cpp (修改) (2 筆差異)
• VMMR0/HWSVMR0.cpp (修改) (3 筆差異)
• VMMR0/HWVMXR0.cpp (修改) (4 筆差異)

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -375 +375 @@
     /** Currenty shadow paging mode. */
     PGMMODE                 enmShadowMode;
+
+
+#ifdef VBOX_SAVE_HOST_DEBUG_REGISTERS
+    struct
+    {
+        /* Saved host debug registers. */
+        uint64_t                dr0, dr1, dr2, dr3, dr6, dr7;
+        bool                    fHostDR7Saved;
+    } savedhoststate;
+#endif
 
     STAMPROFILEADV          StatEntry;

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -744 +744 @@
     CPUMDeactivateGuestFPUState(pVM);
 
+#ifdef VBOX_WITH_DEBUG_REGISTER_SUPPORT
+    /*
+     * Check if host debug registers are armed. All context switches set DR7 back to 0x400.
+     */
+    uint64_t u64DR7 = ASMGetDR7();
+    if (u32DR7 & X86_DR7_ENABLED_MASK)
+    {
+        pVM->hwaccm.s.savedhoststate.dr7  = u64DR7;
+        pVM->hwaccm.s.savedhoststate.fHostDR7Saved = true;
+    }
+    else
+        pVM->hwaccm.s.savedhoststate.fHostDR7Saved = false;
+#endif
+
     /* Always reload the host context and the guest's CR0 register. (!!!!) */
     pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0 | HWACCM_CHANGED_HOST_CONTEXT;
@@ -791 +805 @@
         pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0;
     }
+
+#ifdef VBOX_WITH_DEBUG_REGISTER_SUPPORT
+    if (pVM->hwaccm.s.savedhoststate.fHostDR7Saved)
+    {
+        ASMSetDR7(pVM->hwaccm.s.savedhoststate.dr7);
+        pVM->hwaccm.s.savedhoststate.fHostDR7Saved = false;
+    }
+#endif
 
     return HWACCMR0Globals.pfnLeaveSession(pVM);

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -1169 +1169 @@
     pCtx->SysEnter.esp      = pVMCB->guest.u64SysEnterESP;
 
+    /* Remaining guest CPU context: TR, IDTR, GDTR, LDTR; must sync everything otherwise we can get out of sync when jumping to ring 3. */
+    SVM_READ_SELREG(LDTR, ldtr);
+    SVM_READ_SELREG(TR, tr);
+
+    pCtx->gdtr.cbGdt        = pVMCB->guest.GDTR.u32Limit;
+    pCtx->gdtr.pGdt         = pVMCB->guest.GDTR.u64Base;
+
+    pCtx->idtr.cbIdt        = pVMCB->guest.IDTR.u32Limit;
+    pCtx->idtr.pIdt         = pVMCB->guest.IDTR.u64Base;
+
     /* Note: no reason to sync back the CRx and DRx registers. They can't be changed by the guest. */
     /* Note: only in the nested paging case can CR3 & CR4 be changed by the guest. */
@@ -1656 +1666 @@
         {
             /* EIP has been updated already. */
+            pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_DEBUG;
 
             /* Only resume if successful. */
@@ -1880 +1891 @@
 
 end:
-    if (fGuestStateSynced)
-    {
-        /* Remaining guest CPU context: TR, IDTR, GDTR, LDTR. */
-        SVM_READ_SELREG(LDTR, ldtr);
-        SVM_READ_SELREG(TR, tr);
-
-        pCtx->gdtr.cbGdt        = pVMCB->guest.GDTR.u32Limit;
-        pCtx->gdtr.pGdt         = pVMCB->guest.GDTR.u64Base;
-
-        pCtx->idtr.cbIdt        = pVMCB->guest.IDTR.u32Limit;
-        pCtx->idtr.pIdt         = pVMCB->guest.IDTR.u64Base;
-    }
 
     /* Signal changes for the recompiler. */

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -1145 +1145 @@
 #endif
 
-#if 0
-    /*
-     * Check if debug registers are armed.
-     */
-    uint32_t u32DR7 = ASMGetDR7();
-    if (u32DR7 & X86_DR7_ENABLED_MASK)
-    {
-        pVM->cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HOST;
-    }
-    else
-        pVM->cpum.s.fUseFlags &= ~CPUM_USE_DEBUG_REGS_HOST;
-#endif
-
     /* We can jump to this point to resume execution after determining that a VM-exit is innocent.
      */
@@ -1542 +1529 @@
     VMXReadVMCS(VMX_VMCS_GUEST_SYSENTER_ESP,     &val);
     pCtx->SysEnter.esp      = val;
+
+    /* Misc. registers; must sync everything otherwise we can get out of sync when jumping to ring 3. */
+    VMX_READ_SELREG(LDTR, ldtr);
+    VMX_READ_SELREG(TR, tr);
+
+    VMXReadVMCS(VMX_VMCS_GUEST_GDTR_LIMIT,       &val);
+    pCtx->gdtr.cbGdt        = val;
+    VMXReadVMCS(VMX_VMCS_GUEST_GDTR_BASE,        &val);
+    pCtx->gdtr.pGdt         = val;
+
+    VMXReadVMCS(VMX_VMCS_GUEST_IDTR_LIMIT,       &val);
+    pCtx->idtr.cbIdt        = val;
+    VMXReadVMCS(VMX_VMCS_GUEST_IDTR_BASE,        &val);
+    pCtx->idtr.pIdt         = val;
 
     /** @note NOW IT'S SAFE FOR LOGGING! */
@@ -1950 +1951 @@
                                      VMX_EXIT_QUALIFICATION_DRX_REGISTER(exitQualification),
                                      VMX_EXIT_QUALIFICATION_DRX_GENREG(exitQualification));
+            pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_DEBUG;
             Log2(("DR7=%08x\n", pCtx->dr7));
         }
@@ -2221 +2223 @@
     }
 end:
-    if (fGuestStateSynced)
-    {
-        /* Remaining guest CPU context: TR, IDTR, GDTR, LDTR. */
-        VMX_READ_SELREG(LDTR, ldtr);
-        VMX_READ_SELREG(TR, tr);
-
-        VMXReadVMCS(VMX_VMCS_GUEST_GDTR_LIMIT,       &val);
-        pCtx->gdtr.cbGdt        = val;
-        VMXReadVMCS(VMX_VMCS_GUEST_GDTR_BASE,        &val);
-        pCtx->gdtr.pGdt         = val;
-
-        VMXReadVMCS(VMX_VMCS_GUEST_IDTR_LIMIT,       &val);
-        pCtx->idtr.cbIdt        = val;
-        VMXReadVMCS(VMX_VMCS_GUEST_IDTR_BASE,        &val);
-        pCtx->idtr.pIdt         = val;
-    }
 
     /* Signal changes for the recompiler. */