vbox的更動 12598 路徑 trunk/src/VBox/Devices/PC
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- 2008-9-19 上午11:50:47 (16 年 以前)
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trunk/src/VBox/Devices/PC/DevAPIC.cpp
r12588 r12598 79 79 80 80 /** @def FIRST_LAPIC 81 * Return address of first LAPIC state. If this macro is use - it's probably 82 * something wrong or fishy with the code using it, unless explained. */ 81 * Return address of first LAPIC state. */ 83 82 #define FIRST_LAPIC(pThis) ((APICState*)(pThis)->CTX_SUFF(pLapics)) 83 84 #define FOR_EACH_LAPIC(dev, code) \ 85 do { \ 86 uint32_t i; \ 87 APICState* apic = FIRST_LAPIC(dev); \ 88 for (i=0; i < dev->cCpus; i++) \ 89 { \ 90 code; \ 91 apic++; \ 92 } \ 93 } while (0) 94 95 # define set_bit(pvBitmap, iBit) ASMBitSet(pvBitmap, iBit) 96 # define reset_bit(pvBitmap, iBit) ASMBitClear(pvBitmap, iBit) 97 # define fls_bit(value) (ASMBitLastSetU32(value) - 1) 98 # define ffs_bit(value) (ASMBitFirstSetU32(value) - 1) 84 99 85 100 #endif /* VBOX */ … … 227 242 typedef struct 228 243 { 244 /** @todo: APIC timer must be per-APIC */ 229 245 /** The device instance - R3 Ptr. */ 230 246 PPDMDEVINSR3 pDevInsR3; … … 257 273 uint32_t ulTPRPatchAttempts; 258 274 259 /** Number of LAPICs on the system (same as CPUcount). */275 /** Number of CPUs on the system (same as LAPIC count). */ 260 276 uint32_t cCpus; 261 277 … … 289 305 290 306 #ifdef VBOX 291 static uint32_t apic_get_delivery_bitmask(APIC State *s, uint8_t dest, uint8_t dest_mode);307 static uint32_t apic_get_delivery_bitmask(APICDeviceInfo* dev, APICState *s, uint8_t dest, uint8_t dest_mode); 292 308 __BEGIN_DECLS 293 309 PDMBOTHCBDECL(int) apicMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb); … … 327 343 switch (delivery_mode) { 328 344 case APIC_DM_LOWPRI: 345 #ifndef VBOX 346 /* XXX: search for focus processor, arbitration */ 347 { 348 int i, d; 349 d = -1; 350 for(i = 0; i < MAX_APIC_WORDS; i++) { 351 if (deliver_bitmask[i]) { 352 d = i * 32 + ffs_bit(deliver_bitmask[i]); 353 break; 354 } 355 } 356 if (d >= 0) { 357 apic_iter = local_apics[d]; 358 if (apic_iter) { 359 apic_set_irq(apic_iter, vector_num, trigger_mode); 360 } 361 } 362 } 363 #else 364 { 365 int d = -1; 366 if (deliver_bitmask) 367 d = ffs_bit(deliver_bitmask); 368 if (d >= 0) 369 { 370 APICState* apic = FIRST_LAPIC(dev) + d; 371 apic_set_irq(dev, apic, vector_num, trigger_mode); 372 } 373 } 374 #endif 375 return; 329 376 case APIC_DM_FIXED: 330 377 /* XXX: arbitration */ … … 504 551 LogFlow(("apicBusDeliverCallback: s=%p pDevIns=%p u8Dest=%#x u8DestMode=%#x u8DeliveryMode=%#x iVector=%#x u8Polarity=%#x u8TriggerMode=%#x\n", 505 552 s, pDevIns, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode)); 506 apic_bus_deliver(dev, s, apic_get_delivery_bitmask( s, u8Dest, u8DestMode),553 apic_bus_deliver(dev, s, apic_get_delivery_bitmask(dev, s, u8Dest, u8DestMode), 507 554 u8DeliveryMode, iVector, u8Polarity, u8TriggerMode); 508 555 } 509 510 # define set_bit(pvBitmap, iBit) ASMBitSet(pvBitmap, iBit)511 # define reset_bit(pvBitmap, iBit) ASMBitClear(pvBitmap, iBit)512 # define fls_bit(value) (ASMBitLastSetU32(value) - 1)513 556 514 557 #endif /* VBOX */ … … 654 697 static uint32_t apic_get_delivery_bitmask(uint8_t dest, uint8_t dest_mode) 655 698 #else /* VBOX */ 656 static uint32_t apic_get_delivery_bitmask(APIC State *s, uint8_t dest, uint8_t dest_mode)699 static uint32_t apic_get_delivery_bitmask(APICDeviceInfo *dev, APICState *s, uint8_t dest, uint8_t dest_mode) 657 700 #endif /* VBOX */ 658 701 { 702 #if 0 659 703 uint32_t mask = 0; 660 704 #ifndef VBOX … … 682 726 683 727 return mask; 684 } 685 728 #else 729 uint32_t mask = 0; 730 731 if (dest_mode == 0) 732 { 733 if (dest == 0xff) 734 mask = 0xff; 735 else 736 mask = 1 << dest; 737 } 738 else 739 { 740 APICState *apic = FIRST_LAPIC(dev); 741 uint32_t i; 742 743 /* XXX: cluster mode */ 744 for(i = 0; i < dev->cCpus; i++) 745 { 746 if (apic->dest_mode == 0xf) 747 { 748 if (dest & apic->log_dest) 749 mask |= (1 << apic->id); 750 } 751 else if (apic->dest_mode == 0x0) 752 { 753 if ((dest & 0xf0) == (apic->log_dest & 0xf0) 754 && 755 (dest & apic->log_dest & 0x0f)) 756 { 757 mask |= (1 << i); 758 } 759 } 760 } 761 apic++; 762 } 763 764 return mask; 765 #endif 766 } 686 767 687 768 static void apic_init_ipi(APICState *s) … … 709 790 } 710 791 792 793 /* send a SIPI message to the CPU to start it */ 794 static void apic_startup(APICDeviceInfo* dev, APICState *s, int vector_num) 795 { 796 #ifndef VBOX 797 CPUState *env = s->cpu_env; 798 if (!env->halted) 799 return; 800 env->eip = 0; 801 cpu_x86_load_seg_cache(env, R_CS, vector_num << 8, vector_num << 12, 802 0xffff, 0); 803 env->halted = 0; 804 #else 805 /** @todo: init CPUs */ 806 LogRel(("[SMP] apic_startup: %d on CPUs %d\n", vector_num, s->id)); 807 #endif 808 } 711 809 static void apic_deliver(APICDeviceInfo* dev, APICState *s, 712 810 uint8_t dest, uint8_t dest_mode, … … 721 819 722 820 LogFlow(("apic_deliver dest=%x dest_mode=%x delivery_mode=%x vector_num=%x polarity=%x trigger_mode=%x\n", dest, dest_mode, delivery_mode, vector_num, polarity, trigger_mode)); 821 822 switch (dest_shorthand) { 823 case 0: 824 #ifndef VBOX 825 deliver_bitmask = apic_get_delivery_bitmask(dest, dest_mode); 826 #else /* VBOX */ 827 deliver_bitmask = apic_get_delivery_bitmask(dev, s, dest, dest_mode); 828 #endif /* !VBOX */ 829 break; 830 case 1: 831 deliver_bitmask = (1 << s->id); 832 break; 833 case 2: 834 deliver_bitmask = 0xffffffff; 835 break; 836 case 3: 837 deliver_bitmask = 0xffffffff & ~(1 << s->id); 838 break; 839 } 840 723 841 switch (delivery_mode) { 724 842 case APIC_DM_LOWPRI: … … 732 850 if (level == 0 && trig_mode == 1) { 733 851 #ifdef VBOX 734 if (deliver_bitmask & (1 << s->id)) { 735 s->arb_id = s->id; 736 } 852 FOR_EACH_LAPIC(dev, 853 if (deliver_bitmask & (1 << apic->id)) 854 { 855 apic->arb_id = apic->id; 856 }); 737 857 #else /* !VBOX */ 738 858 for (apic_iter = first_local_apic; apic_iter != NULL; … … 757 877 } 758 878 } 879 #else 880 FOR_EACH_LAPIC(dev, apic_startup(dev, apic, vector_num)); 759 881 #endif /* !VBOX */ 760 882 return; 761 }762 763 switch (dest_shorthand) {764 case 0:765 #ifndef VBOX766 deliver_bitmask = apic_get_delivery_bitmask(dest, dest_mode);767 #else /* VBOX */768 deliver_bitmask = apic_get_delivery_bitmask(s, dest, dest_mode);769 #endif /* !VBOX */770 break;771 case 1:772 deliver_bitmask = (1 << s->id);773 break;774 case 2:775 deliver_bitmask = 0xffffffff;776 break;777 case 3:778 deliver_bitmask = 0xffffffff & ~(1 << s->id);779 break;780 883 } 781 884 … … 801 904 int intno; 802 905 803 /* if the APIC is installed or enabled, we let the 8259 handle the906 /* if the APIC is not installed or enabled, we let the 8259 handle the 804 907 IRQs */ 805 908 if (!s) { … … 965 1068 val = apic_get_ppr(s); 966 1069 break; 967 #ifdef VBOX968 1070 case 0x0b: 969 1071 Log(("apic_mem_readl %x %x -> write only returning 0\n", addr, index)); 970 1072 val = 0; 971 1073 break; 972 #endif973 974 1074 case 0x0d: 975 1075 val = s->log_dest << 24; … … 1567 1667 #endif 1568 1668 1669 /** @todo: add LAPIC range validity checks (multiple LAPICs can theoretically have 1670 different physical addresses, see #3092) */ 1671 1569 1672 STAM_COUNTER_INC(&CTXSUFF(dev->StatMMIORead)); 1570 1673 switch (cb) … … 1613 1716 APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *); 1614 1717 APICState *s = getLAPIC(dev); 1718 1719 /** @todo: add LAPIC range validity checks (multiple LAPICs can theoretically have 1720 different physical addresses, see #3092) */ 1615 1721 1616 1722 STAM_COUNTER_INC(&CTXSUFF(dev->StatMMIOWrite)); … … 1774 1880 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 1775 1881 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 1882 pThis->cCpus = cCpus; 1776 1883 1777 1884 PVM pVM = PDMDevHlpGetVM(pDevIns); 1778 1779 1885 /* 1780 1886 * We are not freeing this memory, as it's automatically released when guest exits. … … 1785 1891 pThis->pLapicsR0 = MMHyperR3ToR0(pVM, pThis->pLapicsR3); 1786 1892 pThis->pLapicsRC = MMHyperR3ToRC(pVM, pThis->pLapicsR3); 1787 1893 1788 1894 for (i = 0; i < cCpus; i++) 1789 1895 {
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