儲存庫 vbox 的更動 15291

時間撮記:

2008-12-11 上午08:22:18 (16 年 以前)

作者:

vboxsync

訊息:

Flush pending writes when leaving ring 0.

位置:

trunk/src/VBox/VMM/VMMR0

檔案:

• HWVMXR0.cpp (修改) (3 筆差異)
• HWVMXR0.h (修改) (1 筆差異)

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -1861 +1861 @@
 
 #ifdef VBOX_STRICT
-
-# ifdef VMX_USE_CACHED_VMCS_ACCESSES
-    {
-        PVMCSCACHE pCache = &pVCpu->hwaccm.s.vmx.VMCSCache;
-        /* Flush the queued writes first. */
-        for (unsigned i=0;i<pCache->Write.cValidEntries;i++)
-        {
-            VMXWriteVMCS(pCache->Write.aField[i], pCache->Write.aFieldVal[i]);
-        }
-        pCache->Write.cValidEntries = 0;
-    }
-# endif
+    VMXFlushWriteCache(pVCpu);
 
     rc = VMXReadVMCS(VMX_VMCS_CTRL_PIN_EXEC_CONTROLS, &val);
@@ -3226 +3215 @@
         Assert(pVCpu->hwaccm.s.vmx.proc_ctls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MOV_DR_EXIT);
 
+    /* Flush all pending VMCS writes. */
+    VMXFlushWriteCache(pVCpu);
+
     /* Clear VM Control Structure. Marking it inactive, clearing implementation specific data and writing back VMCS data to memory. */
     int rc = VMXClearVMCS(pVCpu->hwaccm.s.vmx.pVMCSPhys);
@@ -3593 +3585 @@
 
 
+#ifdef VMX_USE_CACHED_VMCS_ACCESSES
+/**
+ * Flush the write cache in order not to overflow it with frequent ring switches.
+ *
+ * @param   pVCpu       The VMCPU to operate on.
+ */
+VMMR0DECL(void) VMXFlushWriteCache(PVMCPU pVCpu)
+{
+    PVMCSCACHE pCache = &pVCpu->hwaccm.s.vmx.VMCSCache;
+    /* Flush the queued writes first. */
+    for (unsigned i=0;i<pCache->Write.cValidEntries;i++)
+        VMXWriteVMCS(pCache->Write.aField[i], pCache->Write.aFieldVal[i]);
+
+    pCache->Write.cValidEntries = 0;
+}
+#endif

trunk/src/VBox/VMM/VMMR0/HWVMXR0.h

@@ -284 +284 @@
     return VINF_SUCCESS;
 }
+
+/**
+ * Flush the write cache in order not to overflow it with frequent ring switches.
+ *
+ * @param   pVCpu       The VMCPU to operate on.
+ */
+VMMR0DECL(void) VMXFlushWriteCache(PVMCPU pVCpu);
+
+#else
+# define VMXFlushWriteCache(a)     do { } while (0)
 #endif