儲存庫 vbox 的更動 19015

時間撮記:

2009-4-20 上午07:54:29 (16 年 以前)

作者:

vboxsync

訊息:

Split up TRPM. (guest SMP)

位置:

trunk

檔案:

• include/VBox/trpm.h (修改) (1 筆差異)
• include/VBox/vm.h (修改) (1 筆差異)
• src/VBox/VMM/EM.cpp (修改) (9 筆差異)
• src/VBox/VMM/PDMLdr.cpp (修改) (1 筆差異)
• src/VBox/VMM/TRPM.cpp (修改) (9 筆差異)
• src/VBox/VMM/TRPMInternal.h (修改) (4 筆差異)
• src/VBox/VMM/TRPMInternal.mac (修改) (2 筆差異)
• src/VBox/VMM/VMMAll/EMAll.cpp (修改) (12 筆差異)
• src/VBox/VMM/VMMAll/IOMAll.cpp (修改) (4 筆差異)
• src/VBox/VMM/VMMAll/PGMAllBth.h (修改) (6 筆差異)
• src/VBox/VMM/VMMAll/PGMAllPhys.cpp (修改) (3 筆差異)
• src/VBox/VMM/VMMAll/TRPMAll.cpp (修改) (26 筆差異)
• src/VBox/VMM/VMMGC/MMRamGC.cpp (修改) (6 筆差異)
• src/VBox/VMM/VMMGC/TRPMGC.cpp (修改) (1 筆差異)
• src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp (修改) (26 筆差異)
• src/VBox/VMM/VMMGC/TRPMGCHandlersA.asm (修改) (8 筆差異)
• src/VBox/VMM/VMMGC/VMMGCBuiltin.def (修改) (1 筆差異)
• src/VBox/VMM/VMMGuruMeditation.cpp (修改) (1 筆差異)
• src/VBox/VMM/VMMR0/HWSVMR0.cpp (修改) (13 筆差異)
• src/VBox/VMM/VMMR0/HWVMXR0.cpp (修改) (13 筆差異)
• src/VBox/VMM/VMMR0/TRPMR0.cpp (修改) (2 筆差異)
• src/VBox/VMM/VMMTests.cpp (修改) (1 筆差異)
• src/VBox/VMM/testcase/tstVMStructGC.cpp (修改) (1 筆差異)
• src/VBox/VMM/testcase/tstVMStructSize.cpp (修改) (1 筆差異)
• src/recompiler_new/VBoxREMWrapper.cpp (修改) (3 筆差異)
• src/recompiler_new/VBoxRecompiler.c (修改) (4 筆差異)

trunk/include/VBox/trpm.h

@@ -74 +74 @@
 #define TRPM_INVALID_HANDLER        0
 
-VMMDECL(int)        TRPMQueryTrap(PVM pVM, uint8_t *pu8TrapNo, PTRPMEVENT pEnmType);
-VMMDECL(uint8_t)    TRPMGetTrapNo(PVM pVM);
-VMMDECL(RTGCUINT)   TRPMGetErrorCode(PVM pVM);
-VMMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVM pVM);
-VMMDECL(int)        TRPMResetTrap(PVM pVM);
-VMMDECL(int)        TRPMAssertTrap(PVM pVM, uint8_t u8TrapNo, TRPMEVENT enmType);
-VMMDECL(void)       TRPMSetErrorCode(PVM pVM, RTGCUINT uErrorCode);
-VMMDECL(void)       TRPMSetFaultAddress(PVM pVM, RTGCUINTPTR uCR2);
-VMMDECL(bool)       TRPMIsSoftwareInterrupt(PVM pVM);
-VMMDECL(bool)       TRPMHasTrap(PVM pVM);
-VMMDECL(int)        TRPMQueryTrapAll(PVM pVM, uint8_t *pu8TrapNo, PTRPMEVENT pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2);
-VMMDECL(void)       TRPMSaveTrap(PVM pVM);
-VMMDECL(void)       TRPMRestoreTrap(PVM pVM);
-VMMDECL(int)        TRPMForwardTrap(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap);
-VMMDECL(int)        TRPMRaiseXcpt(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt);
-VMMDECL(int)        TRPMRaiseXcptErr(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr);
-VMMDECL(int)        TRPMRaiseXcptErrCR2(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2);
+VMMDECL(int)        TRPMQueryTrap(PVMCPU pVCpu, uint8_t *pu8TrapNo, PTRPMEVENT pEnmType);
+VMMDECL(uint8_t)    TRPMGetTrapNo(PVMCPU pVCpu);
+VMMDECL(RTGCUINT)   TRPMGetErrorCode(PVMCPU pVCpu);
+VMMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVMCPU pVCpu);
+VMMDECL(int)        TRPMResetTrap(PVMCPU pVCpu);
+VMMDECL(int)        TRPMAssertTrap(PVMCPU pVCpu, uint8_t u8TrapNo, TRPMEVENT enmType);
+VMMDECL(void)       TRPMSetErrorCode(PVMCPU pVCpu, RTGCUINT uErrorCode);
+VMMDECL(void)       TRPMSetFaultAddress(PVMCPU pVCpu, RTGCUINTPTR uCR2);
+VMMDECL(bool)       TRPMIsSoftwareInterrupt(PVMCPU pVCpu);
+VMMDECL(bool)       TRPMHasTrap(PVMCPU pVCpu);
+VMMDECL(int)        TRPMQueryTrapAll(PVMCPU pVCpu, uint8_t *pu8TrapNo, PTRPMEVENT pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2);
+VMMDECL(void)       TRPMSaveTrap(PVMCPU pVCpu);
+VMMDECL(void)       TRPMRestoreTrap(PVMCPU pVCpu);
+VMMDECL(int)        TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap);
+VMMDECL(int)        TRPMRaiseXcpt(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt);
+VMMDECL(int)        TRPMRaiseXcptErr(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr);
+VMMDECL(int)        TRPMRaiseXcptErrCR2(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2);
 
 

trunk/include/VBox/vm.h

@@ -150 +150 @@
         char                padding[2048];        /* multiple of 64 */
     } em;
+
+    /** TRPM part. */
+    union
+    {
+#ifdef ___TRPMInternal_h
+        struct TRPMCPU      s;
+#endif
+        char                padding[64];        /* multiple of 64 */
+    } trpm;
 
     /** TM part. */

trunk/src/VBox/VMM/EM.cpp

@@ -1552 +1552 @@
     RTGCUINT        uErrorCode;
     RTGCUINTPTR     uCR2;
-    int rc = TRPMQueryTrapAll(pVM, &u8TrapNo, &enmType, &uErrorCode, &uCR2);
+    int rc = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrorCode, &uCR2);
     if (RT_FAILURE(rc))
     {
@@ -1609 +1609 @@
                                    ? TRPM_TRAP_HAS_ERRORCODE
                                    : TRPM_TRAP_NO_ERRORCODE;
-            rc = TRPMForwardTrap(pVM, CPUMCTX2CORE(pCtx), u8TrapNo, uErrorCode, enmError, TRPM_TRAP, -1);
+            rc = TRPMForwardTrap(pVCpu, CPUMCTX2CORE(pCtx), u8TrapNo, uErrorCode, enmError, TRPM_TRAP, -1);
             if (rc == VINF_SUCCESS /* Don't use RT_SUCCESS */)
             {
-                TRPMResetTrap(pVM);
+                TRPMResetTrap(pVCpu);
                 return VINF_EM_RESCHEDULE_RAW;
             }
@@ -1647 +1647 @@
             if (u32ExtFeatures & X86_CPUID_FEATURE_ECX_MONITOR)
             {
-                rc = TRPMResetTrap(pVM);
+                rc = TRPMResetTrap(pVCpu);
                 AssertRC(rc);
 
@@ -1681 +1681 @@
              * lazy approach really makes things worse.
              */
-            rc = TRPMResetTrap(pVM);
+            rc = TRPMResetTrap(pVCpu);
             AssertRC(rc);
             return emR3RawExecuteInstruction(pVM, pVCpu, "IO Guest Trap: ");
@@ -1806 +1806 @@
     else
     {
-        rc = TRPMQueryTrapAll(pVM, &u8TrapNo, &enmType, &uErrorCode, &uCR2);
+        rc = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrorCode, &uCR2);
         if (RT_FAILURE(rc))
         {
@@ -1813 +1813 @@
         }
         /* Reset the trap as we'll execute the original instruction again. */
-        TRPMResetTrap(pVM);
+        TRPMResetTrap(pVCpu);
     }
 
@@ -2387 +2387 @@
         case VINF_EM_RAW_INTERRUPT_PENDING:
         case VINF_EM_RAW_RING_SWITCH_INT:
-            Assert(TRPMHasTrap(pVM));
+            Assert(TRPMHasTrap(pVCpu));
             Assert(!PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
 
-            if (TRPMHasTrap(pVM))
+            if (TRPMHasTrap(pVCpu))
             {
                 /* If the guest gate is marked unpatched, then we will check again if we can patch it. */
-                uint8_t u8Interrupt = TRPMGetTrapNo(pVM);
+                uint8_t u8Interrupt = TRPMGetTrapNo(pVCpu);
                 if (TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) == TRPM_INVALID_HANDLER)
                 {
@@ -2965 +2965 @@
          * Log important stuff before entering GC.
          */
-        if (TRPMHasTrap(pVM))
-            Log(("Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", TRPMGetTrapNo(pVM), pCtx->cs, (RTGCPTR)pCtx->rip));
+        if (TRPMHasTrap(pVCpu))
+            Log(("Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", TRPMGetTrapNo(pVCpu), pCtx->cs, (RTGCPTR)pCtx->rip));
 
         uint32_t cpl = CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx));
@@ -3387 +3387 @@
         if (    !VM_FF_ISPENDING(pVM, VM_FF_INHIBIT_INTERRUPTS | VM_FF_PGM_NO_MEMORY)
             &&  (!rc || rc >= VINF_EM_RESCHEDULE_HWACC)
-            &&  !TRPMHasTrap(pVM) /* an interrupt could already be scheduled for dispatching in the recompiler. */
+            &&  !TRPMHasTrap(pVCpu) /* an interrupt could already be scheduled for dispatching in the recompiler. */
             &&  PATMAreInterruptsEnabled(pVM)
             &&  !HWACCMR3IsEventPending(pVM))

trunk/src/VBox/VMM/PDMLdr.cpp

@@ -336 +336 @@
         else if (!strcmp(pszSymbol, "g_TRPM"))
             *pValue = VM_RC_ADDR(pVM, &pVM->trpm);
+        else if (!strcmp(pszSymbol, "g_TRPMCPU"))
+            *pValue = VM_RC_ADDR(pVM, &pVM->aCpus[0].trpm);
         else if (   !strncmp(pszSymbol, "VMM", 3)
                  || !strcmp(pszSymbol, "g_Logger")

trunk/src/VBox/VMM/TRPM.cpp

@@ -431 +431 @@
 
 /** TRPM saved state version. */
-#define TRPM_SAVED_STATE_VERSION    8
+#define TRPM_SAVED_STATE_VERSION        9
+#define TRPM_SAVED_STATE_VERSION_UNI    8   /* SMP support bumped the version */
 
 
@@ -464 +465 @@
      */
     pVM->trpm.s.offVM              = RT_OFFSETOF(VM, trpm);
-    pVM->trpm.s.uActiveVector      = ~0;
+    pVM->trpm.s.offTRPMCPU         = RT_OFFSETOF(VM, aCpus[0].trpm) - RT_OFFSETOF(VM, trpm);
+
+    for (unsigned i=0;i<pVM->cCPUs;i++)
+    {
+        PVMCPU pVCpu = &pVM->aCpus[i];
+
+        pVCpu->trpm.s.offVM         = RT_OFFSETOF(VM, aCpus[i].trpm);
+        pVCpu->trpm.s.uActiveVector = ~0;
+    }
+
     pVM->trpm.s.GuestIdtr.pIdt     = RTRCPTR_MAX;
     pVM->trpm.s.pvMonShwIdtRC            = RTRCPTR_MAX;
@@ -731 +741 @@
      * Reinitialize other members calling the relocator to get things right.
      */
-    pVM->trpm.s.uActiveVector  = ~0;
+    for (unsigned i=0;i<pVM->cCPUs;i++)
+    {
+        PVMCPU pVCpu = &pVM->aCpus[i];
+        pVCpu->trpm.s.uActiveVector = ~0;
+    }
     memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
     memset(pVM->trpm.s.aGuestTrapHandler, 0, sizeof(pVM->trpm.s.aGuestTrapHandler));
@@ -752 +766 @@
 static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
 {
+    PTRPM pTrpm = &pVM->trpm.s;
     LogFlow(("trpmR3Save:\n"));
 
@@ -757 +772 @@
      * Active and saved traps.
      */
-    PTRPM pTrpm = &pVM->trpm.s;
-    SSMR3PutUInt(pSSM,      pTrpm->uActiveVector);
-    SSMR3PutUInt(pSSM,      pTrpm->enmActiveType);
-    SSMR3PutGCUInt(pSSM,    pTrpm->uActiveErrorCode);
-    SSMR3PutGCUIntPtr(pSSM, pTrpm->uActiveCR2);
-    SSMR3PutGCUInt(pSSM,    pTrpm->uSavedVector);
-    SSMR3PutUInt(pSSM,      pTrpm->enmSavedType);
-    SSMR3PutGCUInt(pSSM,    pTrpm->uSavedErrorCode);
-    SSMR3PutGCUIntPtr(pSSM, pTrpm->uSavedCR2);
-    SSMR3PutGCUInt(pSSM,    pTrpm->uPrevVector);
-#if 0  /** @todo Enable this (+ load change) on the next version change. */
+    for (unsigned i=0;i<pVM->cCPUs;i++)
+    {
+        PTRPMCPU pTrpmCpu = &pVM->aCpus[i].trpm.s;
+
+        SSMR3PutUInt(pSSM,      pTrpmCpu->uActiveVector);
+        SSMR3PutUInt(pSSM,      pTrpmCpu->enmActiveType);
+        SSMR3PutGCUInt(pSSM,    pTrpmCpu->uActiveErrorCode);
+        SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uActiveCR2);
+        SSMR3PutGCUInt(pSSM,    pTrpmCpu->uSavedVector);
+        SSMR3PutUInt(pSSM,      pTrpmCpu->enmSavedType);
+        SSMR3PutGCUInt(pSSM,    pTrpmCpu->uSavedErrorCode);
+        SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uSavedCR2);
+        SSMR3PutGCUInt(pSSM,    pTrpmCpu->uPrevVector);
+    }
     SSMR3PutBool(pSSM,      pTrpm->fDisableMonitoring);
-#else
-    SSMR3PutGCUInt(pSSM,    pTrpm->fDisableMonitoring);
-#endif
     SSMR3PutUInt(pSSM,      VM_FF_ISSET(pVM, VM_FF_TRPM_SYNC_IDT));
     SSMR3PutMem(pSSM,       &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
@@ -808 +823 @@
      * Validate version.
      */
-    if (u32Version != TRPM_SAVED_STATE_VERSION)
+    if (    u32Version != TRPM_SAVED_STATE_VERSION
+        &&  u32Version != TRPM_SAVED_STATE_VERSION_UNI)
     {
         AssertMsgFailed(("trpmR3Load: Invalid version u32Version=%d!\n", u32Version));
@@ -823 +839 @@
      */
     PTRPM pTrpm = &pVM->trpm.s;
-    SSMR3GetUInt(pSSM,      &pTrpm->uActiveVector);
-    SSMR3GetUInt(pSSM,      (uint32_t *)&pTrpm->enmActiveType);
-    SSMR3GetGCUInt(pSSM,    &pTrpm->uActiveErrorCode);
-    SSMR3GetGCUIntPtr(pSSM, &pTrpm->uActiveCR2);
-    SSMR3GetGCUInt(pSSM,    &pTrpm->uSavedVector);
-    SSMR3GetUInt(pSSM,      (uint32_t *)&pTrpm->enmSavedType);
-    SSMR3GetGCUInt(pSSM,    &pTrpm->uSavedErrorCode);
-    SSMR3GetGCUIntPtr(pSSM, &pTrpm->uSavedCR2);
-    SSMR3GetGCUInt(pSSM,    &pTrpm->uPrevVector);
-#if 0 /** @todo Enable this + the corresponding save code on the next version change. */
-    SSMR3GetBool(pSSM,      &pTrpm->fDisableMonitoring);
-#else
-    RTGCUINT fDisableMonitoring;
-    SSMR3GetGCUInt(pSSM,    &fDisableMonitoring);
-    pTrpm->fDisableMonitoring = !!fDisableMonitoring;
-#endif
+
+    if (u32Version == TRPM_SAVED_STATE_VERSION)
+    {
+        for (unsigned i=0;i<pVM->cCPUs;i++)
+        {
+            PTRPMCPU pTrpmCpu = &pVM->aCpus[i].trpm.s;
+            SSMR3GetUInt(pSSM,      &pTrpmCpu->uActiveVector);
+            SSMR3GetUInt(pSSM,      (uint32_t *)&pTrpmCpu->enmActiveType);
+            SSMR3GetGCUInt(pSSM,    &pTrpmCpu->uActiveErrorCode);
+            SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
+            SSMR3GetGCUInt(pSSM,    &pTrpmCpu->uSavedVector);
+            SSMR3GetUInt(pSSM,      (uint32_t *)&pTrpmCpu->enmSavedType);
+            SSMR3GetGCUInt(pSSM,    &pTrpmCpu->uSavedErrorCode);
+            SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uSavedCR2);
+            SSMR3GetGCUInt(pSSM,    &pTrpmCpu->uPrevVector);
+        }
+
+        SSMR3GetBool(pSSM,      &pVM->trpm.s.fDisableMonitoring);
+    }
+    else
+    {
+        PTRPMCPU pTrpmCpu = &pVM->aCpus[0].trpm.s;
+        SSMR3GetUInt(pSSM,      &pTrpmCpu->uActiveVector);
+        SSMR3GetUInt(pSSM,      (uint32_t *)&pTrpmCpu->enmActiveType);
+        SSMR3GetGCUInt(pSSM,    &pTrpmCpu->uActiveErrorCode);
+        SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
+        SSMR3GetGCUInt(pSSM,    &pTrpmCpu->uSavedVector);
+        SSMR3GetUInt(pSSM,      (uint32_t *)&pTrpmCpu->enmSavedType);
+        SSMR3GetGCUInt(pSSM,    &pTrpmCpu->uSavedErrorCode);
+        SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uSavedCR2);
+        SSMR3GetGCUInt(pSSM,    &pTrpmCpu->uPrevVector);
+
+        RTGCUINT fDisableMonitoring;
+        SSMR3GetGCUInt(pSSM,    &fDisableMonitoring);
+        pTrpm->fDisableMonitoring = !!fDisableMonitoring;
+    }
 
     RTUINT fSyncIDT;
@@ -1417 +1453 @@
             if (HWACCMR3IsActive(pVM))
             {
-                rc = TRPMAssertTrap(pVM, u8Interrupt, enmEvent);
+                rc = TRPMAssertTrap(pVCpu, u8Interrupt, enmEvent);
                 AssertRC(rc);
                 STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
@@ -1436 +1472 @@
                 {
                     /* There's a handler -> let's execute it in raw mode */
-                    rc = TRPMForwardTrap(pVM, CPUMCTX2CORE(pCtx), u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, enmEvent, -1);
+                    rc = TRPMForwardTrap(pVCpu, CPUMCTX2CORE(pCtx), u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, enmEvent, -1);
                     if (rc == VINF_SUCCESS /* Don't use RT_SUCCESS */)
                     {

trunk/src/VBox/VMM/TRPMInternal.h

@@ -74 +74 @@
 #define TRPM2VM(pTRPM)          ( (PVM)((char*)pTRPM - pTRPM->offVM) )
 
+/**
+ * Converts a TRPMCPU pointer into a VM pointer.
+ * @returns Pointer to the VM structure the TRPMCPU is part of.
+ * @param   pTRPM   Pointer to TRPMCPU instance data.
+ */
+#define TRPMCPU2VM(pTrpmCpu)    ( (PVM)((char*)pTrpmCpu - pTrpmCpu->offVM) )
+
+/**
+ * Converts a TRPM pointer into a TRPMCPU pointer.
+ * @returns Pointer to the VM structure the TRPMCPU is part of.
+ * @param   pTRPM   Pointer to TRPMCPU instance data.
+ */
+#define TRPM2TRPMCPU(pTrpmCpu)     ( (PTRPMCPU)((char*)pTrpmCpu + pTrpmCpu->offTRPMCPU) )
 
 /**
@@ -86 +99 @@
      * See TRPM2VM(). */
     RTINT                   offVM;
-
-    /** Active Interrupt or trap vector number.
-     * If not ~0U this indicates that we're currently processing
-     * a interrupt, trap, fault, abort, whatever which have arrived
-     * at that vector number.
-     */
-    RTUINT                  uActiveVector;
-
-    /** Active trap type. */
-    TRPMEVENT               enmActiveType;
-
-    /** Errorcode for the active interrupt/trap. */
-    RTGCUINT                uActiveErrorCode; /**< @todo don't use RTGCUINT */
-
-    /** CR2 at the time of the active exception. */
-    RTGCUINTPTR             uActiveCR2;
-
-    /** Saved trap vector number. */
-    RTGCUINT                uSavedVector; /**< @todo don't use RTGCUINT */
-
-    /** Saved trap type. */
-    TRPMEVENT               enmSavedType;
-
-    /** Saved errorcode. */
-    RTGCUINT                uSavedErrorCode;
-
-    /** Saved cr2. */
-    RTGCUINTPTR             uSavedCR2;
-
-    /** Previous trap vector # - for debugging. */
-    RTGCUINT                uPrevVector;
+    /** Offset to the TRPMCPU structure.
+     * See TRPM2TRPMCPU(). */
+    RTINT                   offTRPMCPU;
 
     /** IDT monitoring and sync flag (HWACC). */
@@ -136 +121 @@
 
     /** Padding to get the IDTs at a 16 byte alignement. */
-#if GC_ARCH_BITS == 32
     uint8_t                 abPadding1[6];
-#else
-    uint8_t                 abPadding1[14];
-#endif
     /** IDTs. Aligned at 16 byte offset for speed. */
     VBOXIDTE                aIdt[256];
@@ -190 +171 @@
 #endif
 } TRPM;
-#pragma pack()
 
 /** Pointer to TRPM Data. */
 typedef TRPM *PTRPM;
+
+
+typedef struct TRPMCPU
+{
+    /** Offset to the VM structure.
+     * See TRPMCPU2VM(). */
+    RTINT                   offVM;
+    /** Active Interrupt or trap vector number.
+     * If not ~0U this indicates that we're currently processing
+     * a interrupt, trap, fault, abort, whatever which have arrived
+     * at that vector number.
+     */
+    RTUINT                  uActiveVector;
+
+    /** Active trap type. */
+    TRPMEVENT               enmActiveType;
+
+    /** Errorcode for the active interrupt/trap. */
+    RTGCUINT                uActiveErrorCode; /**< @todo don't use RTGCUINT */
+
+    /** CR2 at the time of the active exception. */
+    RTGCUINTPTR             uActiveCR2;
+
+    /** Saved trap vector number. */
+    RTGCUINT                uSavedVector; /**< @todo don't use RTGCUINT */
+
+    /** Saved trap type. */
+    TRPMEVENT               enmSavedType;
+
+    /** Saved errorcode. */
+    RTGCUINT                uSavedErrorCode;
+
+    /** Saved cr2. */
+    RTGCUINTPTR             uSavedCR2;
+
+    /** Previous trap vector # - for debugging. */
+    RTGCUINT                uPrevVector;
+} TRPMCPU;
+
+/** Pointer to TRPMCPU Data. */
+typedef TRPMCPU *PTRPMCPU;
+
+#pragma pack()
+
 
 VMMRCDECL(int) trpmRCGuestIDTWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);

trunk/src/VBox/VMM/TRPMInternal.mac

@@ -34 +34 @@
 struc TRPM
     .offVM              resd 1
-    .uActiveVector      resd 1
-    .enmActiveType      resd 1
-    .uActiveErrorCode   RTGCPTR_RES 1
-    .uActiveCR2         RTGCPTR_RES 1
-    .uSavedVector       RTGCPTR_RES 1
-    .enmSavedType       resd 1
-    .uSavedErrorCode    RTGCPTR_RES 1
-    .uSavedCR2          RTGCPTR_RES 1
-    .uPrevVector        RTGCPTR_RES 1
+    .offTRPMCPU         resd 1
     .fDisableMonitoring resb 1
     .fSafeToDropGuestIDTMonitoring resb 1
-%if GC_ARCH_BITS == 32
     .abPadding1         resb 6
-%else
-    .abPadding1         resb 14
-%endif
     .aIdt               resd 512
     .au32IdtPatched     resd 8
@@ -80 +68 @@
     .paStatForwardedIRQRC  RTRCPTR_RES 1
 %endif
+endstruc
+
+struc TRPMCPU
+    .offVM              resd 1
+    .uActiveVector      resd 1
+    .enmActiveType      resd 1
+    .uActiveErrorCode   RTGCPTR_RES 1
+    .uActiveCR2         RTGCPTR_RES 1
+    .uSavedVector       RTGCPTR_RES 1
+    .enmSavedType       resd 1
+    .uSavedErrorCode    RTGCPTR_RES 1
+    .uSavedCR2          RTGCPTR_RES 1
+    .uPrevVector        RTGCPTR_RES 1
 endstruc
 

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -451 +451 @@
 
 #ifdef IN_RC
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
 #endif
@@ -580 +580 @@
 
 #ifdef IN_RC
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
 #endif
@@ -648 +648 @@
 
 #ifdef IN_RC
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
 #endif
@@ -733 +733 @@
 
 #ifdef IN_RC
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
 #endif
@@ -845 +845 @@
 #ifdef IN_RC
     /* Safety check (in theory it could cross a page boundary and fault there though) */
-    Assert(   TRPMHasTrap(pVM)
-           && (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW));
+    Assert(   TRPMHasTrap(pVCpu)
+           && (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW));
     EM_ASSERT_FAULT_RETURN(GCPtrPar1 == pvFault, VERR_EM_INTERPRETER);
 #endif
@@ -911 +911 @@
 
 #ifdef IN_RC
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
 #endif
@@ -1015 +1015 @@
 
 #ifdef IN_RC
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
 #endif
@@ -1111 +1111 @@
     GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDISState, &pDISState->param1, GCPtrPar1);
 #ifdef IN_RC
-    Assert(TRPMHasTrap(pVM));
+    Assert(TRPMHasTrap(pVCpu));
     EM_ASSERT_FAULT_RETURN((RTGCPTR)((RTGCUINTPTR)GCPtrPar1 & ~(RTGCUINTPTR)3) == pvFault, VERR_EM_INTERPRETER);
 #endif
@@ -1169 +1169 @@
 
 #ifdef IN_RC
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
 #else
@@ -1582 +1582 @@
         return VERR_EM_INTERPRETER;
 
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
             RTRCPTR pParam1;
@@ -1654 +1654 @@
         return VERR_EM_INTERPRETER;
 
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
             RTRCPTR pParam1;
@@ -1725 +1725 @@
         return VERR_EM_INTERPRETER;
 
-    if (TRPMHasTrap(pVM))
-    {
-        if (TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW)
+    if (TRPMHasTrap(pVCpu))
+    {
+        if (TRPMGetErrorCode(pVCpu) & X86_TRAP_PF_RW)
         {
             RTRCPTR pParam1;

trunk/src/VBox/VMM/VMMAll/IOMAll.cpp

@@ -736 +736 @@
         {
             Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d %Rrc -> #GP(0)\n", Port, cb, rc));
-            return TRPMRaiseXcptErr(pVM, pCtxCore, X86_XCPT_GP, 0);
+            return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
         }
 
@@ -744 +744 @@
             Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d cbTss=%#x fCanHaveIOBitmap=%RTbool -> #GP(0)\n",
                  Port, cb, cbTss, fCanHaveIOBitmap));
-            return TRPMRaiseXcptErr(pVM, pCtxCore, X86_XCPT_GP, 0);
+            return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
         }
 
@@ -767 +767 @@
             Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d offTss=%#x cbTss=%#x -> #GP(0)\n",
                  Port, cb, offTss, cbTss));
-            return TRPMRaiseXcptErr(pVM, pCtxCore, X86_XCPT_GP, 0);
+            return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
         }
         uint16_t u16;
@@ -785 +785 @@
             Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d u16=%#x -> #GP(0)\n",
                  Port, cb, u16, offTss));
-            return TRPMRaiseXcptErr(pVM, pCtxCore, X86_XCPT_GP, 0);
+            return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
         }
         LogFlow(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d offTss=%#x cbTss=%#x u16=%#x -> OK\n",

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -101 +101 @@
     {
         uErr &= ~X86_TRAP_PF_ID;
-        TRPMSetErrorCode(pVM, uErr);
+        TRPMSetErrorCode(pVCpu, uErr);
     }
 #  endif
@@ -140 +140 @@
 #    endif
         STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.StatRZTrap0eTime2GuestTrap; });
-        TRPMSetErrorCode(pVM, uErr);
+        TRPMSetErrorCode(pVCpu, uErr);
         return VINF_EM_RAW_GUEST_TRAP;
     }
@@ -329 +329 @@
                  * Pretend we're not here and let the guest handle the trap.
                  */
-                TRPMSetErrorCode(pVM, uErr & ~X86_TRAP_PF_P);
+                TRPMSetErrorCode(pVCpu, uErr & ~X86_TRAP_PF_P);
                 STAM_COUNTER_INC(&pVCpu->pgm.s.StatRZTrap0eGuestPFMapping);
                 LogFlow(("PGM: Mapping access -> route trap to recompiler!\n"));
@@ -2201 +2201 @@
              */
             if (pPdeSrc->n.u1Present && pPteSrc->n.u1Present)
-                TRPMSetErrorCode(pVM, uErr | X86_TRAP_PF_P); /* page-level protection violation */
+                TRPMSetErrorCode(pVCpu, uErr | X86_TRAP_PF_P); /* page-level protection violation */
 
             STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_MID_Z(Stat,DirtyBitTracking), a);
@@ -2328 +2328 @@
         if (pPdeSrc->b.u1Size && fBigPagesSupported)
         {
-            TRPMSetErrorCode(pVM, uErr | X86_TRAP_PF_P); /* page-level protection violation */
+            TRPMSetErrorCode(pVCpu, uErr | X86_TRAP_PF_P); /* page-level protection violation */
         }
         else
@@ -2342 +2342 @@
                 const GSTPTE    PteSrc = *pPteSrc;
                 if (pPteSrc->n.u1Present)
-                    TRPMSetErrorCode(pVM, uErr | X86_TRAP_PF_P); /* page-level protection violation */
+                    TRPMSetErrorCode(pVCpu, uErr | X86_TRAP_PF_P); /* page-level protection violation */
             }
             AssertRC(rc);

trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

@@ -2756 +2756 @@
     }
     Log(("PGMPhysInterpretedRead: GCPtrSrc=%RGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
-    return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
+    return TRPMRaiseXcptErrCR2(pVCpu, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
 }
 
@@ -2948 +2948 @@
     {
         Log(("PGMPhysInterpretedReadNoHandlers: GCPtrSrc=%RGv cb=%#x -> Raised #PF(%#x)\n", GCPtrSrc, cb, uErr));
-        return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
+        return TRPMRaiseXcptErrCR2(pVCpu, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
     }
     Log(("PGMPhysInterpretedReadNoHandlers: GCPtrSrc=%RGv cb=%#x -> #PF(%#x) [!raised]\n", GCPtrSrc, cb, uErr));
@@ -3151 +3151 @@
     {
         Log(("PGMPhysInterpretedWriteNoHandlers: GCPtrDst=%RGv cb=%#x -> Raised #PF(%#x)\n", GCPtrDst, cb, uErr));
-        return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrDst);
+        return TRPMRaiseXcptErrCR2(pVCpu, pCtxCore, X86_XCPT_PF, uErr, GCPtrDst);
     }
     Log(("PGMPhysInterpretedWriteNoHandlers: GCPtrDst=%RGv cb=%#x -> #PF(%#x) [!raised]\n", GCPtrDst, cb, uErr));

trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp

@@ -49 +49 @@
  *
  * @returns VBox status code.
- * @param   pVM                     The virtual machine.
+ * @param   pVCpu                   VMCPU handle.
  * @param   pu8TrapNo               Where to store the trap number.
  * @param   pEnmType                Where to store the trap type
  */
-VMMDECL(int)  TRPMQueryTrap(PVM pVM, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType)
+VMMDECL(int)  TRPMQueryTrap(PVMCPU pVCpu, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType)
 {
     /*
      * Check if we have a trap at present.
      */
-    if (pVM->trpm.s.uActiveVector != ~0U)
+    if (pVCpu->trpm.s.uActiveVector != ~0U)
     {
         if (pu8TrapNo)
-            *pu8TrapNo = (uint8_t)pVM->trpm.s.uActiveVector;
+            *pu8TrapNo = (uint8_t)pVCpu->trpm.s.uActiveVector;
         if (pEnmType)
-            *pEnmType = pVM->trpm.s.enmActiveType;
+            *pEnmType = pVCpu->trpm.s.enmActiveType;
         return VINF_SUCCESS;
     }
@@ -78 +78 @@
  *
  * @returns The current trap number.
- * @param   pVM         VM handle.
- */
-VMMDECL(uint8_t)  TRPMGetTrapNo(PVM pVM)
-{
-    AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
-    return (uint8_t)pVM->trpm.s.uActiveVector;
+ * @param   pVCpu                   VMCPU handle.
+ */
+VMMDECL(uint8_t)  TRPMGetTrapNo(PVMCPU pVCpu)
+{
+    AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
+    return (uint8_t)pVCpu->trpm.s.uActiveVector;
 }
 
@@ -94 +94 @@
  *
  * @returns Error code.
- * @param   pVM         VM handle.
- */
-VMMDECL(RTGCUINT)  TRPMGetErrorCode(PVM pVM)
-{
-    AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
+ * @param   pVCpu                   VMCPU handle.
+ */
+VMMDECL(RTGCUINT)  TRPMGetErrorCode(PVMCPU pVCpu)
+{
+    AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
 #ifdef VBOX_STRICT
-    switch (pVM->trpm.s.uActiveVector)
+    switch (pVCpu->trpm.s.uActiveVector)
     {
         case 0x0a:
@@ -111 +111 @@
             break;
         default:
-            AssertMsgFailed(("This trap (%#x) doesn't have any error code\n", pVM->trpm.s.uActiveVector));
+            AssertMsgFailed(("This trap (%#x) doesn't have any error code\n", pVCpu->trpm.s.uActiveVector));
             break;
     }
 #endif
-    return pVM->trpm.s.uActiveErrorCode;
+    return pVCpu->trpm.s.uActiveErrorCode;
 }
 
@@ -126 +126 @@
  *
  * @returns Fault address associated with the trap.
- * @param   pVM         VM handle.
- */
-VMMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVM pVM)
-{
-    AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
-    AssertMsg(pVM->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
-    return pVM->trpm.s.uActiveCR2;
+ * @param   pVCpu                   VMCPU handle.
+ */
+VMMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVMCPU pVCpu)
+{
+    AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
+    AssertMsg(pVCpu->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
+    return pVCpu->trpm.s.uActiveCR2;
 }
 
@@ -143 +143 @@
  *
  * @returns VBox status code.
- * @param   pVM         The virtual machine handle.
- */
-VMMDECL(int) TRPMResetTrap(PVM pVM)
+ * @param   pVCpu                   VMCPU handle.
+ */
+VMMDECL(int) TRPMResetTrap(PVMCPU pVCpu)
 {
     /*
      * Cannot reset non-existing trap!
      */
-    if (pVM->trpm.s.uActiveVector == ~0U)
+    if (pVCpu->trpm.s.uActiveVector == ~0U)
     {
         AssertMsgFailed(("No active trap!\n"));
@@ -159 +159 @@
      * Reset it.
      */
-    pVM->trpm.s.uActiveVector = ~0U;
+    pVCpu->trpm.s.uActiveVector = ~0U;
     return VINF_SUCCESS;
 }
@@ -171 +171 @@
  *
  * @returns VBox status code.
- * @param   pVM                 The virtual machine.
+ * @param   pVCpu               VMCPU handle.
  * @param   u8TrapNo            The trap vector to assert.
  * @param   enmType             Trap type.
  */
-VMMDECL(int)  TRPMAssertTrap(PVM pVM, uint8_t u8TrapNo, TRPMEVENT enmType)
+VMMDECL(int)  TRPMAssertTrap(PVMCPU pVCpu, uint8_t u8TrapNo, TRPMEVENT enmType)
 {
     Log2(("TRPMAssertTrap: u8TrapNo=%02x type=%d\n", u8TrapNo, enmType));
@@ -182 +182 @@
      * Cannot assert a trap when one is already active.
      */
-    if (pVM->trpm.s.uActiveVector != ~0U)
+    if (pVCpu->trpm.s.uActiveVector != ~0U)
     {
-        AssertMsgFailed(("Active trap %#x\n", pVM->trpm.s.uActiveVector));
+        AssertMsgFailed(("Active trap %#x\n", pVCpu->trpm.s.uActiveVector));
         return VERR_TRPM_ACTIVE_TRAP;
     }
 
-    pVM->trpm.s.uActiveVector               = u8TrapNo;
-    pVM->trpm.s.enmActiveType               = enmType;
-    pVM->trpm.s.uActiveErrorCode            = ~0;
-    pVM->trpm.s.uActiveCR2                  = 0xdeadface;
+    pVCpu->trpm.s.uActiveVector               = u8TrapNo;
+    pVCpu->trpm.s.enmActiveType               = enmType;
+    pVCpu->trpm.s.uActiveErrorCode            = ~0;
+    pVCpu->trpm.s.uActiveCR2                  = 0xdeadface;
     return VINF_SUCCESS;
 }
@@ -203 +203 @@
  * which takes an errorcode when making this request.
  *
- * @param   pVM         The virtual machine.
- * @param   uErrorCode  The new error code.
- */
-VMMDECL(void)  TRPMSetErrorCode(PVM pVM, RTGCUINT uErrorCode)
+ * @param   pVCpu               VMCPU handle.
+ * @param   uErrorCode          The new error code.
+ */
+VMMDECL(void)  TRPMSetErrorCode(PVMCPU pVCpu, RTGCUINT uErrorCode)
 {
     Log2(("TRPMSetErrorCode: uErrorCode=%RGv\n", uErrorCode)); /** @todo RTGCUINT mess! */
-    AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
-    pVM->trpm.s.uActiveErrorCode = uErrorCode;
+    AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
+    pVCpu->trpm.s.uActiveErrorCode = uErrorCode;
 #ifdef VBOX_STRICT
-    switch (pVM->trpm.s.uActiveVector)
+    switch (pVCpu->trpm.s.uActiveVector)
     {
         case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e:
-            AssertMsg(uErrorCode != ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVM->trpm.s.uActiveVector));
+            AssertMsg(uErrorCode != ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
             break;
         case 0x11: case 0x08:
-            AssertMsg(uErrorCode == 0,              ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVM->trpm.s.uActiveVector));
+            AssertMsg(uErrorCode == 0,              ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
             break;
         default:
-            AssertMsg(uErrorCode == ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVM->trpm.s.uActiveVector));
+            AssertMsg(uErrorCode == ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector));
             break;
     }
@@ -235 +235 @@
  * when making this request.
  *
- * @param   pVM         The virtual machine.
- * @param   uCR2        The new fault address (cr2 register).
- */
-VMMDECL(void)  TRPMSetFaultAddress(PVM pVM, RTGCUINTPTR uCR2)
+ * @param   pVCpu               VMCPU handle.
+ * @param   uCR2                The new fault address (cr2 register).
+ */
+VMMDECL(void)  TRPMSetFaultAddress(PVMCPU pVCpu, RTGCUINTPTR uCR2)
 {
     Log2(("TRPMSetFaultAddress: uCR2=%RGv\n", uCR2));
-    AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
-    AssertMsg(pVM->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
-    pVM->trpm.s.uActiveCR2 = uCR2;
+    AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
+    AssertMsg(pVCpu->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
+    pVCpu->trpm.s.uActiveCR2 = uCR2;
 }
 
@@ -256 +256 @@
  * @returns true if software interrupt, false if not.
  *
- * @param   pVM         VM handle.
- */
-VMMDECL(bool) TRPMIsSoftwareInterrupt(PVM pVM)
-{
-    AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
-    return (pVM->trpm.s.enmActiveType == TRPM_SOFTWARE_INT);
+ * @param   pVCpu               VMCPU handle.
+ */
+VMMDECL(bool) TRPMIsSoftwareInterrupt(PVMCPU pVCpu)
+{
+    AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
+    return (pVCpu->trpm.s.enmActiveType == TRPM_SOFTWARE_INT);
 }
 
@@ -269 +269 @@
  *
  * @returns true if trap active, false if not.
- * @param   pVM         The virtual machine.
- */
-VMMDECL(bool)  TRPMHasTrap(PVM pVM)
-{
-    return pVM->trpm.s.uActiveVector != ~0U;
+ * @param   pVCpu               VMCPU handle.
+ */
+VMMDECL(bool)  TRPMHasTrap(PVMCPU pVCpu)
+{
+    return pVCpu->trpm.s.uActiveVector != ~0U;
 }
 
@@ -282 +282 @@
  *
  * @returns VBox status code.
- * @param   pVM                     The virtual machine.
+ * @param   pVCpu                   VMCPU handle.
  * @param   pu8TrapNo               Where to store the trap number.
  * @param   pEnmType                Where to store the trap type
@@ -289 +289 @@
  * @param   puCR2                   Where to store the CR2 associated with a trap 0E.
  */
-VMMDECL(int)  TRPMQueryTrapAll(PVM pVM, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2)
+VMMDECL(int)  TRPMQueryTrapAll(PVMCPU pVCpu, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2)
 {
     /*
      * Check if we have a trap at present.
      */
-    if (pVM->trpm.s.uActiveVector == ~0U)
+    if (pVCpu->trpm.s.uActiveVector == ~0U)
         return VERR_TRPM_NO_ACTIVE_TRAP;
 
     if (pu8TrapNo)
-        *pu8TrapNo      = (uint8_t)pVM->trpm.s.uActiveVector;
+        *pu8TrapNo      = (uint8_t)pVCpu->trpm.s.uActiveVector;
     if (pEnmType)
-        *pEnmType       = pVM->trpm.s.enmActiveType;
+        *pEnmType       = pVCpu->trpm.s.enmActiveType;
     if (puErrorCode)
-        *puErrorCode    = pVM->trpm.s.uActiveErrorCode;
+        *puErrorCode    = pVCpu->trpm.s.uActiveErrorCode;
     if (puCR2)
-        *puCR2          = pVM->trpm.s.uActiveCR2;
+        *puCR2          = pVCpu->trpm.s.uActiveCR2;
 
     return VINF_SUCCESS;
@@ -319 +319 @@
  * @param   pVM     VM handle.
  */
-VMMDECL(void) TRPMSaveTrap(PVM pVM)
-{
-    pVM->trpm.s.uSavedVector        = pVM->trpm.s.uActiveVector;
-    pVM->trpm.s.enmSavedType        = pVM->trpm.s.enmActiveType;
-    pVM->trpm.s.uSavedErrorCode     = pVM->trpm.s.uActiveErrorCode;
-    pVM->trpm.s.uSavedCR2           = pVM->trpm.s.uActiveCR2;
+VMMDECL(void) TRPMSaveTrap(PVMCPU pVCpu)
+{
+    pVCpu->trpm.s.uSavedVector        = pVCpu->trpm.s.uActiveVector;
+    pVCpu->trpm.s.enmSavedType        = pVCpu->trpm.s.enmActiveType;
+    pVCpu->trpm.s.uSavedErrorCode     = pVCpu->trpm.s.uActiveErrorCode;
+    pVCpu->trpm.s.uSavedCR2           = pVCpu->trpm.s.uActiveCR2;
 }
 
@@ -335 +335 @@
  * @param   pVM     VM handle.
  */
-VMMDECL(void) TRPMRestoreTrap(PVM pVM)
-{
-    pVM->trpm.s.uActiveVector       = pVM->trpm.s.uSavedVector;
-    pVM->trpm.s.enmActiveType       = pVM->trpm.s.enmSavedType;
-    pVM->trpm.s.uActiveErrorCode    = pVM->trpm.s.uSavedErrorCode;
-    pVM->trpm.s.uActiveCR2          = pVM->trpm.s.uSavedCR2;
+VMMDECL(void) TRPMRestoreTrap(PVMCPU pVCpu)
+{
+    pVCpu->trpm.s.uActiveVector       = pVCpu->trpm.s.uSavedVector;
+    pVCpu->trpm.s.enmActiveType       = pVCpu->trpm.s.enmSavedType;
+    pVCpu->trpm.s.uActiveErrorCode    = pVCpu->trpm.s.uSavedErrorCode;
+    pVCpu->trpm.s.uActiveCR2          = pVCpu->trpm.s.uSavedCR2;
 }
 
@@ -361 +361 @@
  * @internal
  */
-VMMDECL(int) TRPMForwardTrap(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap)
+VMMDECL(int) TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap)
 {
 #ifdef TRPM_FORWARD_TRAPS_IN_GC
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
     X86EFLAGS eflags;
     Assert(pVM->cCPUs == 1);
-    PVMCPU    pVCpu = &pVM->aCpus[0];
 
     STAM_PROFILE_ADV_START(&pVM->trpm.s.CTX_SUFF_Z(StatForwardProf), a);
@@ -378 +378 @@
     switch (iGate) {
     case 14:
-        if (pRegFrame->eip == pVM->trpm.s.uActiveCR2)
+        if (pRegFrame->eip == pVCpu->trpm.s.uActiveCR2)
         {
             int rc;
@@ -608 +608 @@
                     if (eflags.Bits.u1VM)
                     {
-                        Log(("TRAP%02X: (VM) Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVM->trpm.s.uActiveCR2));
+                        Log(("TRAP%02X: (VM) Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVCpu->trpm.s.uActiveCR2));
                         pTrapStack[--idx] = pRegFrame->gs;
                         pTrapStack[--idx] = pRegFrame->fs;
@@ -618 +618 @@
                     }
                     else
-                        Log(("TRAP%02X: Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVM->trpm.s.uActiveCR2));
+                        Log(("TRAP%02X: Handler %04X:%RGv Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVCpu->trpm.s.uActiveCR2));
 
                     if (!fConforming && dpl < cpl)
@@ -649 +649 @@
                     if (enmError == TRPM_TRAP_HAS_ERRORCODE)
                     {
-                        pTrapStack[--idx] = pVM->trpm.s.uActiveErrorCode;
+                        pTrapStack[--idx] = pVCpu->trpm.s.uActiveErrorCode;
                     }
 
@@ -674 +674 @@
 
                     /* Make sure the internal guest context structure is up-to-date. */
-                    CPUMSetGuestCR2(pVCpu, pVM->trpm.s.uActiveCR2);
+                    CPUMSetGuestCR2(pVCpu, pVCpu->trpm.s.uActiveCR2);
 
 #ifdef IN_RC
                     /* Note: shouldn't be necessary */
-                    ASMSetCR2(pVM->trpm.s.uActiveCR2);
+                    ASMSetCR2(pVCpu->trpm.s.uActiveCR2);
 
                     /* Turn off interrupts for interrupt gates. */
@@ -757 +757 @@
  * @param   enmXcpt     The exception.
  */
-VMMDECL(int) TRPMRaiseXcpt(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt)
+VMMDECL(int) TRPMRaiseXcpt(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt)
 {
     LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x\n", pCtxCore->cs, pCtxCore->eip, enmXcpt));
 /** @todo dispatch the trap. */
-    pVM->trpm.s.uActiveVector            = enmXcpt;
-    pVM->trpm.s.enmActiveType            = TRPM_TRAP;
-    pVM->trpm.s.uActiveErrorCode         = 0xdeadbeef;
-    pVM->trpm.s.uActiveCR2               = 0xdeadface;
+    pVCpu->trpm.s.uActiveVector            = enmXcpt;
+    pVCpu->trpm.s.enmActiveType            = TRPM_TRAP;
+    pVCpu->trpm.s.uActiveErrorCode         = 0xdeadbeef;
+    pVCpu->trpm.s.uActiveCR2               = 0xdeadface;
     return VINF_EM_RAW_GUEST_TRAP;
 }
@@ -784 +784 @@
  * @param   uErr        The error code.
  */
-VMMDECL(int) TRPMRaiseXcptErr(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr)
+VMMDECL(int) TRPMRaiseXcptErr(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr)
 {
     LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x uErr=%RX32\n", pCtxCore->cs, pCtxCore->eip, enmXcpt, uErr));
 /** @todo dispatch the trap. */
-    pVM->trpm.s.uActiveVector            = enmXcpt;
-    pVM->trpm.s.enmActiveType            = TRPM_TRAP;
-    pVM->trpm.s.uActiveErrorCode         = uErr;
-    pVM->trpm.s.uActiveCR2               = 0xdeadface;
+    pVCpu->trpm.s.uActiveVector            = enmXcpt;
+    pVCpu->trpm.s.enmActiveType            = TRPM_TRAP;
+    pVCpu->trpm.s.uActiveErrorCode         = uErr;
+    pVCpu->trpm.s.uActiveCR2               = 0xdeadface;
     return VINF_EM_RAW_GUEST_TRAP;
 }
@@ -812 +812 @@
  * @param   uCR2        The CR2 value.
  */
-VMMDECL(int) TRPMRaiseXcptErrCR2(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2)
+VMMDECL(int) TRPMRaiseXcptErrCR2(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2)
 {
     LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x uErr=%RX32 uCR2=%RGv\n", pCtxCore->cs, pCtxCore->eip, enmXcpt, uErr, uCR2));
 /** @todo dispatch the trap. */
-    pVM->trpm.s.uActiveVector            = enmXcpt;
-    pVM->trpm.s.enmActiveType            = TRPM_TRAP;
-    pVM->trpm.s.uActiveErrorCode         = uErr;
-    pVM->trpm.s.uActiveCR2               = uCR2;
+    pVCpu->trpm.s.uActiveVector            = enmXcpt;
+    pVCpu->trpm.s.enmActiveType            = TRPM_TRAP;
+    pVCpu->trpm.s.uActiveErrorCode         = uErr;
+    pVCpu->trpm.s.uActiveCR2               = uCR2;
     return VINF_EM_RAW_GUEST_TRAP;
 }

trunk/src/VBox/VMM/VMMGC/MMRamGC.cpp

@@ -103 +103 @@
 VMMRCDECL(int) MMGCRamRead(PVM pVM, void *pDst, void *pSrc, size_t cb)
 {
-    int rc;
-
-    TRPMSaveTrap(pVM);  /* save the current trap info, because it will get trashed if our access failed. */
+    int    rc;
+    PVMCPU pVCpu = VMMGetCpu0(pVM);
+
+    TRPMSaveTrap(pVCpu);  /* save the current trap info, because it will get trashed if our access failed. */
 
     MMGCRamRegisterTrapHandler(pVM);
@@ -111 +112 @@
     MMGCRamDeregisterTrapHandler(pVM);
     if (RT_FAILURE(rc))
-        TRPMRestoreTrap(pVM);
+        TRPMRestoreTrap(pVCpu);
 
     return rc;
@@ -128 +129 @@
 VMMRCDECL(int) MMGCRamWrite(PVM pVM, void *pDst, void *pSrc, size_t cb)
 {
-    TRPMSaveTrap(pVM);  /* save the current trap info, because it will get trashed if our access failed. */
+    PVMCPU pVCpu = VMMGetCpu0(pVM);
+    TRPMSaveTrap(pVCpu);  /* save the current trap info, because it will get trashed if our access failed. */
 
     MMGCRamRegisterTrapHandler(pVM);
@@ -134 +136 @@
     MMGCRamDeregisterTrapHandler(pVM);
     if (RT_FAILURE(rc))
-        TRPMRestoreTrap(pVM);
+        TRPMRestoreTrap(pVCpu);
 
     /*
@@ -159 +161 @@
     {
         /* Must be a read violation. */
-        AssertReturn(!(TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW), VERR_INTERNAL_ERROR);
+        AssertReturn(!(TRPMGetErrorCode(VMMGetCpu0(pVM)) & X86_TRAP_PF_RW), VERR_INTERNAL_ERROR);
         pRegFrame->eip = (uintptr_t)&MMGCRamRead_Error;
         return VINF_SUCCESS;
@@ -171 +173 @@
     {
         /* Must be a write violation. */
-        AssertReturn(TRPMGetErrorCode(pVM) & X86_TRAP_PF_RW, VERR_INTERNAL_ERROR);
+        AssertReturn(TRPMGetErrorCode(VMMGetCpu0(pVM)) & X86_TRAP_PF_RW, VERR_INTERNAL_ERROR);
         pRegFrame->eip = (uintptr_t)&MMGCRamWrite_Error;
         return VINF_SUCCESS;

trunk/src/VBox/VMM/VMMGC/TRPMGC.cpp

@@ -88 +88 @@
 
     LogFlow(("TRPMGCHyperReturnToHost: rc=%Rrc\n", rc));
-    TRPMResetTrap(pVM);
+    TRPMResetTrap(pVCpu);
     CPUMHyperSetCtxCore(pVCpu, NULL);
     VMMGCGuestToHost(pVM, rc);

trunk/src/VBox/VMM/VMMGC/TRPMGCHandlers.cpp

@@ -136 +136 @@
 {
     PVMCPU   pVCpu = VMMGetCpu0(pVM);
-    uint32_t uOldActiveVector = pVM->trpm.s.uActiveVector;
+    uint32_t uOldActiveVector = pVCpu->trpm.s.uActiveVector;
     NOREF(uOldActiveVector);
 
@@ -142 +142 @@
     if (    rc != VINF_EM_RAW_GUEST_TRAP
         &&  rc != VINF_EM_RAW_RING_SWITCH_INT)
-        pVM->trpm.s.uActiveVector = ~0;
+        pVCpu->trpm.s.uActiveVector = ~0;
 
 #ifdef VBOX_HIGH_RES_TIMERS_HACK
@@ -210 +210 @@
             Log(("trpmGCExitTrap: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
             AssertFatalMsgRC(rc, ("PDMGetInterrupt failed with %Rrc\n", rc));
-            rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT, uOldActiveVector);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_HARDWARE_INT, uOldActiveVector);
             /* can't return if successful */
             Assert(rc != VINF_SUCCESS);
@@ -219 +219 @@
 
             /* Assert the trap and go to the recompiler to dispatch it. */
-            TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
+            TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
 
             STAM_PROFILE_ADV_START(&pVM->trpm.s.aStatGCTraps[uOldActiveVector], a);
@@ -253 +253 @@
  *          other codes are passed execution to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCTrap01Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
+DECLASM(int) TRPMGCTrap01Handler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
 {
     RTGCUINTREG uDr6 = ASMGetAndClearDR6();
-    PVM         pVM = TRPM2VM(pTrpm);
+    PVM         pVM = TRPM2VM(pTrpmCpu);
     PVMCPU      pVCpu = VMMGetCpu0(pVM);
 
@@ -298 +298 @@
  *          other codes are passed execution to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  * @remark  This is not hooked up unless you're building with VBOX_WITH_NMI defined.
  */
-DECLASM(int) TRPMGCTrap02Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
+DECLASM(int) TRPMGCTrap02Handler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
 {
     LogFlow(("TRPMGCTrap02Handler: cs:eip=%04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
@@ -318 +318 @@
  *          other codes are passed execution to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCTrap03Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
+DECLASM(int) TRPMGCTrap03Handler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
 {
     LogFlow(("TRPMGC03: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
-    PVM pVM = TRPM2VM(pTrpm);
+    PVM pVM = TRPM2VM(pTrpmCpu);
     int rc;
 
@@ -358 +358 @@
  *          other codes are passed execution to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCTrap06Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
+DECLASM(int) TRPMGCTrap06Handler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
 {
     LogFlow(("TRPMGC06: %04x:%08x efl=%x\n", pRegFrame->cs, pRegFrame->eip, pRegFrame->eflags.u32));
-    PVM     pVM = TRPM2VM(pTrpm);
+    PVM     pVM = TRPM2VM(pTrpmCpu);
     PVMCPU  pVCpu = VMMGetCpu0(pVM);
     int     rc;
@@ -422 +422 @@
 #ifdef DTRACE_EXPERIMENT /** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
             Assert(!PATMIsPatchGCAddr(pVM, (RTRCPTR)pRegFrame->eip));
-            rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
             Assert(rc == VINF_EM_RAW_GUEST_TRAP);
 #else
@@ -444 +444 @@
     else
     {
-        rc = TRPMForwardTrap(pVM, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
+        rc = TRPMForwardTrap(pVCpu, pRegFrame, 0x6, 0, TRPM_TRAP_NO_ERRORCODE, TRPM_TRAP, 0x6);
         Assert(rc == VINF_EM_RAW_GUEST_TRAP);
     }
@@ -463 +463 @@
  *          other codes are passed execution to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCTrap07Handler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
+DECLASM(int) TRPMGCTrap07Handler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
 {
     LogFlow(("TRPMGC07: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
-    PVM     pVM   = TRPM2VM(pTrpm);
+    PVM     pVM   = TRPM2VM(pTrpmCpu);
     PVMCPU  pVCpu = VMMGetCpu0(pVM);
 
@@ -487 +487 @@
  *          other codes are passed execution to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
+DECLASM(int) TRPMGCTrap0bHandler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
 {
     LogFlow(("TRPMGC0b: %04x:%08x\n", pRegFrame->cs, pRegFrame->eip));
-    PVM pVM = TRPM2VM(pTrpm);
+    PVM pVM = TRPM2VM(pTrpmCpu);
 
     /*
@@ -564 +564 @@
              * starting from the instruction which caused the trap.
              */
-            pTrpm->uActiveVector = ~0;
+            pTrpmCpu->uActiveVector = ~0;
             Log6(("TRPMGC0b: %Rrc (%04x:%08x) (CG)\n", VINF_EM_RAW_RING_SWITCH, pRegFrame->cs, pRegFrame->eip));
             return VINF_EM_RAW_RING_SWITCH;
@@ -620 +620 @@
                 }
             }
-            rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
             if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
                 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
 
-            pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
-            pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
+            pVCpu->trpm.s.uActiveVector = (pVCpu->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
+            pVCpu->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
             return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
         }
@@ -716 +716 @@
         {
             Assert(pCpu->param1.flags & USE_IMMEDIATE8);
-            rc = TRPMForwardTrap(pVM, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
             if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
                 return trpmGCExitTrap(pVM, VINF_SUCCESS, pRegFrame);
 
-            pVM->trpm.s.uActiveVector = (pVM->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
-            pVM->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
+            pVCpu->trpm.s.uActiveVector = (pVCpu->trpm.s.uActiveErrorCode & X86_TRAP_ERR_SEL_MASK) >> X86_TRAP_ERR_SEL_SHIFT;
+            pVCpu->trpm.s.enmActiveType = TRPM_SOFTWARE_INT;
             return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH_INT, pRegFrame);
         }
@@ -738 +738 @@
         case OP_BOUND:
         case OP_INTO:
-            pVM->trpm.s.uActiveVector = ~0;
+            pVCpu->trpm.s.uActiveVector = ~0;
             return trpmGCExitTrap(pVM, VINF_EM_RAW_RING_SWITCH, pRegFrame);
 
@@ -814 +814 @@
  *
  * @param   pVM         The VM handle.
- * @param   pTrpm       Pointer to TRPM data (within VM).
- * @param   pRegFrame   Pointer to the register frame for the trap.
- */
-static int trpmGCTrap0dHandler(PVM pVM, PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
+ * @param   pRegFrame   Pointer to the register frame for the trap.
+ */
+static int trpmGCTrap0dHandler(PVM pVM, PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
 {
     PVMCPU pVCpu = VMMGetCpu0(pVM);
 
-    LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%08RX32 uErr=%RGv\n", pRegFrame->ss, pRegFrame->eip, pTrpm->uActiveErrorCode));
+    LogFlow(("trpmGCTrap0dHandler: cs:eip=%RTsel:%08RX32 uErr=%RGv\n", pRegFrame->ss, pRegFrame->eip, pTrpmCpu->uActiveErrorCode));
 
     /*
@@ -870 +870 @@
      * Deal with I/O port access.
      */
-    if (    pVM->trpm.s.uActiveErrorCode == 0
+    if (    pVCpu->trpm.s.uActiveErrorCode == 0
         &&  (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
     {
@@ -905 +905 @@
         Assert(eflags.Bits.u2IOPL == 0);
 
-        int rc = TRPMForwardTrap(pVM, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xd);
+        int rc = TRPMForwardTrap(pVCpu, pRegFrame, 0xD, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xd);
         Assert(rc == VINF_EM_RAW_GUEST_TRAP);
         return trpmGCExitTrap(pVM, rc, pRegFrame);
@@ -920 +920 @@
  *          other codes are passed execution to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
-{
-    LogFlow(("TRPMGC0d: %04x:%08x err=%x\n", pRegFrame->cs, pRegFrame->eip, (uint32_t)pTrpm->uActiveErrorCode));
-    PVM pVM = TRPM2VM(pTrpm);
-
-    int rc = trpmGCTrap0dHandler(pVM, pTrpm, pRegFrame);
+DECLASM(int) TRPMGCTrap0dHandler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
+{
+    PVM pVM = TRPM2VM(pTrpmCpu);
+    PVMCPU pVCpu = VMMGetCpu0(pVM);
+
+    LogFlow(("TRPMGC0d: %04x:%08x err=%x\n", pRegFrame->cs, pRegFrame->eip, (uint32_t)pVCpu->trpm.s.uActiveErrorCode));
+
+    int rc = trpmGCTrap0dHandler(pVM, pTrpmCpu, pRegFrame);
     switch (rc)
     {
@@ -939 +941 @@
 
         case VINF_EM_RAW_INTERRUPT_PENDING:
-            Assert(TRPMHasTrap(pVM));
+            Assert(TRPMHasTrap(pVCpu));
             /* no break; */
         case VINF_PGM_SYNC_CR3: /** @todo Check this with Sander. */
@@ -976 +978 @@
  *          other codes are passed execution to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
-{
-    LogFlow(("TRPMGC0e: %04x:%08x err=%x cr2=%08x\n", pRegFrame->cs, pRegFrame->eip, (uint32_t)pTrpm->uActiveErrorCode, (uint32_t)pTrpm->uActiveCR2));
-    PVM     pVM = TRPM2VM(pTrpm);
+DECLASM(int) TRPMGCTrap0eHandler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
+{
+    PVM     pVM = TRPM2VM(pTrpmCpu);
     PVMCPU  pVCpu = VMMGetCpu0(pVM);
 
+    LogFlow(("TRPMGC0e: %04x:%08x err=%x cr2=%08x\n", pRegFrame->cs, pRegFrame->eip, (uint32_t)pVCpu->trpm.s.uActiveErrorCode, (uint32_t)pVCpu->trpm.s.uActiveCR2));
 
     /*
      * This is all PGM stuff.
      */
-    int rc = PGMTrap0eHandler(pVCpu, pTrpm->uActiveErrorCode, pRegFrame, (RTGCPTR)pTrpm->uActiveCR2);
+    int rc = PGMTrap0eHandler(pVCpu, pVCpu->trpm.s.uActiveErrorCode, pRegFrame, (RTGCPTR)pVCpu->trpm.s.uActiveCR2);
     switch (rc)
     {
@@ -1007 +1009 @@
                 return VINF_PATM_PATCH_TRAP_PF;
 
-            rc = TRPMForwardTrap(pVM, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xe);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, 0xE, 0, TRPM_TRAP_HAS_ERRORCODE, TRPM_TRAP, 0xe);
             Assert(rc == VINF_EM_RAW_GUEST_TRAP);
             break;
 
         case VINF_EM_RAW_INTERRUPT_PENDING:
-            Assert(TRPMHasTrap(pVM));
+            Assert(TRPMHasTrap(pVCpu));
             /* no break; */
         case VINF_IOM_HC_MMIO_READ:
@@ -1089 +1091 @@
  *          other codes are passed back to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
-{
-    return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
+DECLASM(int) TRPMGCHyperTrap0bHandler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
+{
+    return trpmGCHyperGeneric(TRPM2VM(pTrpmCpu), pRegFrame, g_aTrap0bHandlers, g_aTrap0bHandlersEnd);
 }
 
@@ -1108 +1110 @@
  *          other codes are passed back to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
-{
-    return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
+DECLASM(int) TRPMGCHyperTrap0dHandler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
+{
+    return trpmGCHyperGeneric(TRPM2VM(pTrpmCpu), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
 }
 
@@ -1127 +1129 @@
  *          other codes are passed back to host context.
  *
- * @param   pTrpm       Pointer to TRPM data (within VM).
+ * @param   pTrpmCpu    Pointer to TRPMCPU data (within VM).
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @internal
  */
-DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPM pTrpm, PCPUMCTXCORE pRegFrame)
-{
-    return trpmGCHyperGeneric(TRPM2VM(pTrpm), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
+DECLASM(int) TRPMGCHyperTrap0eHandler(PTRPMCPU pTrpmCpu, PCPUMCTXCORE pRegFrame)
+{
+    return trpmGCHyperGeneric(TRPM2VM(pTrpmCpu), pRegFrame, g_aTrap0dHandlers, g_aTrap0dHandlersEnd);
 }
 

trunk/src/VBox/VMM/VMMGC/TRPMGCHandlersA.asm

@@ -37 +37 @@
 extern IMPNAME(g_CPUM)                  ; These IMPNAME(g_*) symbols resolve to the import table
 extern IMPNAME(g_TRPM)                  ; where there is a pointer to the real symbol. PE imports
-extern IMPNAME(g_VM)                    ; are a bit confusing at first... :-)
+extern IMPNAME(g_TRPMCPU)               ; are a bit confusing at first... :-)
+extern IMPNAME(g_VM)                    
 extern NAME(CPUMGCRestoreInt)
 extern NAME(cpumHandleLazyFPUAsm)
@@ -338 +339 @@
     ; Store the information about the active trap/interrupt.
     ;
-    mov     eax, IMP(g_TRPM)
+    mov     eax, IMP(g_TRPMCPU)
     movzx   edx, byte [esp + 0h + ESPOFF]  ; vector number
-    mov     [eax + TRPM.uActiveVector], edx
+    mov     [eax + TRPMCPU.uActiveVector], edx
     mov     edx, [esp + 4h + ESPOFF]       ; error code
-    mov     [eax + TRPM.uActiveErrorCode], edx
-    mov     dword [eax + TRPM.enmActiveType], TRPM_TRAP
+    mov     [eax + TRPMCPU.uActiveErrorCode], edx
+    mov     dword [eax + TRPMCPU.enmActiveType], TRPM_TRAP
     mov     edx, cr2                       ;; @todo Check how expensive cr2 reads are!
-    mov     dword [eax + TRPM.uActiveCR2], edx
+    mov     dword [eax + TRPMCPU.uActiveCR2], edx
 
 %if GC_ARCH_BITS == 64
     ; zero out the high dword
-    mov     dword [eax + TRPM.uActiveErrorCode + 4], 0
-    mov     dword [eax + TRPM.uActiveCR2 + 4], 0
+    mov     dword [eax + TRPMCPU.uActiveErrorCode + 4], 0
+    mov     dword [eax + TRPMCPU.uActiveCR2 + 4], 0
 %endif
 
@@ -389 +390 @@
 gt_HaveHandler:
     push    esp                         ; Param 2 - CPUMCTXCORE pointer.
-    push    dword IMP(g_TRPM)           ; Param 1 - Pointer to TRPM
+    push    dword IMP(g_TRPMCPU)        ; Param 1 - Pointer to TRPMCPU
     call    eax
     add     esp, byte 8                 ; cleanup stack (cdecl)
@@ -537 +538 @@
     ; Trap in Hypervisor, try to handle it.
     ;
-    ;   (eax = pTRPM)
+    ;   (eax = pTRPMCPU)
     ;
 ALIGNCODE(16)
@@ -557 +558 @@
 
     ; check for temporary handler.
-    movzx   ebx, byte [eax + TRPM.uActiveVector]
+    movzx   ebx, byte [eax + TRPMCPU.uActiveVector]
+    mov     eax, IMP(g_TRPM)
     xor     ecx, ecx
     xchg    ecx, [eax + TRPM.aTmpTrapHandlers + ebx * 4]    ; ecx = Temp handler pointer or 0
@@ -826 +828 @@
     ; Store the information about the active trap/interrupt.
     ;
-    mov     eax, IMP(g_TRPM)
+    mov     eax, IMP(g_TRPMCPU)
     movzx   edx, byte [esp + 0h + ESPOFF]  ; vector number
-    mov     [eax + TRPM.uActiveVector], edx
+    mov     [eax + TRPMCPU.uActiveVector], edx
     xor     edx, edx
-    mov     dword [eax + TRPM.enmActiveType], TRPM_HARDWARE_INT
+    mov     dword [eax + TRPMCPU.enmActiveType], TRPM_HARDWARE_INT
     dec     edx
-    mov     [eax + TRPM.uActiveErrorCode], edx
-    mov     [eax + TRPM.uActiveCR2], edx
+    mov     [eax + TRPMCPU.uActiveErrorCode], edx
+    mov     [eax + TRPMCPU.uActiveCR2], edx
 %if GC_ARCH_BITS == 64
     ; zero out the high dword
-    mov     dword [eax + TRPM.uActiveErrorCode + 4], 0
-    mov     dword [eax + TRPM.uActiveCR2 + 4], 0
+    mov     dword [eax + TRPMCPU.uActiveErrorCode + 4], 0
+    mov     dword [eax + TRPMCPU.uActiveCR2 + 4], 0
 %endif
 
@@ -873 +875 @@
     ;
     ; Reset TRPM state
-    mov     eax, IMP(g_TRPM)
+    mov     eax, IMP(g_TRPMCPU)
     xor     edx, edx
     dec     edx                         ; edx = 0ffffffffh
-    xchg    [eax + TRPM.uActiveVector], edx
-    mov     [eax + TRPM.uPrevVector], edx
+    xchg    [eax + TRPMCPU.uActiveVector], edx
+    mov     [eax + TRPMCPU.uPrevVector], edx
 
     ; Enable WP
@@ -925 +927 @@
     ;
     ; Reset TRPM state - don't record this.
-    mov     eax, IMP(g_TRPM)
-    mov     dword [eax + TRPM.uActiveVector], 0ffffffffh
+    mov     eax, IMP(g_TRPMCPU)
+    mov     dword [eax + TRPMCPU.uActiveVector], 0ffffffffh
 
     ;

trunk/src/VBox/VMM/VMMGC/VMMGCBuiltin.def

@@ -25 +25 @@
     g_CPUM                          DATA
     g_TRPM                          DATA
+    g_TRPMCPU                       DATA
     g_Logger                        DATA
     g_RelLogger                     DATA

trunk/src/VBox/VMM/VMMGuruMeditation.cpp

@@ -265 +265 @@
             RTGCUINT        uErrorCode = 0xdeadface;
             RTGCUINTPTR     uCR2       = 0xdeadface;
-            int rc2 = TRPMQueryTrapAll(pVM, &u8TrapNo, &enmType, &uErrorCode, &uCR2);
+            int rc2 = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrorCode, &uCR2);
             if (!HWACCMR3IsActive(pVM))
             {

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -427 +427 @@
 
     /* When external interrupts are pending, we should exit the VM when IF is set. */
-    if (    !TRPMHasTrap(pVM)
+    if (    !TRPMHasTrap(pVCpu)
         &&  VM_FF_ISPENDING(pVM, (VM_FF_INTERRUPT_APIC|VM_FF_INTERRUPT_PIC)))
     {
@@ -454 +454 @@
             if (RT_SUCCESS(rc))
             {
-                rc = TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
+                rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
                 AssertRC(rc);
             }
@@ -468 +468 @@
 
 #ifdef VBOX_STRICT
-    if (TRPMHasTrap(pVM))
+    if (TRPMHasTrap(pVCpu))
     {
         uint8_t     u8Vector;
-        rc = TRPMQueryTrapAll(pVM, &u8Vector, 0, 0, 0);
+        rc = TRPMQueryTrapAll(pVCpu, &u8Vector, 0, 0, 0);
         AssertRC(rc);
     }
@@ -478 +478 @@
     if (    pCtx->eflags.u32 & X86_EFL_IF
         && (!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
-        && TRPMHasTrap(pVM)
+        && TRPMHasTrap(pVCpu)
        )
     {
@@ -490 +490 @@
 
         /* If a new event is pending, then dispatch it now. */
-        rc = TRPMQueryTrapAll(pVM, &u8Vector, &enmType, &u32ErrorCode, 0);
+        rc = TRPMQueryTrapAll(pVCpu, &u8Vector, &enmType, &u32ErrorCode, 0);
         AssertRC(rc);
         Assert(pCtx->eflags.Bits.u1IF == 1 || enmType == TRPM_TRAP);
@@ -496 +496 @@
 
         /* Clear the pending trap. */
-        rc = TRPMResetTrap(pVM);
+        rc = TRPMResetTrap(pVCpu);
         AssertRC(rc);
 
@@ -1408 +1408 @@
             Log2(("Page fault at %RGv cr2=%RGv error code %x\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode));
             /* Exit qualification contains the linear address of the page fault. */
-            TRPMAssertTrap(pVM, X86_XCPT_PF, TRPM_TRAP);
-            TRPMSetErrorCode(pVM, errCode);
-            TRPMSetFaultAddress(pVM, uFaultAddress);
+            TRPMAssertTrap(pVCpu, X86_XCPT_PF, TRPM_TRAP);
+            TRPMSetErrorCode(pVCpu, errCode);
+            TRPMSetFaultAddress(pVCpu, uFaultAddress);
 
             /* Forward it to our trap handler first, in case our shadow pages are out of sync. */
@@ -1420 +1420 @@
                 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowPF);
 
-                TRPMResetTrap(pVM);
+                TRPMResetTrap(pVCpu);
 
                 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
@@ -1433 +1433 @@
                 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestPF);
                 /* The error code might have been changed. */
-                errCode = TRPMGetErrorCode(pVM);
-
-                TRPMResetTrap(pVM);
+                errCode = TRPMGetErrorCode(pVCpu);
+
+                TRPMResetTrap(pVCpu);
 
                 /* Now we must update CR2. */
@@ -1457 +1457 @@
 #endif
             /* Need to go back to the recompiler to emulate the instruction. */
-            TRPMResetTrap(pVM);
+            TRPMResetTrap(pVCpu);
             break;
         }
@@ -1546 +1546 @@
         Log(("Nested page fault at %RGv cr2=%RGp error code %x\n", (RTGCPTR)pCtx->rip, uFaultAddress, errCode));
         /* Exit qualification contains the linear address of the page fault. */
-        TRPMAssertTrap(pVM, X86_XCPT_PF, TRPM_TRAP);
-        TRPMSetErrorCode(pVM, errCode);
-        TRPMSetFaultAddress(pVM, uFaultAddress);
+        TRPMAssertTrap(pVCpu, X86_XCPT_PF, TRPM_TRAP);
+        TRPMSetErrorCode(pVCpu, errCode);
+        TRPMSetFaultAddress(pVCpu, uFaultAddress);
 
         /* Handle the pagefault trap for the nested shadow table. */
@@ -1565 +1565 @@
             STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowPF);
 
-            TRPMResetTrap(pVM);
+            TRPMResetTrap(pVCpu);
 
             STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
@@ -1576 +1576 @@
 #endif
         /* Need to go back to the recompiler to emulate the instruction. */
-        TRPMResetTrap(pVM);
+        TRPMResetTrap(pVCpu);
         break;
     }

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -736 +736 @@
 
     /* When external interrupts are pending, we should exit the VM when IF is set. */
-    if (    !TRPMHasTrap(pVM)
+    if (    !TRPMHasTrap(pVCpu)
         &&  VM_FF_ISPENDING(pVM, (VM_FF_INTERRUPT_APIC|VM_FF_INTERRUPT_PIC)))
     {
@@ -759 +759 @@
             if (RT_SUCCESS(rc))
             {
-                rc = TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
+                rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
                 AssertRC(rc);
             }
@@ -775 +775 @@
 
 #ifdef VBOX_STRICT
-    if (TRPMHasTrap(pVM))
+    if (TRPMHasTrap(pVCpu))
     {
         uint8_t     u8Vector;
-        rc = TRPMQueryTrapAll(pVM, &u8Vector, 0, 0, 0);
+        rc = TRPMQueryTrapAll(pVCpu, &u8Vector, 0, 0, 0);
         AssertRC(rc);
     }
@@ -785 +785 @@
     if (    pCtx->eflags.u32 & X86_EFL_IF
         && (!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS))
-        && TRPMHasTrap(pVM)
+        && TRPMHasTrap(pVCpu)
        )
     {
@@ -795 +795 @@
 
         /* If a new event is pending, then dispatch it now. */
-        rc = TRPMQueryTrapAll(pVM, &u8Vector, &enmType, &errCode, 0);
+        rc = TRPMQueryTrapAll(pVCpu, &u8Vector, &enmType, &errCode, 0);
         AssertRC(rc);
         Assert(pCtx->eflags.Bits.u1IF == 1 || enmType == TRPM_TRAP);
@@ -801 +801 @@
 
         /* Clear the pending trap. */
-        rc = TRPMResetTrap(pVM);
+        rc = TRPMResetTrap(pVCpu);
         AssertRC(rc);
 
@@ -2384 +2384 @@
                 Log2(("Page fault at %RGv error code %x\n", exitQualification, errCode));
                 /* Exit qualification contains the linear address of the page fault. */
-                TRPMAssertTrap(pVM, X86_XCPT_PF, TRPM_TRAP);
-                TRPMSetErrorCode(pVM, errCode);
-                TRPMSetFaultAddress(pVM, exitQualification);
+                TRPMAssertTrap(pVCpu, X86_XCPT_PF, TRPM_TRAP);
+                TRPMSetErrorCode(pVCpu, errCode);
+                TRPMSetFaultAddress(pVCpu, exitQualification);
 
                 /* Forward it to our trap handler first, in case our shadow pages are out of sync. */
@@ -2396 +2396 @@
                     STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitShadowPF);
 
-                    TRPMResetTrap(pVM);
+                    TRPMResetTrap(pVCpu);
 
                     STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub3, y3);
@@ -2410 +2410 @@
                     STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitGuestPF);
                     /* The error code might have been changed. */
-                    errCode = TRPMGetErrorCode(pVM);
-
-                    TRPMResetTrap(pVM);
+                    errCode = TRPMGetErrorCode(pVCpu);
+
+                    TRPMResetTrap(pVCpu);
 
                     /* Now we must update CR2. */
@@ -2427 +2427 @@
 #endif
                 /* Need to go back to the recompiler to emulate the instruction. */
-                TRPMResetTrap(pVM);
+                TRPMResetTrap(pVCpu);
                 break;
             }
@@ -2849 +2849 @@
 
         /* GCPhys contains the guest physical address of the page fault. */
-        TRPMAssertTrap(pVM, X86_XCPT_PF, TRPM_TRAP);
-        TRPMSetErrorCode(pVM, errCode);
-        TRPMSetFaultAddress(pVM, GCPhys);
+        TRPMAssertTrap(pVCpu, X86_XCPT_PF, TRPM_TRAP);
+        TRPMSetErrorCode(pVCpu, errCode);
+        TRPMSetFaultAddress(pVCpu, GCPhys);
 
         /* Handle the pagefault trap for the nested shadow table. */
@@ -2861 +2861 @@
             STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitReasonNPF);
 
-            TRPMResetTrap(pVM);
+            TRPMResetTrap(pVCpu);
 
             goto ResumeExecution;
@@ -2871 +2871 @@
 #endif
         /* Need to go back to the recompiler to emulate the instruction. */
-        TRPMResetTrap(pVM);
+        TRPMResetTrap(pVCpu);
         break;
     }

trunk/src/VBox/VMM/VMMR0/TRPMR0.cpp

@@ -28 +28 @@
 #include "TRPMInternal.h"
 #include <VBox/vm.h>
+#include <VBox/vmm.h>
 #include <VBox/err.h>
 #include <VBox/log.h>
@@ -42 +43 @@
 VMMR0DECL(void) TRPMR0DispatchHostInterrupt(PVM pVM)
 {
-    RTUINT uActiveVector = pVM->trpm.s.uActiveVector;
-    pVM->trpm.s.uActiveVector = ~0;
+    PVMCPU pVCpu = VMMGetCpu0(pVM);
+    RTUINT uActiveVector = pVCpu->trpm.s.uActiveVector;
+
+    pVCpu->trpm.s.uActiveVector = ~0;
     AssertMsgReturnVoid(uActiveVector < 256, ("uActiveVector=%#x is invalid! (More assertions to come, please enjoy!)\n", uActiveVector));
 

trunk/src/VBox/VMM/VMMTests.cpp

@@ -127 +127 @@
              &&  u8Trap != 3 /* guest only, we're not in guest. */
              &&  u8Trap != 1 /* guest only, we're not in guest. */
-             &&  u8Trap != TRPMGetTrapNo(pVM))
-    {
-        RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVM), u8Trap);
+             &&  u8Trap != TRPMGetTrapNo(pVCpu))
+    {
+        RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVCpu), u8Trap);
         fDump = true;
     }

trunk/src/VBox/VMM/testcase/tstVMStructGC.cpp

@@ -853 +853 @@
 
     GEN_CHECK_SIZE(TRPM); // has .mac
+    GEN_CHECK_SIZE(TRPMCPU); // has .mac
     GEN_CHECK_SIZE(VM);  // has .mac
     GEN_CHECK_SIZE(VMM);

trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp

@@ -160 +160 @@
     CHECK_PADDING_VMCPU(em);
     CHECK_PADDING_VMCPU(hwaccm);
+    CHECK_PADDING_VMCPU(trpm);
     CHECK_PADDING_VMCPU(tm);
     CHECK_PADDING_VMCPU(vmm);

trunk/src/recompiler_new/VBoxREMWrapper.cpp

@@ -910 +910 @@
 static const REMPARMDESC g_aArgsTRPMAssertTrap[] =
 {
-    { REMPARMDESC_FLAGS_INT,        sizeof(PVM), NULL },
+    { REMPARMDESC_FLAGS_INT,        sizeof(PVMCPU), NULL },
     { REMPARMDESC_FLAGS_INT,        sizeof(uint8_t), NULL },
     { REMPARMDESC_FLAGS_INT,        sizeof(TRPMEVENT), NULL }
@@ -916 +916 @@
 static const REMPARMDESC g_aArgsTRPMQueryTrap[] =
 {
-    { REMPARMDESC_FLAGS_INT,        sizeof(PVM), NULL },
+    { REMPARMDESC_FLAGS_INT,        sizeof(PVMCPU), NULL },
     { REMPARMDESC_FLAGS_INT,        sizeof(uint8_t *), NULL },
     { REMPARMDESC_FLAGS_INT,        sizeof(TRPMEVENT *), NULL }
@@ -922 +922 @@
 static const REMPARMDESC g_aArgsTRPMSetErrorCode[] =
 {
-    { REMPARMDESC_FLAGS_INT,        sizeof(PVM), NULL },
+    { REMPARMDESC_FLAGS_INT,        sizeof(PVMCPU), NULL },
     { REMPARMDESC_FLAGS_GCPTR,      sizeof(RTGCUINT), NULL }
 };
 static const REMPARMDESC g_aArgsTRPMSetFaultAddress[] =
 {
-    { REMPARMDESC_FLAGS_INT,        sizeof(PVM), NULL },
+    { REMPARMDESC_FLAGS_INT,        sizeof(PVMCPU), NULL },
     { REMPARMDESC_FLAGS_GCPTR,      sizeof(RTGCUINT), NULL }
 };

trunk/src/recompiler_new/VBoxRecompiler.c

@@ -2115 +2115 @@
      */
     pVM->rem.s.Env.exception_index = -1; /** @todo this won't work :/ */
-    rc = TRPMQueryTrap(pVM, &u8TrapNo, &enmType);
+    rc = TRPMQueryTrap(pVCpu, &u8TrapNo, &enmType);
     if (RT_SUCCESS(rc))
     {
@@ -2159 +2159 @@
         {
             case 0x0e:
-                pVM->rem.s.Env.cr[2] = TRPMGetFaultAddress(pVM);
+                pVM->rem.s.Env.cr[2] = TRPMGetFaultAddress(pVCpu);
                 /* fallthru */
             case 0x0a: case 0x0b: case 0x0c: case 0x0d:
-                pVM->rem.s.Env.error_code = TRPMGetErrorCode(pVM);
+                pVM->rem.s.Env.error_code = TRPMGetErrorCode(pVCpu);
                 break;
 
@@ -2174 +2174 @@
          * We can now reset the active trap since the recompiler is gonna have a go at it.
          */
-        rc = TRPMResetTrap(pVM);
+        rc = TRPMResetTrap(pVCpu);
         AssertRC(rc);
         Log2(("REMR3State: trap=%02x errcd=%RGv cr2=%RGv nexteip=%RGv%s\n", pVM->rem.s.Env.exception_index, (RTGCPTR)pVM->rem.s.Env.error_code,
@@ -2425 +2425 @@
 
         Log(("REMR3StateBack: Pending trap %x %d\n", pVM->rem.s.Env.exception_index, pVM->rem.s.Env.exception_is_int));
-        rc = TRPMAssertTrap(pVM, pVM->rem.s.Env.exception_index, (pVM->rem.s.Env.exception_is_int) ? TRPM_SOFTWARE_INT : TRPM_HARDWARE_INT);
+        rc = TRPMAssertTrap(pVCpu, pVM->rem.s.Env.exception_index, (pVM->rem.s.Env.exception_is_int) ? TRPM_SOFTWARE_INT : TRPM_HARDWARE_INT);
         AssertRC(rc);
         switch (pVM->rem.s.Env.exception_index)
         {
             case 0x0e:
-                TRPMSetFaultAddress(pVM, pCtx->cr2);
+                TRPMSetFaultAddress(pVCpu, pCtx->cr2);
                 /* fallthru */
             case 0x0a: case 0x0b: case 0x0c: case 0x0d:
             case 0x11: case 0x08: /* 0 */
-                TRPMSetErrorCode(pVM, pVM->rem.s.Env.error_code);
+                TRPMSetErrorCode(pVCpu, pVM->rem.s.Env.error_code);
                 break;
         }