VirtualBox

vbox的更動 45485 路徑 trunk/src/VBox/VMM/VMMRC


忽略:
時間撮記:
2013-4-11 下午02:46:04 (12 年 以前)
作者:
vboxsync
訊息:
  • *: Where possible, drop the #ifdef VBOX_WITH_RAW_RING1 when EMIsRawRing1Enabled is used.
  • SELM: Don't shadow TSS.esp1/ss1 unless ring-1 compression is enabled (also fixed a log statement there).
  • SELM: selmGuestToShadowDesc should not push ring-1 selectors into ring-2 unless EMIsRawRing1Enabled() holds true.
  • REM: Don't set CPU_INTERRUPT_EXTERNAL_EXIT in helper_ltr() for now.
位置:
trunk/src/VBox/VMM/VMMRC
檔案:
修改 4 筆資料

圖例:

未更動
新增
刪除

  • trunk/src/VBox/VMM/VMMRC/CPUMRC.cpp

    r45276 r45485  
    115115 * @param   pVCpu       The current virtual CPU.
    116116 * @param   pRegFrame   Pointer to the register frame.
     117 *
     118 * @todo    r=bird: This is very similar to CPUMGetGuestCPL and I cannot quite
     119 *          see why this variant of the code is necessary.
    117120 */
    118121VMMDECL(uint32_t) CPUMRCGetGuestCPL(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
    … …  
    142145        if (pVCpu->cpum.s.fRawEntered)
    143146        {
    144             if (    EMIsRawRing1Enabled(pVCpu->CTX_SUFF(pVM))
    145                 &&  uCpl == 2)
     147            if (   uCpl == 2
     148                && EMIsRawRing1Enabled(pVCpu->CTX_SUFF(pVM)) )
    146149                uCpl = 1;
    147             else
    148             if (uCpl == 1)
     150            else if (uCpl == 1)
    149151                uCpl = 0;
    150152        }
    … …  
    162164}
    163165
     166
    164167#ifdef VBOX_WITH_RAW_RING1
    165168/**
    … …  
    168171 * This function will change the any of the cs and ss register with DPL=0 to DPL=1.
    169172 *
    170  * @returns VBox status. (recompiler failure)
     173 * Used by emInterpretIret() after the new state has been loaded.
     174 *
    171175 * @param   pVCpu       Pointer to the VMCPU.
    172176 * @param   pCtxCore    The context core (for trap usage).
    173177 * @see     @ref pg_raw
     178 * @remarks Will be probably obsoleted by #5653 (it will leave and reenter raw
     179 *          mode instead, I think).
    174180 */
    175181VMMDECL(void) CPUMRCRecheckRawState(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore)
    … …  
    213219}
    214220#endif /* VBOX_WITH_RAW_RING1 */
     221

  • trunk/src/VBox/VMM/VMMRC/PATMRC.cpp

    r45276 r45485  
    155155
    156156    /* Very important check -> otherwise we have a security leak. */
    157 #ifdef VBOX_WITH_RAW_RING1
    158     AssertReturn(!pRegFrame->eflags.Bits.u1VM && (pRegFrame->ss.Sel & X86_SEL_RPL) <= (unsigned) (EMIsRawRing1Enabled(pVM) ? 2 : 1), VERR_ACCESS_DENIED);
    159 #else
    160     AssertReturn(!pRegFrame->eflags.Bits.u1VM && (pRegFrame->ss.Sel & X86_SEL_RPL) == 1, VERR_ACCESS_DENIED);
    161 #endif
     157    AssertReturn(!pRegFrame->eflags.Bits.u1VM && (pRegFrame->ss.Sel & X86_SEL_RPL) <= (EMIsRawRing1Enabled(pVM) ? 2U : 1U),
     158                 VERR_ACCESS_DENIED);
    162159    Assert(PATMIsPatchGCAddr(pVM, pRegFrame->eip));
    163160
    … …  
    459456    int rc;
    460457
    461 #ifdef VBOX_WITH_RAW_RING1
    462     AssertReturn(!pRegFrame->eflags.Bits.u1VM && ((pRegFrame->ss.Sel & X86_SEL_RPL) == 1 || (EMIsRawRing1Enabled(pVM) && (pRegFrame->ss.Sel & X86_SEL_RPL) == 2)), VERR_ACCESS_DENIED);
    463 #else
    464     AssertReturn(!pRegFrame->eflags.Bits.u1VM && (pRegFrame->ss.Sel & X86_SEL_RPL) == 1, VERR_ACCESS_DENIED);
    465 #endif
     458    AssertReturn(!pRegFrame->eflags.Bits.u1VM
     459                 && (   (pRegFrame->ss.Sel & X86_SEL_RPL) == 1
     460                     || (EMIsRawRing1Enabled(pVM) && (pRegFrame->ss.Sel & X86_SEL_RPL) == 2)), VERR_ACCESS_DENIED);
    466461
    467462    /* Int 3 in PATM generated code? (most common case) */

  • trunk/src/VBox/VMM/VMMRC/SELMRC.cpp

    r45276 r45485  
    3535#include <iprt/asm.h>
    3636
     37#include "SELMInline.h"
     38
    3739
    3840/*******************************************************************************
    … …  
    4345static char const g_aszSRegNms[X86_SREG_COUNT][4] = { "ES", "CS", "SS", "DS", "FS", "GS" };
    4446#endif
     47
    4548
    4649#ifdef SELM_TRACK_GUEST_GDT_CHANGES
    … …  
    308311#endif /* SELM_TRACK_GUEST_GDT_CHANGES */
    309312
     313
    310314#ifdef SELM_TRACK_GUEST_LDT_CHANGES
    311315/**
    … …  
    332336}
    333337#endif
     338
    334339
    335340#ifdef SELM_TRACK_GUEST_TSS_CHANGES
    … …  
    407412        }
    408413#ifdef VBOX_WITH_RAW_RING1
    409         else
    410         if (    EMIsRawRing1Enabled(pVM)
    411             &&  PAGE_ADDRESS(&pGuestTss->esp1) == PAGE_ADDRESS(&pGuestTss->padding_ss1)
    412             &&  PAGE_ADDRESS(&pGuestTss->esp1) == PAGE_ADDRESS((uint8_t *)pGuestTss + offRange)
    413             &&  (    pGuestTss->esp1 !=  pVM->selm.s.Tss.esp2
    414                  ||  pGuestTss->ss1  != ((pVM->selm.s.Tss.ss2 & ~2) | 1)) /* undo raw-r1 */
    415            )
     414        else if (    EMIsRawRing1Enabled(pVM)
     415                 &&  PAGE_ADDRESS(&pGuestTss->esp1) == PAGE_ADDRESS(&pGuestTss->padding_ss1)
     416                 &&  PAGE_ADDRESS(&pGuestTss->esp1) == PAGE_ADDRESS((uint8_t *)pGuestTss + offRange)
     417                 &&  (    pGuestTss->esp1 !=  pVM->selm.s.Tss.esp2
     418                      ||  pGuestTss->ss1  != ((pVM->selm.s.Tss.ss2 & ~2) | 1)) /* undo raw-r1 */
     419                )
    416420        {
    417421            Log(("selmRCGuestTSSWriteHandler: R1 stack: %RTsel:%RGv -> %RTsel:%RGv\n",
    … …  
    513517#endif /* SELM_TRACK_GUEST_TSS_CHANGES */
    514518
     519
    515520#ifdef SELM_TRACK_SHADOW_GDT_CHANGES
    516521/**
    … …  
    534539#endif
    535540
     541
    536542#ifdef SELM_TRACK_SHADOW_LDT_CHANGES
    537543/**
    … …  
    556562#endif
    557563
     564
    558565#ifdef SELM_TRACK_SHADOW_TSS_CHANGES
    559566/**

  • trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

    r45305 r45485  
    304304    PVM         pVM   = TRPMCPU_2_VM(pTrpmCpu);
    305305    PVMCPU      pVCpu = TRPMCPU_2_VMCPU(pTrpmCpu);
    306     //LogFlow(("TRPMGC01: cs:eip=%04x:%08x uDr6=%RTreg EFL=%x\n", pRegFrame->cs.Sel, pRegFrame->eip, uDr6, CPUMRawGetEFlags(pVCpu)));
     306    LogFlow(("TRPMGC01: cs:eip=%04x:%08x uDr6=%RTreg EFL=%x\n", pRegFrame->cs.Sel, pRegFrame->eip, uDr6, CPUMRawGetEFlags(pVCpu)));
    307307    TRPM_ENTER_DBG_HOOK(1);
    308308
    … …  
    445445     * PATM is using INT3s, let them have a go first.
    446446     */
    447 #ifdef VBOX_WITH_RAW_RING1
    448     if (    (   (pRegFrame->ss.Sel & X86_SEL_RPL) == 1
    449              || (EMIsRawRing1Enabled(pVM) && (pRegFrame->ss.Sel & X86_SEL_RPL) == 2))
    450 #else
    451     if (    (pRegFrame->ss.Sel & X86_SEL_RPL) == 1
    452 #endif
    453         &&  !pRegFrame->eflags.Bits.u1VM)
     447    if (   (   (pRegFrame->ss.Sel & X86_SEL_RPL) == 1
     448            || (EMIsRawRing1Enabled(pVM) && (pRegFrame->ss.Sel & X86_SEL_RPL) == 2) )
     449        && !pRegFrame->eflags.Bits.u1VM)
    454450    {
    455451        rc = PATMRCHandleInt3PatchTrap(pVM, pRegFrame);
    … …  
    528524    PGMRZDynMapStartAutoSet(pVCpu);
    529525
    530 #ifdef VBOX_WITH_RAW_RING1
    531     if (CPUMGetGuestCPL(pVCpu) <= (unsigned)(EMIsRawRing1Enabled(pVM) ? 1 : 0))
    532 #else
    533     if (CPUMGetGuestCPL(pVCpu) == 0)
    534 #endif
     526    if (CPUMGetGuestCPL(pVCpu) <= (EMIsRawRing1Enabled(pVM) ? 1U : 0U))
    535527    {
    536528        /*
注意: 瀏覽 TracChangeset 來幫助您使用更動檢視器

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette