VirtualBox

儲存庫 vbox 的更動 46089


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時間撮記:
2013-5-15 上午09:56:41 (12 年 以前)
作者:
vboxsync
訊息:

VMM/HMVMXR0: Be more explicit about type sizes. It's rather critical in this area.

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修改 1 筆資料

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  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r46079 r46089  
    38493849
    38503850#ifdef VBOX_STRICT
    3851                 Log(("uExitReason        %#x (VmxTransient %#x)\n", pVCpu->hm.s.vmx.lasterror.u32ExitReason,
    3852                                                                     pVmxTransient->uExitReason));
    3853                 Log(("Exit Qualification %#x\n", pVmxTransient->uExitQualification));
    3854                 Log(("InstrError         %#x\n", pVCpu->hm.s.vmx.lasterror.u32InstrError));
     3851                Log(("uExitReason        %#RX32 (VmxTransient %#RX16)\n", pVCpu->hm.s.vmx.lasterror.u32ExitReason,
     3852                     pVmxTransient->uExitReason));
     3853                Log(("Exit Qualification %#RX64\n", pVmxTransient->uExitQualification));
     3854                Log(("InstrError         %#RX32\n", pVCpu->hm.s.vmx.lasterror.u32InstrError));
    38553855                if (pVCpu->hm.s.vmx.lasterror.u32InstrError <= HMVMX_INSTR_ERROR_MAX)
    38563856                    Log(("InstrError Desc.  \"%s\"\n", g_apszVmxInstrErrors[pVCpu->hm.s.vmx.lasterror.u32InstrError]));
     
    48154815    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_RIP))
    48164816    {
    4817         uint64_t uVal = 0;
    4818         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RIP, &uVal);
     4817        uint64_t u64Val = 0;
     4818        rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RIP, &u64Val);
    48194819        AssertRCReturn(rc, rc);
    48204820
    4821         pMixedCtx->rip = uVal;
     4821        pMixedCtx->rip = u64Val;
    48224822        pVCpu->hm.s.vmx.fUpdatedGuestState |= HMVMX_UPDATED_GUEST_RIP;
    48234823    }
     
    48424842    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_RSP))
    48434843    {
    4844         uint64_t uVal = 0;
    4845         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RSP, &uVal);
     4844        uint64_t u64Val = 0;
     4845        rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RSP, &u64Val);
    48464846        AssertRCReturn(rc, rc);
    48474847
    4848         pMixedCtx->rsp = uVal;
     4848        pMixedCtx->rsp = u64Val;
    48494849        pVCpu->hm.s.vmx.fUpdatedGuestState |= HMVMX_UPDATED_GUEST_RSP;
    48504850    }
     
    49774977    }
    49784978
    4979     uint64_t uGCVal = 0;
     4979    uint64_t u64Val = 0;
    49804980    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_SYSENTER_EIP_MSR))
    49814981    {
    4982         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_SYSENTER_EIP, &uGCVal);    AssertRCReturn(rc, rc);
    4983         pMixedCtx->SysEnter.eip = uGCVal;
     4982        rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_SYSENTER_EIP, &u64Val);    AssertRCReturn(rc, rc);
     4983        pMixedCtx->SysEnter.eip = u64Val;
    49844984        pVCpu->hm.s.vmx.fUpdatedGuestState |= HMVMX_UPDATED_GUEST_SYSENTER_EIP_MSR;
    49854985    }
    49864986    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_SYSENTER_ESP_MSR))
    49874987    {
    4988         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_SYSENTER_ESP, &uGCVal);    AssertRCReturn(rc, rc);
    4989         pMixedCtx->SysEnter.esp = uGCVal;
     4988        rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_SYSENTER_ESP, &u64Val);    AssertRCReturn(rc, rc);
     4989        pMixedCtx->SysEnter.esp = u64Val;
    49904990        pVCpu->hm.s.vmx.fUpdatedGuestState |= HMVMX_UPDATED_GUEST_SYSENTER_ESP_MSR;
    49914991    }
     
    50115011    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_FS_BASE_MSR))
    50125012    {
    5013         uint64_t uVal = 0;
    5014         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_FS_BASE, &uVal);   AssertRCReturn(rc, rc);
    5015         pMixedCtx->fs.u64Base = uVal;
     5013        uint64_t u64Val = 0;
     5014        rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_FS_BASE, &u64Val);   AssertRCReturn(rc, rc);
     5015        pMixedCtx->fs.u64Base = u64Val;
    50165016        pVCpu->hm.s.vmx.fUpdatedGuestState |= HMVMX_UPDATED_GUEST_FS_BASE_MSR;
    50175017    }
     
    50375037    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_GS_BASE_MSR))
    50385038    {
    5039         uint64_t uVal = 0;
    5040         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_GS_BASE, &uVal);   AssertRCReturn(rc, rc);
    5041         pMixedCtx->gs.u64Base = uVal;
     5039        uint64_t u64Val = 0;
     5040        rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_GS_BASE, &u64Val);   AssertRCReturn(rc, rc);
     5041        pMixedCtx->gs.u64Base = u64Val;
    50425042        pVCpu->hm.s.vmx.fUpdatedGuestState |= HMVMX_UPDATED_GUEST_GS_BASE_MSR;
    50435043    }
     
    51255125                && CPUMIsGuestPagingEnabledEx(pMixedCtx)))
    51265126        {
    5127             uint64_t uVal = 0;
    5128             rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_CR3, &uVal);
    5129             if (pMixedCtx->cr3 != uVal)
     5127            uint64_t u64Val = 0;
     5128            rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_CR3, &u64Val);
     5129            if (pMixedCtx->cr3 != u64Val)
    51305130            {
    5131                 CPUMSetGuestCR3(pVCpu, uVal);
     5131                CPUMSetGuestCR3(pVCpu, u64Val);
    51325132                if (VMMRZCallRing3IsEnabled(pVCpu))
    51335133                {
    5134                     PGMUpdateCR3(pVCpu, uVal);
     5134                    PGMUpdateCR3(pVCpu, u64Val);
    51355135                    Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
    51365136                }
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