儲存庫 vbox 的更動 60214

時間撮記:

2016-3-27 下午11:38:25 (9 年 以前)

作者:

vboxsync

訊息:

bs3-cpu-basic-2: more savings

位置:

trunk/src/VBox/ValidationKit/bootsectors

檔案:

• bs3-cpu-basic-2-c.c (修改) (1 筆差異)
• bs3-cpu-basic-2-template.c (修改) (6 筆差異)

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-c.c

@@ -46 +46 @@
 static const BS3TESTMODEENTRY g_aModeTest[] =
 {
-    //BS3TESTMODEENTRY_MODE("tss / gate / esp", bs3CpuBasic2_TssGateEsp),
+    BS3TESTMODEENTRY_MODE("tss / gate / esp", bs3CpuBasic2_TssGateEsp),
     BS3TESTMODEENTRY_MODE("raise xcpt #1", bs3CpuBasic2_RaiseXcpt1),
     //BS3TESTMODEENTRY_CMN("iret", bs3CpuBasic2_iret),

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.c

@@ -465 +465 @@
 
 #if TMPL_MODE == BS3_MODE_PE16 || TMPL_MODE == BS3_MODE_PE16_32
+
 /**
  * Worker for bs3CpuBasic2_TssGateEsp that tests the INT 80 from outer rings.
@@ -518 +519 @@
     }
 }
-#endif
-
-
-BS3_DECL(uint8_t) TMPL_NM(bs3CpuBasic2_TssGateEsp)(uint8_t bMode)
-{
-    uint8_t         bRet = 0;
+
+#define bs3CpuBasic2_TssGateEspCommon BS3_CMN_NM(bs3CpuBasic2_TssGateEspCommon)
+void bs3CpuBasic2_TssGateEspCommon(uint8_t const bMode, const char * const pszMode, bool const f16BitSys,
+                                   PX86DESC const paIdt, unsigned const cIdteShift)
+{
     BS3TRAPFRAME    TrapCtx;
-    BS3REGCTX       Ctx, Ctx2;
+    BS3REGCTX       Ctx;
+    BS3REGCTX       Ctx2;
+# if TMPL_BITS == 16
     uint8_t        *pbTmp;
+# endif
     unsigned        uLine;
-    const char     *pszMode = BS3_DATA_NM(TMPL_NM(g_szBs3ModeName));
-    bool const      f16BitSys = BS3_MODE_IS_16BIT_SYS(TMPL_MODE);
-
-    pbTmp = NULL; NOREF(pbTmp); uLine = 0; NOREF(uLine); NOREF(pszMode); NOREF(f16BitSys);
 
     /* make sure they're allocated  */
@@ -537 +536 @@
     Bs3MemZero(&Ctx2, sizeof(Ctx2));
     Bs3MemZero(&TrapCtx, sizeof(TrapCtx));
-
-#if TMPL_MODE == BS3_MODE_PE16 \
- || TMPL_MODE == BS3_MODE_PE16_32 \
- || TMPL_MODE == BS3_MODE_PP16 \
- || TMPL_MODE == BS3_MODE_PP16_32 \
- || TMPL_MODE == BS3_MODE_PAE16 \
- || TMPL_MODE == BS3_MODE_PAE16_32 \
- || TMPL_MODE == BS3_MODE_PE32
 
     Bs3RegCtxSave(&Ctx);
@@ -558 +549 @@
      * the DPLs.
      */
-    MyBs3Idt[0x80].Gate.u2Dpl = 3;
-    MyBs3Idt[0x81].Gate.u2Dpl = 0;
+    paIdt[0x80 << cIdteShift].Gate.u2Dpl = 3;
+    paIdt[0x81 << cIdteShift].Gate.u2Dpl = 0;
 
     /*
@@ -606 +597 @@
 
             /* Different rings but switch the SS bitness in the TSS. */
+            if (f16BitSys)
+            {
+                Bs3Tss16.ss0 = BS3_SEL_R0_SS32;
+                bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, pbAltStack, cbAltStack,
+                                                          false, f16BitSys, f16BitSys, pszMode, __LINE__);
+                Bs3Tss16.ss0 = BS3_SEL_R0_SS16;
+            }
+            else
+            {
+                Bs3Tss32.ss0 = BS3_SEL_R0_SS16;
+                bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, pbAltStack, cbAltStack,
+                                                          true,  f16BitSys, f16BitSys, pszMode, __LINE__);
+                Bs3Tss32.ss0 = BS3_SEL_R0_SS32;
+            }
+
+            Bs3MemFree(pbAltStack, cbAltStack);
+        }
+        else
+            Bs3TestPrintf("%s: Skipping ESP check, alloc failed\n", pszMode);
+    }
+    else
+        Bs3TestPrintf("%s: Skipping ESP check, CPU too old\n", pszMode);
+}
+
+#endif
+
+
+BS3_DECL(uint8_t) TMPL_NM(bs3CpuBasic2_TssGateEsp)(uint8_t bMode)
+{
+    uint8_t         bRet = 0;
+#if 0
+    BS3TRAPFRAME    TrapCtx;
+    BS3REGCTX       Ctx, Ctx2;
+    uint8_t        *pbTmp;
+    unsigned        uLine;
+    const char     *pszMode = BS3_DATA_NM(TMPL_NM(g_szBs3ModeName));
+    bool const      f16BitSys = BS3_MODE_IS_16BIT_SYS(TMPL_MODE);
+
+    pbTmp = NULL; NOREF(pbTmp); uLine = 0; NOREF(uLine); NOREF(pszMode); NOREF(f16BitSys);
+
+    /* make sure they're allocated  */
+    Bs3MemZero(&Ctx, sizeof(Ctx));
+    Bs3MemZero(&Ctx2, sizeof(Ctx2));
+    Bs3MemZero(&TrapCtx, sizeof(TrapCtx));
+#endif
+
+#if TMPL_MODE == BS3_MODE_PE16 \
+ || TMPL_MODE == BS3_MODE_PE16_32 \
+ || TMPL_MODE == BS3_MODE_PP16 \
+ || TMPL_MODE == BS3_MODE_PP16_32 \
+ || TMPL_MODE == BS3_MODE_PAE16 \
+ || TMPL_MODE == BS3_MODE_PAE16_32 \
+ || TMPL_MODE == BS3_MODE_PE32
+
+#if 1
+    bs3CpuBasic2_TssGateEspCommon(bMode,
+                                  BS3_DATA_NM(TMPL_NM(g_szBs3ModeName)),
+                                  BS3_MODE_IS_16BIT_SYS(TMPL_MODE),
+                                  (PX86DESC)MyBs3Idt,
+                                  BS3_MODE_IS_64BIT_SYS(TMPL_MODE) ? 1 : 0);
+#else
+
+    Bs3RegCtxSave(&Ctx);
+    Ctx.rsp.u -= 0x80;
+    Ctx.rip.u  = (uintptr_t)BS3_FP_OFF(&TMPL_NM(bs3CpuBasic2_Int80));
+# if TMPL_BITS == 32
+    BS3_DATA_NM(g_uBs3TrapEipHint) = Ctx.rip.u32;
+# endif
+
+    /*
+     * We'll be using IDT entry 80 and 81 here. The first one will be
+     * accessible from all DPLs, the latter not. So, start with setting
+     * the DPLs.
+     */
+    MyBs3Idt[0x80].Gate.u2Dpl = 3;
+    MyBs3Idt[0x81].Gate.u2Dpl = 0;
+
+    /*
+     * Check that the basic stuff works first.
+     */
+    Bs3TrapSetJmpAndRestore(&Ctx, &TrapCtx);
+    bs3CpuBasic2_CompareTrapCtx1(&TrapCtx, &Ctx, 2 /*int 80h*/, 0x80 /*bXcpt*/, pszMode, __LINE__);
+
+    bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, NULL, 0, f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);
+    bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 2, NULL, 0, f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);
+    bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 3, NULL, 0, f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);
+
+    /*
+     * Check that the upper part of ESP is preserved when doing .
+     */
+    if ((BS3_DATA_NM(g_uBs3CpuDetected) & BS3CPU_TYPE_MASK) >= BS3CPU_80386)
+    {
+        size_t const cbAltStack = _8K;
+        uint8_t *pbAltStack = Bs3MemAllocZ(BS3MEMKIND_TILED, cbAltStack);
+        if (pbAltStack)
+        {
+            /* same ring */
+            uLine = __LINE__;
+            Bs3MemCpy(&Ctx2, &Ctx, sizeof(Ctx2));
+            Ctx2.rsp.u = Bs3SelPtrToFlat(pbAltStack + 0x1980);
+            if (Bs3TrapSetJmp(&TrapCtx))
+                Bs3RegCtxRestore(&Ctx2, 0); /* (does not return) */
+            bs3CpuBasic2_CompareTrapCtx1(&TrapCtx, &Ctx2, 2 /*int 80h*/, 0x80 /*bXcpt*/, pszMode, uLine);
+# if TMPL_BITS == 16
+            if ((pbTmp = (uint8_t *)ASMMemFirstNonZero(pbAltStack, cbAltStack)) != NULL)
+                Bs3TestFailedF("%u - %s: someone touched the alt stack (%p) with SS:ESP=%04x:%#RX32: %p=%02x\n",
+                               uLine, pszMode, pbAltStack, Ctx2.ss, Ctx2.rsp.u32, pbTmp, *pbTmp);
+# else
+            if (ASMMemIsZero(pbAltStack, cbAltStack))
+                Bs3TestFailedF("%u - %s: alt stack wasn't used despite SS:ESP=%04x:%#RX32\n",
+                               uLine, pszMode, Ctx2.ss, Ctx2.rsp.u32);
+# endif
+
+            /* Different rings (load SS0:SP0 from TSS). */
+            bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 1, pbAltStack, cbAltStack,
+                                                      f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);
+            bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 2, pbAltStack, cbAltStack,
+                                                      f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);
+            bs3CpuBasic2_TssGateEsp_AltStackOuterRing(&Ctx, 3, pbAltStack, cbAltStack,
+                                                      f16BitSys, f16BitSys, f16BitSys, pszMode, __LINE__);
+
+            /* Different rings but switch the SS bitness in the TSS. */
 # if BS3_MODE_IS_16BIT_SYS(TMPL_MODE)
             Bs3Tss16.ss0 = BS3_SEL_R0_SS32;
@@ -625 +738 @@
     else
         Bs3TestPrintf("%s: Skipping ESP check, CPU too old\n", pszMode);
-
+#endif
 #else
     bRet = BS3TESTDOMODE_SKIPPED;