儲存庫 vbox 的更動 66879

時間撮記:

2017-5-12 下午01:27:07 (8 年 以前)

作者:

vboxsync

訊息:

CPUM: Hide VME capability on Ryzen unless overridden by ForceVme key. See bugref:8852

檔案:

• trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp (修改) (4 筆差異)

trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp

@@ -208 +208 @@
                  *     - ClawHammer:    F7A/SH-CG, F5A/-CG, F4A/-CG, F50/-B0, F48/-C0, F58/-C0,
                  *     - SledgeHammer:  F50/SH-B0, F48/-C0, F58/-C0, F4A/-CG, F5A/-CG, F7A/-CG, F51/-B3
-                 *     - Newcastle:     FC0/DH-CG (errum #180: FE0/DH-CG), FF0/DH-CG
+                 *     - Newcastle:     FC0/DH-CG (erratum #180: FE0/DH-CG), FF0/DH-CG
                  *     - Dublin:        FC0/-CG, FF0/-CG, F82/CH-CG, F4A/-CG, F48/SH-C0,
-                 *     - Odessa:        FC0/DH-CG (errum #180: FE0/DH-CG)
-                 *     - Paris:         FF0/DH-CG, FC0/DH-CG (errum #180: FE0/DH-CG),
+                 *     - Odessa:        FC0/DH-CG (erratum #180: FE0/DH-CG)
+                 *     - Paris:         FF0/DH-CG, FC0/DH-CG (erratum #180: FE0/DH-CG),
                  *  - 90nm:
                  *     - Winchester:    10FF0/DH-D0, 20FF0/DH-E3.
@@ -2237 +2237 @@
     bool            fNt4LeafLimit;
     bool            fInvariantTsc;
+    bool            fForceVme;
 
     CPUMISAEXTCFG   enmCmpXchg16b;
@@ -2659 +2660 @@
     }
 #endif
+
+    /* Mask out the VME capability on certain CPUs, unless overridden by fForceVme. */
+    if ( (pVM->cpum.s.GuestFeatures.enmMicroarch == kCpumMicroarch_AMD_Zen_Ryzen)
+        && !pConfig->fForceVme)
+    {
+        /** @todo The above is a very coarse test but at the moment we don't know any better (see @bugref{8852}). */
+        LogRel(("CPUM: Zen VME workaround engaged\n"));
+        pStdFeatureLeaf->uEdx &= ~X86_CPUID_FEATURE_EDX_VME;
+    }
 
     /* Force standard feature bits. */
@@ -3722 +3732 @@
     AssertLogRelRCReturn(rc, rc);
 
+    /** @cfgm{/CPUM/ForceVme, boolean, false}
+     * Always expose the VME (Virtual-8086 Mode Extensions) capability if true.
+     * By default the flag is passed thru as is from the host CPU, except
+     * on AMD Ryzen CPUs where it's masked to avoid trouble with XP/Server 2003
+     * guests and DOS boxes in general.
+     */
+    rc = CFGMR3QueryBoolDef(pCpumCfg, "ForceVme", &pConfig->fForceVme, false);
+    AssertLogRelRCReturn(rc, rc);
+
     /** @cfgm{/CPUM/MaxIntelFamilyModelStep, uint32_t, UINT32_MAX}
      * Restrict the reported CPU family+model+stepping of intel CPUs.  This is