vbox的更動 66991 路徑 trunk/src/VBox/ValidationKit
- 時間撮記:
- 2017-5-19 下午10:01:15 (8 年 以前)
- 位置:
- trunk/src/VBox/ValidationKit/bootsectors
- 檔案:
-
- 修改 2 筆資料
圖例:
- 未更動
- 新增
- 刪除
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66976 r66991 84 84 #endif 85 85 86 /** 87 * Checks if this is a 64-bit test target or not. 88 * Helps avoid ifdefs or code bloat. 89 */ 90 #if ARCH_BITS == 64 91 # define BS3CG1_IS_64BIT_TARGET(a_pThis) BS3_MODE_IS_64BIT_CODE((a_pThis)->bMode) 92 #else 93 # define BS3CG1_IS_64BIT_TARGET(a_pThis) (false) 94 #endif 86 95 87 96 … … 1327 1336 *(uint32_t *)&pThis->abCurInstr[off] = BS3_FP_OFF(pThis->pbDataPg) + X86_PAGE_SIZE - cbOp - cbMissalign; 1328 1337 1338 #if ARCH_BITS == 64 1329 1339 /* In 64-bit mode we always have a rip relative encoding regardless of fAddrOverride. */ 1330 if (BS3 _MODE_IS_64BIT_CODE(pThis->bMode))1340 if (BS3CG1_IS_64BIT_TARGET(pThis)) 1331 1341 *(uint32_t *)&pThis->abCurInstr[off] -= BS3_FP_OFF(&pThis->pbCodePg[X86_PAGE_SIZE]); 1342 #endif 1332 1343 off += 4; 1333 1344 } … … 1503 1514 pThis->enmEncoding == BS3CG1ENC_MODRM_Gv_Ev ? BS3CG1OPLOC_MEM : BS3CG1OPLOC_MEM_WO); 1504 1515 } 1505 else if (iEncoding == 6 && BS3 _MODE_IS_64BIT_CODE(pThis->bMode))1516 else if (iEncoding == 6 && BS3CG1_IS_64BIT_TARGET(pThis)) 1506 1517 { 1507 1518 cbOp = 8; … … 2037 2048 else 2038 2049 return 0; 2050 pThis->cbCurInstr = off; 2051 return iEncoding + 1; 2052 } 2053 2054 2055 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething(PBS3CG1STATE pThis, unsigned iEncoding) 2056 { 2057 unsigned off; 2058 switch (iEncoding) 2059 { 2060 case 0: 2061 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2062 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 0); 2063 break; 2064 case 1: 2065 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2066 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 1 /*cbMissalign*/ ); 2067 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 2068 pThis->bAlignmentXcpt = X86_XCPT_GP; 2069 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 2070 break; 2071 case 2: 2072 off = Bs3Cg1InsertReqPrefix(pThis, 0); 2073 pThis->abCurInstr[off++] = REX__R__; 2074 off = Bs3Cg1InsertOpcodes(pThis, off); 2075 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2+8 /*iReg*/, 0); 2076 break; 2077 default: 2078 return 0; 2079 } 2039 2080 pThis->cbCurInstr = off; 2040 2081 return iEncoding + 1; … … 2118 2159 } 2119 2160 } 2120 else if (iEncoding == 2 && BS3 _MODE_IS_64BIT_CODE(pThis->bMode))2161 else if (iEncoding == 2 && BS3CG1_IS_64BIT_TARGET(pThis)) 2121 2162 { 2122 2163 off = Bs3Cg1InsertReqPrefix(pThis, 0); … … 2487 2528 #if ARCH_BITS == 64 2488 2529 /* 64-bit mode registers */ 2489 else if (BS3 _MODE_IS_64BIT_CODE(pThis->bMode))2530 else if (BS3CG1_IS_64BIT_TARGET(pThis)) 2490 2531 { 2491 2532 if (iEncoding == 24) … … 2541 2582 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 7; 2542 2583 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2584 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 2543 2585 break; 2544 2586 case 2: 2545 2587 #if ARCH_BITS == 64 2546 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2547 { 2548 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/); 2549 off = Bs3Cg1InsertOpcodes(pThis, off); 2550 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2); 2551 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11; 2552 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 15; 2553 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 2554 break; 2555 } 2588 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/); 2589 off = Bs3Cg1InsertOpcodes(pThis, off); 2590 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2); 2591 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11; 2592 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 15; 2593 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 2594 break; 2556 2595 #endif 2557 /* fall thru */2558 2596 case 3: 2559 2597 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); … … 2585 2623 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2586 2624 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2587 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3 _MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);2625 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7); 2588 2626 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2589 2627 break; … … 2593 2631 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2594 2632 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2595 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3 _MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);2633 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7); 2596 2634 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2597 2635 break; … … 2629 2667 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2630 2668 pThis->fInvalidEncoding = true; 2669 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 2631 2670 break; 2632 2671 case 2: 2633 2672 #if ARCH_BITS == 64 2634 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2635 { 2636 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/); 2637 off = Bs3Cg1InsertOpcodes(pThis, off); 2638 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2); 2639 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11; 2640 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 15; 2641 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 2642 break; 2643 } 2673 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 0 /*~R*/); 2674 off = Bs3Cg1InsertOpcodes(pThis, off); 2675 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 2); 2676 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11; 2677 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + 15; 2678 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 2679 break; 2644 2680 #endif 2645 /* fall thru */2646 2681 case 3: 2647 2682 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); … … 2674 2709 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2675 2710 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2676 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3 _MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);2711 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7); 2677 2712 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2678 2713 break; … … 2682 2717 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 2, 1); 2683 2718 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 2; 2684 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3 _MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);2719 pThis->aOperands[1 ].idxField = pThis->aOperands[1 ].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7); 2685 2720 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 1; 2686 2721 break; … … 2712 2747 off = Bs3Cg1InsertOpcodes(pThis, off); 2713 2748 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7, 0); 2714 break; 2749 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 2750 break; 2751 #if ARCH_BITS == 64 2715 2752 case 2: 2716 #if ARCH_BITS == 64 2717 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2718 { 2719 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L - ignored*/, 0 /*~R*/); 2720 off = Bs3Cg1InsertOpcodes(pThis, off); 2721 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0); 2722 break; 2723 } 2753 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L - ignored*/, 0 /*~R*/); 2754 off = Bs3Cg1InsertOpcodes(pThis, off); 2755 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0); 2756 break; 2724 2757 #endif 2725 /* fall thru */2726 2758 case 3: 2727 2759 iEncoding = 3; … … 2745 2777 off = Bs3Cg1InsertOpcodes(pThis, off); 2746 2778 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0); 2747 break; 2779 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 3 : 0; 2780 break; 2781 #if ARCH_BITS == 64 2748 2782 case 7: 2749 #if ARCH_BITS == 64 2750 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2751 { 2752 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2753 off = Bs3Cg1InsertOpcodes(pThis, off); 2754 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0); 2755 break; 2756 } 2783 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2784 off = Bs3Cg1InsertOpcodes(pThis, off); 2785 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0); 2786 break; 2787 case 8: 2788 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/); 2789 off = Bs3Cg1InsertOpcodes(pThis, off); 2790 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0); 2791 break; 2792 case 9: 2793 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/); 2794 off = Bs3Cg1InsertOpcodes(pThis, off); 2795 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0); 2796 break; 2757 2797 #endif 2758 /* fall thru */2759 case 8:2760 #if ARCH_BITS == 642761 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))2762 {2763 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/);2764 off = Bs3Cg1InsertOpcodes(pThis, off);2765 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0);2766 break;2767 }2768 #endif2769 /* fall thru */2770 case 9:2771 #if ARCH_BITS == 642772 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))2773 {2774 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/);2775 off = Bs3Cg1InsertOpcodes(pThis, off);2776 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0);2777 break;2778 }2779 #endif2780 /* fall thru */2781 2798 case 10: 2782 iEncoding = 10;2783 2799 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2784 2800 off = Bs3Cg1InsertOpcodes(pThis, off); … … 2820 2836 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7, 0); 2821 2837 pThis->fInvalidEncoding = true; 2822 if (!BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2823 iEncoding += 2; 2838 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 2 : 0; 2824 2839 break; 2825 2840 #if ARCH_BITS == 64 … … 2857 2872 off = Bs3Cg1InsertOpcodes(pThis, off); 2858 2873 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0); 2859 if (!BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2860 iEncoding += 3; 2874 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 3 : 0; 2861 2875 break; 2862 2876 #if ARCH_BITS == 64 … … 2918 2932 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2919 2933 pThis->fInvalidEncoding = true; 2920 break; 2934 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0; 2935 break; 2936 #if ARCH_BITS == 64 2921 2937 case 2: 2922 #if ARCH_BITS == 64 2923 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2924 { 2925 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0x1 /*~V*/, 0 /*L*/, 0 /*~R*/); 2926 off = Bs3Cg1InsertOpcodes(pThis, off); 2927 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0); 2928 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 14; 2929 break; 2930 } 2938 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0x1 /*~V*/, 0 /*L*/, 0 /*~R*/); 2939 off = Bs3Cg1InsertOpcodes(pThis, off); 2940 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 + 8, 0); 2941 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 14; 2942 break; 2931 2943 #endif 2932 /* fall thru */2933 2944 case 3: 2934 iEncoding = 3;2935 2945 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xe /*~V*/, 0 /*L*/, 1 /*~R*/); 2936 2946 off = Bs3Cg1InsertOpcodes(pThis, off); … … 2956 2966 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0); 2957 2967 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2958 break; 2968 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 3 : 0; 2969 break; 2970 #if ARCH_BITS == 64 2959 2971 case 7: 2960 #if ARCH_BITS == 64 2961 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 2962 { 2963 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2964 off = Bs3Cg1InsertOpcodes(pThis, off); 2965 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0); 2966 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2967 break; 2968 } 2972 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2973 off = Bs3Cg1InsertOpcodes(pThis, off); 2974 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8, 0); 2975 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2976 break; 2977 case 8: 2978 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/); 2979 off = Bs3Cg1InsertOpcodes(pThis, off); 2980 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0); 2981 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2982 break; 2983 case 9: 2984 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/); 2985 off = Bs3Cg1InsertOpcodes(pThis, off); 2986 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0); 2987 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0; 2988 break; 2969 2989 #endif 2970 /* fall thru */2971 case 8:2972 #if ARCH_BITS == 642973 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))2974 {2975 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 0 /*~B-ignored*/, 0 /*W*/);2976 off = Bs3Cg1InsertOpcodes(pThis, off);2977 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 1, 0);2978 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;2979 break;2980 }2981 #endif2982 /* fall thru */2983 case 9:2984 #if ARCH_BITS == 642985 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode))2986 {2987 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 0 /*~X-ignored*/, 1 /*~B*/, 0 /*W*/);2988 off = Bs3Cg1InsertOpcodes(pThis, off);2989 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2, 0);2990 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + 0;2991 break;2992 }2993 #endif2994 /* fall thru */2995 2990 case 10: 2996 iEncoding = 10;2997 2991 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0 /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2998 2992 off = Bs3Cg1InsertOpcodes(pThis, off); 2999 2993 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5, 0); 3000 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + (BS3 _MODE_IS_64BIT_CODE(pThis->bMode) ? 15 : 7);2994 pThis->aOperands[1].idxField = pThis->aOperands[1].idxFieldBase + (BS3CG1_IS_64BIT_TARGET(pThis) ? 15 : 7); 3001 2995 pThis->fInvalidEncoding = true; 3002 2996 break; … … 3086 3080 } 3087 3081 #if ARCH_BITS == 64 3088 else if (BS3 _MODE_IS_64BIT_CODE(pThis->bMode))3082 else if (BS3CG1_IS_64BIT_TARGET(pThis)) 3089 3083 { 3090 3084 if (iEncoding == 8) … … 3307 3301 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 4; 3308 3302 pThis->fInvalidEncoding = true; 3309 break; 3310 3303 iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 2 : 0; 3304 break; 3305 3306 #if ARCH_BITS == 64 3311 3307 /* 64-bit mode registers */ 3312 3308 case 34: 3313 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 3314 { 3315 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/); 3316 off = Bs3Cg1InsertOpcodes(pThis, off); 3317 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 4); 3318 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 4; 3319 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11; 3320 break; 3321 } 3322 /* fall thru */ 3309 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/); 3310 off = Bs3Cg1InsertOpcodes(pThis, off); 3311 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 3, 4); 3312 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 4; 3313 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 11; 3314 break; 3323 3315 case 35: 3324 if (BS3_MODE_IS_64BIT_CODE(pThis->bMode)) 3325 { 3326 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/, 1 /*~X*/, 0 /*~B*/, 0 /*W*/); 3327 off = Bs3Cg1InsertOpcodes(pThis, off); 3328 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 4); 3329 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 12; 3330 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 9; 3331 break; 3332 } 3333 /* fall thru */ 3334 3316 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 0 /*~R*/, 1 /*~X*/, 0 /*~B*/, 0 /*W*/); 3317 off = Bs3Cg1InsertOpcodes(pThis, off); 3318 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 4); 3319 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 12; 3320 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 9; 3321 break; 3322 #endif 3335 3323 default: 3336 3324 return 0; … … 3751 3739 break; 3752 3740 3741 case BS3CG1ENC_MODRM_Mps_WO_Vps: 3742 case BS3CG1ENC_MODRM_Mpd_WO_Vpd: 3743 pThis->pfnEncoder = Bs3Cg1EncodeNext_MODRM_MsomethingWO_Vsomething; 3744 pThis->iRmOp = 0; 3745 pThis->iRegOp = 1; 3746 pThis->aOperands[0].cbOp = 16; 3747 pThis->aOperands[1].cbOp = 16; 3748 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_MEM_WO; 3749 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 3750 pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0; 3751 break; 3752 3753 3753 case BS3CG1ENC_FIXED: 3754 3754 /* nothing to do here */ … … 4090 4090 { 4091 4091 if ( (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT) 4092 && BS3 _MODE_IS_64BIT_CODE(pThis->bMode))4092 && BS3CG1_IS_64BIT_TARGET(pThis)) 4093 4093 return false; 4094 4094 … … 4142 4142 4143 4143 if ( (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT) 4144 && BS3 _MODE_IS_64BIT_CODE(pThis->bMode))4144 && BS3CG1_IS_64BIT_TARGET(pThis)) 4145 4145 return false; 4146 4146 … … 4280 4280 CASE_PRED(BS3CG1PRED_RING_0_THRU_2, pThis->uCpl <= 2); 4281 4281 CASE_PRED(BS3CG1PRED_RING_1_THRU_3, pThis->uCpl >= 1); 4282 CASE_PRED(BS3CG1PRED_CODE_64BIT, BS3 _MODE_IS_64BIT_CODE(pThis->bMode));4282 CASE_PRED(BS3CG1PRED_CODE_64BIT, BS3CG1_IS_64BIT_TARGET(pThis)); 4283 4283 CASE_PRED(BS3CG1PRED_CODE_32BIT, BS3_MODE_IS_32BIT_CODE(pThis->bMode)); 4284 4284 CASE_PRED(BS3CG1PRED_CODE_16BIT, BS3_MODE_IS_16BIT_CODE(pThis->bMode)); … … 5466 5466 && pThis->bCpuVendor != BS3CPUVENDOR_INTEL 5467 5467 && ( (pThis->fFlags & (BS3CG1INSTR_F_UNUSED | BS3CG1INSTR_F_INVALID)) 5468 || (BS3 _MODE_IS_64BIT_CODE(pThis->bMode) && (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT))5468 || (BS3CG1_IS_64BIT_TARGET(pThis) && (pThis->fFlags & BS3CG1INSTR_F_INVALID_64BIT)) 5469 5469 || fOuterInvalidInstr ) ) 5470 5470 pThis->enmEncoding = Bs3Cg1CalcNoneIntelInvalidEncoding(pThis->enmEncoding); -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r66976 r66991 105 105 BS3CG1OP_Mq, 106 106 BS3CG1OP_Mq_WO, 107 BS3CG1OP_Mps_WO, 108 BS3CG1OP_Mpd_WO, 107 109 108 110 BS3CG1OP_END … … 150 152 BS3CG1ENC_MODRM_Mq_WO_Vq, 151 153 BS3CG1ENC_MODRM_Mq_WO_VqHi, 154 BS3CG1ENC_MODRM_Mps_WO_Vps, 155 BS3CG1ENC_MODRM_Mpd_WO_Vpd, 152 156 153 157 BS3CG1ENC_VEX_MODRM_Vps_WO_Wps,
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