VirtualBox

vbox的更動 67003 路徑 trunk/src/VBox/ValidationKit


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時間撮記:
2017-5-22 上午10:03:15 (8 年 以前)
作者:
vboxsync
訊息:

IEM: movq Pq,Eq & movd Pd,Ed docs+tests+fixes.

位置:
trunk/src/VBox/ValidationKit/bootsectors
檔案:
修改 3 筆資料

圖例:

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  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-data.py

    r66976 r67003  
    305305        for oOp in oInstr.aoOperands:
    306306            self.sEncoding     += '_' + oOp.sType;
     307        if oInstr.sSubOpcode == 'rex.w=1':      self.sEncoding += '_WNZ';
     308        elif oInstr.sSubOpcode == 'rex.w=0':    self.sEncoding += '_WZ';
     309
    307310        if oInstr.fUnused:
    308311            if oInstr.sInvalidStyle == 'immediate' and oInstr.sSubOpcode:

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

    r66992 r67003  
    471471    /* [BS3CG1DST_MM6] = */         8,
    472472    /* [BS3CG1DST_MM7] = */         8,
     473    /* [BS3CG1DST_MM0_LO_ZX] = */   4,
     474    /* [BS3CG1DST_MM1_LO_ZX] = */   4,
     475    /* [BS3CG1DST_MM2_LO_ZX] = */   4,
     476    /* [BS3CG1DST_MM3_LO_ZX] = */   4,
     477    /* [BS3CG1DST_MM4_LO_ZX] = */   4,
     478    /* [BS3CG1DST_MM5_LO_ZX] = */   4,
     479    /* [BS3CG1DST_MM6_LO_ZX] = */   4,
     480    /* [BS3CG1DST_MM7_LO_ZX] = */   4,
    473481    /* [BS3CG1DST_XMM0] = */        16,
    474482    /* [BS3CG1DST_XMM1] = */        16,
    … …  
    734742    /* [BS3CG1DST_MM6] = */         sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[6]),
    735743    /* [BS3CG1DST_MM7] = */         sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[7]),
     744    /* [BS3CG1DST_MM0_LO_ZX] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[0]),
     745    /* [BS3CG1DST_MM1_LO_ZX] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[1]),
     746    /* [BS3CG1DST_MM2_LO_ZX] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[2]),
     747    /* [BS3CG1DST_MM3_LO_ZX] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[3]),
     748    /* [BS3CG1DST_MM4_LO_ZX] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[4]),
     749    /* [BS3CG1DST_MM5_LO_ZX] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[5]),
     750    /* [BS3CG1DST_MM6_LO_ZX] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[6]),
     751    /* [BS3CG1DST_MM7_LO_ZX] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[7]),
    736752
    737753    /* [BS3CG1DST_XMM0] = */        sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[0]),
    … …  
    9991015    { "MM6" },
    10001016    { "MM7" },
     1017    { "MM0_LO_ZX" },
     1018    { "MM1_LO_ZX" },
     1019    { "MM2_LO_ZX" },
     1020    { "MM3_LO_ZX" },
     1021    { "MM4_LO_ZX" },
     1022    { "MM5_LO_ZX" },
     1023    { "MM6_LO_ZX" },
     1024    { "MM7_LO_ZX" },
    10011025    { "XMM0" },
    10021026    { "XMM1" },
    … …  
    12931317
    12941318static unsigned BS3_NEAR_CODE Bs3Cfg1EncodeMemMod0Disp(PBS3CG1STATE pThis, bool fAddrOverride, unsigned off, uint8_t iReg,
    1295                                                        uint8_t cbOp, uint8_t cbMissalign, BS3CG1OPLOC enmLocation)
     1319                                                       uint8_t cbOp, uint8_t cbMisalign, BS3CG1OPLOC enmLocation)
    12961320{
    12971321    pThis->aOperands[pThis->iRmOp].idxField     = BS3CG1DST_INVALID;
    12981322    pThis->aOperands[pThis->iRmOp].enmLocation  = enmLocation;
    12991323    pThis->aOperands[pThis->iRmOp].cbOp         = cbOp;
    1300     pThis->aOperands[pThis->iRmOp].off          = cbOp + cbMissalign;
     1324    pThis->aOperands[pThis->iRmOp].off          = cbOp + cbMisalign;
    13011325
    13021326    if (   BS3_MODE_IS_16BIT_CODE(pThis->bMode)
    … …  
    13171341        {
    13181342            pThis->abCurInstr[off++] = X86_MODRM_MAKE(0, iReg, 6 /*disp16*/);
    1319             *(uint16_t *)&pThis->abCurInstr[off] = pThis->DataPgFar.off + X86_PAGE_SIZE - cbOp - cbMissalign;
     1343            *(uint16_t *)&pThis->abCurInstr[off] = pThis->DataPgFar.off + X86_PAGE_SIZE - cbOp - cbMisalign;
    13201344            off += 2;
    13211345        }
    … …  
    13231347        {
    13241348            pThis->abCurInstr[off++] = X86_MODRM_MAKE(0, iReg, 5 /*disp32*/);
    1325             *(uint32_t *)&pThis->abCurInstr[off] = pThis->DataPgFar.off + X86_PAGE_SIZE - cbOp - cbMissalign;
     1349            *(uint32_t *)&pThis->abCurInstr[off] = pThis->DataPgFar.off + X86_PAGE_SIZE - cbOp - cbMisalign;
    13261350            off += 4;
    13271351        }
    … …  
    13341358         */
    13351359        pThis->abCurInstr[off++] = X86_MODRM_MAKE(0, iReg, 5 /*disp32*/);
    1336         *(uint32_t *)&pThis->abCurInstr[off] = BS3_FP_OFF(pThis->pbDataPg) + X86_PAGE_SIZE - cbOp - cbMissalign;
     1360        *(uint32_t *)&pThis->abCurInstr[off] = BS3_FP_OFF(pThis->pbDataPg) + X86_PAGE_SIZE - cbOp - cbMisalign;
    13371361
    13381362#if ARCH_BITS == 64
    … …  
    13471371     * Fill the memory with 0xcc.
    13481372     */
    1349     switch (cbOp + cbMissalign)
     1373    switch (cbOp + cbMisalign)
    13501374    {
    13511375        case 8: pThis->pbDataPg[X86_PAGE_SIZE - 8] = 0xcc;  /* fall thru */
    … …  
    13601384        default:
    13611385        {
    1362             BS3CG1_DPRINTF(("Bs3MemSet(%p,%#x,%#x)\n", &pThis->pbDataPg[X86_PAGE_SIZE - cbOp - cbMissalign], 0xcc, cbOp - cbMissalign));
    1363             Bs3MemSet(&pThis->pbDataPg[X86_PAGE_SIZE - cbOp - cbMissalign], 0xcc, cbOp - cbMissalign);
     1386            BS3CG1_DPRINTF(("Bs3MemSet(%p,%#x,%#x)\n", &pThis->pbDataPg[X86_PAGE_SIZE - cbOp - cbMisalign], 0xcc, cbOp - cbMisalign));
     1387            Bs3MemSet(&pThis->pbDataPg[X86_PAGE_SIZE - cbOp - cbMisalign], 0xcc, cbOp - cbMisalign);
    13641388            break;
    13651389        }
    … …  
    13741398static unsigned BS3_NEAR_CODE
    13751399Bs3Cfg1EncodeMemMod0DispWithRegField(PBS3CG1STATE pThis, bool fAddrOverride, unsigned off, uint8_t iReg,
    1376                                      uint8_t cbOp, uint8_t cbMissalign, BS3CG1OPLOC enmLocation)
     1400                                     uint8_t cbOp, uint8_t cbMisalign, BS3CG1OPLOC enmLocation)
    13771401{
    13781402    pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + iReg;
    1379     return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, cbOp, cbMissalign, enmLocation);
     1403    return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, cbOp, cbMisalign, enmLocation);
    13801404}
    13811405#endif
    … …  
    13841408static unsigned BS3_NEAR_CODE
    13851409Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(PBS3CG1STATE pThis, bool fAddrOverride, unsigned off,
    1386                                                 uint8_t iReg, uint8_t cbMissalign)
     1410                                                uint8_t iReg, uint8_t cbMisalign)
    13871411{
    13881412    pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + iReg;
    1389     return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, pThis->aOperands[pThis->iRmOp].cbOp, cbMissalign,
     1413    return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, pThis->aOperands[pThis->iRmOp].cbOp, cbMisalign,
    13901414                                    pThis->aOperands[pThis->iRmOp].enmLocation);
    13911415}
    … …  
    15551579        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_DW0;
    15561580        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1557         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
     1581        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO);
    15581582    }
    15591583    else
    … …  
    15841608        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO;
    15851609        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1586         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
     1610        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO);
    15871611    }
    15881612    else
    … …  
    16131637        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3;
    16141638        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1615         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
     1639        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO);
    16161640        if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
    16171641            pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    16441668        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO;
    16451669        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1646         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
     1670        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO);
    16471671    }
    16481672    else
    … …  
    16771701
    16781702
     1703static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_PdZx_WO_Ed_WZ(PBS3CG1STATE pThis, unsigned iEncoding)
     1704{
     1705    unsigned off;
     1706    switch (iEncoding)
     1707    {
     1708        case 0:
     1709            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg;
     1710            off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
     1711            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0);
     1712            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0;
     1713            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1;
     1714            break;
     1715        case 1:
     1716            off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
     1717            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     1718            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
     1719            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6;
     1720            break;
     1721        case 2:
     1722            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem;
     1723            off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
     1724            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/);
     1725            break;
     1726        case 3:
     1727            off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
     1728            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 1 /*cbMisalign*/);
     1729            break;
     1730
     1731        default:
     1732            return 0;
     1733    }
     1734    pThis->cbCurInstr = off;
     1735    return iEncoding + 1;
     1736}
     1737
     1738
     1739static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Pq_WO_Eq_WNZ(PBS3CG1STATE pThis, unsigned iEncoding)
     1740{
     1741#if ARCH_BITS == 64
     1742    if (BS3CG1_IS_64BIT_TARGET(pThis))
     1743    {
     1744        unsigned off;
     1745        switch (iEncoding)
     1746        {
     1747            case 0:
     1748                pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg;
     1749                off = Bs3Cg1InsertReqPrefix(pThis, 0);
     1750                pThis->abCurInstr[off++] = REX_W___;
     1751                off = Bs3Cg1InsertOpcodes(pThis, off);
     1752                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0);
     1753                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0;
     1754                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1;
     1755                break;
     1756            case 1:
     1757                off = Bs3Cg1InsertReqPrefix(pThis, 0);
     1758                pThis->abCurInstr[off++] = REX_W___;
     1759                off = Bs3Cg1InsertOpcodes(pThis, off);
     1760                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     1761                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
     1762                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6;
     1763                break;
     1764            case 2:
     1765                pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem;
     1766                off = Bs3Cg1InsertReqPrefix(pThis, 0);
     1767                pThis->abCurInstr[off++] = REX_W___;
     1768                off = Bs3Cg1InsertOpcodes(pThis, off);
     1769                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/);
     1770                break;
     1771            case 3:
     1772                off = Bs3Cg1InsertReqPrefix(pThis, 0);
     1773                pThis->abCurInstr[off++] = REX_W___;
     1774                off = Bs3Cg1InsertOpcodes(pThis, off);
     1775                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 1 /*cbMisalign*/);
     1776                break;
     1777
     1778            default:
     1779                return 0;
     1780        }
     1781        pThis->cbCurInstr = off;
     1782        return iEncoding + 1;
     1783    }
     1784#endif
     1785    return 0;
     1786}
     1787
     1788
    16791789static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Vq_WO_UqHi(PBS3CG1STATE pThis, unsigned iEncoding)
    16801790{
    … …  
    17141824        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO;
    17151825        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1716         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     1826        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    17171827    }
    17181828    else
    … …  
    17601870        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_HI;
    17611871        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1762         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     1872        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    17631873    }
    17641874    else
    … …  
    17891899        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3;
    17901900        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1791         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     1901        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    17921902        if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
    17931903            pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    18211931        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3;
    18221932        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1823         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     1933        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    18241934        if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
    18251935            pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    18521962        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_DW0_ZX;
    18531963        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1854         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     1964        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    18551965    }
    18561966    else
    … …  
    18821992        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO_ZX;
    18831993        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    1884         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     1994        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    18851995    }
    18861996    else
    … …  
    20222132        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO;
    20232133        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    2024         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
     2134        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO);
    20252135    }
    20262136    else
    … …  
    20442154        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_HI;
    20452155        off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    2046         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
     2156        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO);
    20472157    }
    20482158    else
    … …  
    20642174        case 1:
    20652175            off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0));
    2066             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 1 /*cbMissalign*/ );
     2176            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 1 /*cbMisalign*/ );
    20672177            if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
    20682178                pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    23682478        off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
    23692479        off = Bs3Cg1InsertOpcodes(pThis, off);
    2370         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     2480        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    23712481        if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    23722482            pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    23772487        off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
    23782488        off = Bs3Cg1InsertOpcodes(pThis, off);
    2379         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     2489        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    23802490        if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    23812491            pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    24532563        off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/);
    24542564        off = Bs3Cg1InsertOpcodes(pThis, off);
    2455         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     2565        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    24562566        if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    24572567            pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    24622572        off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
    24632573        off = Bs3Cg1InsertOpcodes(pThis, off);
    2464         off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
     2574        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM);
    24652575        if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    24662576            pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    32483358            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
    32493359            off = Bs3Cg1InsertOpcodes(pThis, off);
    3250             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMissalign*/);
     3360            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/);
    32513361            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    32523362                pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    32553365            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
    32563366            off = Bs3Cg1InsertOpcodes(pThis, off);
    3257             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMissalign*/);
     3367            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/);
    32583368            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    32593369                pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    33303440            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/);
    33313441            off = Bs3Cg1InsertOpcodes(pThis, off);
    3332             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMissalign*/);
     3442            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/);
    33333443            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    33343444                pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    33373447            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
    33383448            off = Bs3Cg1InsertOpcodes(pThis, off);
    3339             off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMissalign*/);
     3449            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/);
    33403450            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    33413451                pThis->bAlignmentXcpt = X86_XCPT_GP;
    … …  
    35683678        case BS3CG1ENC_MODRM_WqZxReg_WO_Vq:
    35693679            return Bs3Cg1EncodeNext_MODRM_WqZxReg_WO_Vq(pThis, iEncoding);
    3570 
    3571         case BS3CG1ENC_MODRM_Pq_WO_Uq:
    3572             return Bs3Cg1EncodeNext_MODRM_Pq_WO_Uq(pThis, iEncoding);
    35733680
    35743681        case BS3CG1ENC_MODRM_Vq_WO_UqHi:
    … …  
    37643871
    37653872        case BS3CG1ENC_MODRM_Pq_WO_Uq:
     3873            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_Pq_WO_Uq;
     3874            pThis->iRmOp             = 1;
     3875            pThis->iRegOp            = 0;
     3876            pThis->aOperands[0].cbOp = 8;
     3877            pThis->aOperands[1].cbOp = 8;
     3878            pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX;
     3879            pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX;
     3880            break;
     3881
     3882        case BS3CG1ENC_MODRM_PdZx_WO_Ed_WZ:
     3883            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_PdZx_WO_Ed_WZ;
     3884            pThis->iRegOp            = 0;
     3885            pThis->iRmOp             = 1;
     3886            pThis->aOperands[0].cbOp = 4;
     3887            pThis->aOperands[1].cbOp = 4;
     3888            pThis->aOperands[0].idxFieldBase   = BS3CG1DST_MM0_LO_ZX;
     3889            pThis->aOperands[1].idxFieldBase   = BS3CG1DST_EAX;
     3890            pThis->aOperands[0].enmLocation    = BS3CG1OPLOC_CTX;
     3891            pThis->aOperands[1].enmLocation    = BS3CG1OPLOC_CTX;
     3892            pThis->aOperands[1].enmLocationReg = BS3CG1OPLOC_CTX;
     3893            pThis->aOperands[1].enmLocationMem = BS3CG1OPLOC_MEM;
     3894            break;
     3895
     3896        case BS3CG1ENC_MODRM_Pq_WO_Eq_WNZ:
     3897            pThis->pfnEncoder        = Bs3Cg1EncodeNext_MODRM_Pq_WO_Eq_WNZ;
     3898            pThis->iRegOp            = 0;
     3899            pThis->iRmOp             = 1;
     3900            pThis->aOperands[0].cbOp = 8;
     3901            pThis->aOperands[1].cbOp = 8;
     3902            pThis->aOperands[0].idxFieldBase   = BS3CG1DST_MM0;
     3903            pThis->aOperands[1].idxFieldBase   = BS3CG1DST_RAX;
     3904            pThis->aOperands[0].enmLocation    = BS3CG1OPLOC_CTX;
     3905            pThis->aOperands[1].enmLocation    = BS3CG1OPLOC_CTX;
     3906            pThis->aOperands[1].enmLocationReg = BS3CG1OPLOC_CTX;
     3907            pThis->aOperands[1].enmLocationMem = BS3CG1OPLOC_MEM;
     3908            break;
     3909
    37663910        case BS3CG1ENC_MODRM_Vq_WO_UqHi:
    37673911        case BS3CG1ENC_MODRM_VqHi_WO_Uq:
    … …  
    42094353            return false;
    42104354
     4355        case BS3CG1CPU_MMX:
     4356            return false;
     4357
    42114358        case BS3CG1CPU_SSE:
    42124359        case BS3CG1CPU_SSE2:
    … …  
    42774424            if ((g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_Pentium)
    42784425                return true;
     4426            return false;
     4427
     4428        case BS3CG1CPU_MMX:
     4429            if (g_uBs3CpuDetected & BS3CPU_F_CPUID)
     4430            {
     4431                ASMCpuIdExSlow(1, 0, 0, 0, NULL, NULL, NULL, &fEdx);
     4432                if (fEdx & X86_CPUID_FEATURE_EDX_MMX)
     4433                    return Bs3Cg3SetupSseAndAvx(pThis); /** @todo only do FNSAVE/FXSAVE here? */
     4434            }
    42794435            return false;
    42804436
    … …  
    47104866                        PtrField.pu64[1] = 0;
    47114867                    }
    4712                     else if (offField <= RT_OFFSETOF(BS3REGCTX, r15)) /* Clear the top dword. */
     4868                    else if (offField <= RT_OFFSETOF(BS3REGCTX, r15) /* Clear the top dword. */)
    47134869                        PtrField.pu32[1] = 0;
     4870                    else if ((unsigned)(idxField - BS3CG1DST_MM0_LO_ZX) <= (unsigned)(BS3CG1DST_MM7_LO_ZX - BS3CG1DST_MM0_LO_ZX))
     4871                    {
     4872                        PtrField.pu32[1] = 0;
     4873                        PtrField.pu32[2] = 0xffff; /* observed on skylake */
     4874                    }
    47144875                    switch (bOpcode & BS3CG1_CTXOP_OPERATOR_MASK)
    47154876                    {

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h

    r66992 r67003  
    4343
    4444    BS3CG1OP_Eb,
     45    BS3CG1OP_Ed,
     46    BS3CG1OP_Eq,
    4547    BS3CG1OP_Ev,
    4648    BS3CG1OP_Wss,
    … …  
    6668    BS3CG1OP_HqHi,
    6769    BS3CG1OP_Nq,
     70    BS3CG1OP_Pd,
     71    BS3CG1OP_PdZx_WO,
     72    BS3CG1OP_Pq,
    6873    BS3CG1OP_Pq_WO,
    6974    BS3CG1OP_Uq,
    … …  
    136141    BS3CG1ENC_MODRM_Gv_RO_Ma, /**< bound instruction */
    137142    BS3CG1ENC_MODRM_Pq_WO_Uq,
     143    BS3CG1ENC_MODRM_PdZx_WO_Ed_WZ,
     144    BS3CG1ENC_MODRM_Pq_WO_Eq_WNZ,
    138145    BS3CG1ENC_MODRM_Vq_WO_UqHi,
    139146    BS3CG1ENC_MODRM_Vq_WO_Mq,
    … …  
    223230    BS3CG1CPU_GE_Pentium,
    224231
     232    BS3CG1CPU_MMX,
    225233    BS3CG1CPU_SSE,
    226234    BS3CG1CPU_SSE2,
    … …  
    525533    BS3CG1DST_MM6,
    526534    BS3CG1DST_MM7,
     535    BS3CG1DST_MM0_LO_ZX,
     536    BS3CG1DST_MM1_LO_ZX,
     537    BS3CG1DST_MM2_LO_ZX,
     538    BS3CG1DST_MM3_LO_ZX,
     539    BS3CG1DST_MM4_LO_ZX,
     540    BS3CG1DST_MM5_LO_ZX,
     541    BS3CG1DST_MM6_LO_ZX,
     542    BS3CG1DST_MM7_LO_ZX,
    527543    /* SSE registers. */
    528544    BS3CG1DST_XMM0,
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