VirtualBox

vbox的更動 67006 路徑 trunk/src/VBox/ValidationKit


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時間撮記:
2017-5-22 上午11:36:46 (8 年 以前)
作者:
vboxsync
訊息:

IEM: Implemented vmovd Vd,Ed and vmovq Vq,Eq (VEX.66.0F 6e).

位置:
trunk/src/VBox/ValidationKit/bootsectors
檔案:
修改 2 筆資料

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  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

    r67005 r67006  
    25812581
    25822582
     2583static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_VEX_MODRM_Vd_WO_Ed_WZ(PBS3CG1STATE pThis, unsigned iEncoding)
     2584{
     2585    unsigned off;
     2586    switch (iEncoding)
     2587    {
     2588        case 0:
     2589            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg;
     2590            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
     2591            off = Bs3Cg1InsertOpcodes(pThis, off);
     2592            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0);
     2593            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0;
     2594            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1;
     2595            break;
     2596        case 1:
     2597            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     2598            off = Bs3Cg1InsertOpcodes(pThis, off);
     2599            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     2600            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
     2601            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6;
     2602            break;
     2603        case 2:
     2604            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L-invalid*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     2605            off = Bs3Cg1InsertOpcodes(pThis, off);
     2606            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     2607            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
     2608            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6;
     2609            pThis->fInvalidEncoding = true;
     2610            break;
     2611        case 3:
     2612            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xe /*~V-invalid*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     2613            off = Bs3Cg1InsertOpcodes(pThis, off);
     2614            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     2615            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
     2616            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6;
     2617            pThis->fInvalidEncoding = true;
     2618            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 1 : 0;
     2619            break;
     2620#if ARCH_BITS == 64
     2621        case 4:
     2622            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 0 /*~B*/, 0 /*W*/);
     2623            off = Bs3Cg1InsertOpcodes(pThis, off);
     2624            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     2625            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2 + 8;
     2626            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6 + 8;
     2627            break;
     2628#endif
     2629        case 5:
     2630            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem;
     2631            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
     2632            off = Bs3Cg1InsertOpcodes(pThis, off);
     2633            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/);
     2634            break;
     2635        case 6:
     2636            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     2637            off = Bs3Cg1InsertOpcodes(pThis, off);
     2638            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/);
     2639            break;
     2640        case 7:
     2641            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     2642            off = Bs3Cg1InsertOpcodes(pThis, off);
     2643            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 1 /*cbMisalign*/);
     2644            iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 2 : 0;
     2645            break;
     2646#if ARCH_BITS == 64
     2647        case 8:
     2648            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
     2649            off = Bs3Cg1InsertOpcodes(pThis, off);
     2650            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4+8 /*iReg*/, 0 /*cbMisalign*/);
     2651            break;
     2652        case 9:
     2653            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/);
     2654            off = Bs3Cg1InsertOpcodes(pThis, off);
     2655            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 5+8 /*iReg*/, 0 /*cbMisalign*/);
     2656            iEncoding += 2;
     2657            break;
     2658#endif
     2659        case 10: /* VEX.W is ignored in 32-bit mode. flag? */
     2660            BS3_ASSERT(!BS3CG1_IS_64BIT_TARGET(pThis));
     2661            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/);
     2662            off = Bs3Cg1InsertOpcodes(pThis, off);
     2663            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/);
     2664            break;
     2665
     2666        default:
     2667            return 0;
     2668    }
     2669    pThis->cbCurInstr = off;
     2670    return iEncoding + 1;
     2671}
     2672
     2673
     2674/* Differs from Bs3Cg1EncodeNext_MODRM_Pq_WO_Eq_WNZ in that REX.R isn't ignored. */
     2675static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_VEX_MODRM_Vq_WO_Eq_WNZ(PBS3CG1STATE pThis, unsigned iEncoding)
     2676{
     2677#if ARCH_BITS == 64
     2678    if (BS3CG1_IS_64BIT_TARGET(pThis))
     2679    {
     2680        unsigned off;
     2681        switch (iEncoding)
     2682        {
     2683            case 0:
     2684                pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg;
     2685                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/);
     2686                off = Bs3Cg1InsertOpcodes(pThis, off);
     2687                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     2688                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
     2689                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6;
     2690                break;
     2691            case 1:
     2692                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L-invalid*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/);
     2693                off = Bs3Cg1InsertOpcodes(pThis, off);
     2694                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     2695                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
     2696                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6;
     2697                pThis->fInvalidEncoding = true;
     2698                break;
     2699            case 2:
     2700                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xe /*~V-invalid*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/);
     2701                off = Bs3Cg1InsertOpcodes(pThis, off);
     2702                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     2703                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2;
     2704                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6;
     2705                pThis->fInvalidEncoding = true;
     2706                break;
     2707            case 3:
     2708                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 0 /*~B*/, 1 /*W*/);
     2709                off = Bs3Cg1InsertOpcodes(pThis, off);
     2710                pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2);
     2711                pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2 + 8;
     2712                pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6 + 8;
     2713                break;
     2714            case 4:
     2715                pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem;
     2716                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/);
     2717                off = Bs3Cg1InsertOpcodes(pThis, off);
     2718                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/);
     2719                break;
     2720            case 5:
     2721                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/);
     2722                off = Bs3Cg1InsertOpcodes(pThis, off);
     2723                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 1 /*cbMisalign*/);
     2724                iEncoding += !BS3CG1_IS_64BIT_TARGET(pThis) ? 2 : 0;
     2725                break;
     2726            case 6:
     2727                off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 0 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W*/);
     2728                off = Bs3Cg1InsertOpcodes(pThis, off);
     2729                off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4+8 /*iReg*/, 0 /*cbMisalign*/);
     2730                break;
     2731
     2732            default:
     2733                return 0;
     2734        }
     2735        pThis->cbCurInstr = off;
     2736        return iEncoding + 1;
     2737    }
     2738#endif
     2739    return 0;
     2740}
     2741
     2742
    25832743static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_VEX_MODRM_Vps_WO_Wps__OR__VEX_MODRM_Vpd_WO_Wpd(PBS3CG1STATE pThis, unsigned iEncoding)
    25842744{
    … …  
    42034363
    42044364#ifdef BS3CG1_WITH_VEX
     4365
     4366        case BS3CG1ENC_VEX_MODRM_Vd_WO_Ed_WZ:
     4367            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_Vd_WO_Ed_WZ;
     4368            pThis->iRegOp            = 0;
     4369            pThis->iRmOp             = 1;
     4370            pThis->aOperands[0].cbOp = 4;
     4371            pThis->aOperands[1].cbOp = 4;
     4372            pThis->aOperands[0].idxFieldBase   = BS3CG1DST_XMM0_DW0_ZX;
     4373            pThis->aOperands[1].idxFieldBase   = BS3CG1DST_EAX;
     4374            pThis->aOperands[0].enmLocation    = BS3CG1OPLOC_CTX_ZX_VLMAX;
     4375            pThis->aOperands[1].enmLocation    = BS3CG1OPLOC_CTX;
     4376            pThis->aOperands[1].enmLocationReg = BS3CG1OPLOC_CTX;
     4377            pThis->aOperands[1].enmLocationMem = BS3CG1OPLOC_MEM;
     4378            break;
     4379
     4380        case BS3CG1ENC_VEX_MODRM_Vq_WO_Eq_WNZ:
     4381            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_Vq_WO_Eq_WNZ;
     4382            pThis->iRegOp            = 0;
     4383            pThis->iRmOp             = 1;
     4384            pThis->aOperands[0].cbOp = 8;
     4385            pThis->aOperands[1].cbOp = 8;
     4386            pThis->aOperands[0].idxFieldBase   = BS3CG1DST_XMM0_LO_ZX;
     4387            pThis->aOperands[1].idxFieldBase   = BS3CG1DST_RAX;
     4388            pThis->aOperands[0].enmLocation    = BS3CG1OPLOC_CTX_ZX_VLMAX;
     4389            pThis->aOperands[1].enmLocation    = BS3CG1OPLOC_CTX;
     4390            pThis->aOperands[1].enmLocationReg = BS3CG1OPLOC_CTX;
     4391            pThis->aOperands[1].enmLocationMem = BS3CG1OPLOC_MEM;
     4392            break;
    42054393
    42064394        case BS3CG1ENC_VEX_MODRM_Vps_WO_Wps:

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h

    r67004 r67006  
    7878    BS3CG1OP_Usd,
    7979    BS3CG1OP_Usd_WO,
     80    BS3CG1OP_Vd_WO,
    8081    BS3CG1OP_VdZx_WO,
    8182    BS3CG1OP_Vss,
    … …  
    165166    BS3CG1ENC_MODRM_Mpd_WO_Vpd,
    166167
     168    BS3CG1ENC_VEX_MODRM_Vd_WO_Ed_WZ,
    167169    BS3CG1ENC_VEX_MODRM_Vps_WO_Wps,
    168170    BS3CG1ENC_VEX_MODRM_Vpd_WO_Wpd,
    169171    BS3CG1ENC_VEX_MODRM_Vss_WO_HssHi_Uss,
    170172    BS3CG1ENC_VEX_MODRM_Vsd_WO_HsdHi_Usd,
     173    BS3CG1ENC_VEX_MODRM_Vq_WO_Eq_WNZ,
    171174    BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_UqHi,
    172175    BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_Mq,
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