vbox的更動 12772 路徑 trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
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- 2008-9-26 下午04:13:09 (16 年 以前)
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trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r12688 r12772 1 1 /* $Id$ */ 2 2 /** @file 3 * IOM - Input / Output Monitor - Guest Context.3 * IOM - Input / Output Monitor - Any Context, MMIO & String I/O. 4 4 */ 5 5 … … 46 46 47 47 48 49 48 /******************************************************************************* 50 49 * Global Variables * … … 75 74 /** 76 75 * Wrapper which does the write and updates range statistics when such are enabled. 77 * @warning VBOX_SUCCESS(rc=VINF_IOM_HC_MMIO_WRITE) is TRUE!76 * @warning RT_SUCCESS(rc=VINF_IOM_HC_MMIO_WRITE) is TRUE! 78 77 */ 79 78 DECLINLINE(int) iomMMIODoWrite(PVM pVM, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault, const void *pvData, unsigned cb) … … 85 84 86 85 int rc; 87 if (RT_LIKELY(pRange->CTX ALLSUFF(pfnWriteCallback)))88 rc = pRange->CTX ALLSUFF(pfnWriteCallback)(pRange->CTXALLSUFF(pDevIns), pRange->CTXALLSUFF(pvUser), GCPhysFault, (void *)pvData, cb); /* @todo fix const!! */86 if (RT_LIKELY(pRange->CTX_SUFF(pfnWriteCallback))) 87 rc = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhysFault, (void *)pvData, cb); /* @todo fix const!! */ 89 88 else 90 89 rc = VINF_SUCCESS; 91 90 if (rc != VINF_IOM_HC_MMIO_WRITE) 92 STAM_COUNTER_INC(&pStats->CTX ALLSUFF(Write));91 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Write)); 93 92 return rc; 94 93 } 94 95 95 96 96 /** … … 105 105 106 106 int rc; 107 if (RT_LIKELY(pRange->CTX ALLSUFF(pfnReadCallback)))108 rc = pRange->CTX ALLSUFF(pfnReadCallback)(pRange->CTXALLSUFF(pDevIns), pRange->CTXALLSUFF(pvUser), GCPhysFault, pvData, cb);107 if (RT_LIKELY(pRange->CTX_SUFF(pfnReadCallback))) 108 rc = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhysFault, pvData, cb); 109 109 else 110 110 { 111 /** @todo r=bird: this is (probably) wrong, all bits should be set here I 112 * think. */ 111 113 switch (cb) 112 114 { … … 122 124 } 123 125 if (rc != VINF_IOM_HC_MMIO_READ) 124 STAM_COUNTER_INC(&pStats->CTX ALLSUFF(Read));126 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Read)); 125 127 return rc; 126 128 } 127 129 128 /* 130 131 /** 129 132 * Internal - statistics only. 130 133 */ … … 135 138 { 136 139 case 1: 137 STAM_COUNTER_INC(&pVM->iom.s.Stat GCMMIO1Byte);140 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIO1Byte); 138 141 break; 139 142 case 2: 140 STAM_COUNTER_INC(&pVM->iom.s.Stat GCMMIO2Bytes);143 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIO2Bytes); 141 144 break; 142 145 case 4: 143 STAM_COUNTER_INC(&pVM->iom.s.Stat GCMMIO4Bytes);146 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIO4Bytes); 144 147 break; 145 148 case 8: 146 STAM_COUNTER_INC(&pVM->iom.s.Stat GCMMIO8Bytes);149 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIO8Bytes); 147 150 break; 148 151 default: … … 172 175 static int iomInterpretMOVxXRead(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault) 173 176 { 174 Assert(pRange->CTX ALLSUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);177 Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3); 175 178 176 179 /* … … 231 234 static int iomInterpretMOVxXWrite(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, RTGCPHYS GCPhysFault) 232 235 { 233 Assert(pRange->CTX ALLSUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3);236 Assert(pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3); 234 237 235 238 /* … … 271 274 272 275 273 #ifdef iom_MOVS_SUPPORT276 #ifdef IOM_WITH_MOVS_SUPPORT 274 277 /** 275 278 * [REP] MOVSB … … 288 291 * @param pCpu Disassembler CPU state. 289 292 * @param pRange Pointer MMIO range. 290 */ 291 static int iomInterpretMOVS(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange) 293 * @param ppStat Which sub-sample to attribute this call to. 294 */ 295 static int iomInterpretMOVS(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange, PSTAMPROFILE *ppStat) 292 296 { 293 297 /* … … 299 303 300 304 /* 301 * Get bytes/words/dwords count to copy.305 * Get bytes/words/dwords/qword count to copy. 302 306 */ 303 307 uint32_t cTransfers = 1; … … 343 347 * ds:esi (Virt Src) -> es:edi (Phys Dst) 344 348 */ 345 STAM_ PROFILE_START(&pVM->iom.s.StatGCInstMovsToMMIO, a2);349 STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsToMMIO; }); 346 350 347 351 /* Check callback. */ 348 if (!pRange->CTXALLSUFF(pfnWriteCallback)) 349 { 350 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsToMMIO, a2); 352 if (!pRange->CTX_SUFF(pfnWriteCallback)) 351 353 return VINF_IOM_HC_MMIO_WRITE; 352 }353 354 354 355 /* Convert source address ds:esi. */ … … 357 358 SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL, 358 359 (PRTGCPTR)&pu8Virt); 359 if ( VBOX_SUCCESS(rc))360 if (RT_SUCCESS(rc)) 360 361 { 361 362 … … 365 366 { 366 367 Log(("MOVS will generate a trap -> recompiler, rc=%d\n", rc)); 367 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsToMMIO, a2);368 368 return VINF_EM_RAW_EMULATE_INSTR; 369 369 } … … 396 396 if (pCpu->prefix & PREFIX_REP) 397 397 pRegFrame->ecx = cTransfers; 398 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsToMMIO, a2);399 398 } 400 399 else … … 407 406 * ds:[eSI] (Phys Src) -> es:[eDI] (Virt Dst) 408 407 */ 408 STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsFromMMIO; }); 409 409 410 /* Check callback. */ 410 if (!pRange-> pfnReadCallback)411 if (!pRange->CTX_SUFF(pfnReadCallback)) 411 412 return VINF_IOM_HC_MMIO_READ; 412 413 … … 416 417 SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL, 417 418 (RTGCPTR *)&pu8Virt); 418 if ( VBOX_FAILURE(rc))419 if (RT_FAILURE(rc)) 419 420 return VINF_EM_RAW_GUEST_TRAP; 420 421 … … 424 425 rc = PGMGstGetPage(pVM, (RTGCPTR)pu8Virt, NULL, &PhysDst); 425 426 PhysDst |= (RTGCUINTPTR)pu8Virt & PAGE_OFFSET_MASK; 426 if ( VBOX_SUCCESS(rc)427 if ( RT_SUCCESS(rc) 427 428 && (pMMIODst = iomMMIOGetRange(&pVM->iom.s, PhysDst))) 428 429 { … … 430 431 * Extra: [MMIO] -> [MMIO] 431 432 */ 432 STAM_PROFILE_START(&pVM->iom.s.StatGCInstMovsMMIO, d); 433 STAM_PROFILE_START(&pVM->iom.s.StatGCInstMovsFromMMIO, c); 434 435 if (!pMMIODst->CTXALLSUFF(pfnWriteCallback) && pMMIODst->pfnWriteCallbackR3) 436 { 437 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsMMIO, d); 438 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsFromMMIO, c); 433 STAM_STATS({ *ppStat = &pVM->iom.s.StatRZInstMovsMMIO; }); 434 if (!pMMIODst->CTX_SUFF(pfnWriteCallback) && pMMIODst->pfnWriteCallbackR3) 439 435 return VINF_IOM_HC_MMIO_READ_WRITE; 440 }441 436 442 437 /* copy loop. */ … … 457 452 cTransfers--; 458 453 } 459 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsMMIO, d);460 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsFromMMIO, c);461 454 } 462 455 else … … 465 458 * Normal: [MMIO] -> [Mem] 466 459 */ 467 STAM_PROFILE_START(&pVM->iom.s.StatGCInstMovsFromMMIO, c);468 469 460 /* Access verification first; we currently can't recover properly from traps inside this instruction */ 470 461 rc = PGMVerifyAccess(pVM, pu8Virt, cTransfers * cb, X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0)); … … 472 463 { 473 464 Log(("MOVS will generate a trap -> recompiler, rc=%d\n", rc)); 474 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsFromMMIO, c);475 465 return VINF_EM_RAW_EMULATE_INSTR; 476 466 } … … 502 492 MMGCRamDeregisterTrapHandler(pVM); 503 493 #endif 504 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovsFromMMIO, c);505 494 } 506 495 … … 512 501 /* work statistics. */ 513 502 if (rc == VINF_SUCCESS) 514 {515 503 iomMMIOStatLength(pVM, cb); 516 }504 NOREF(ppStat); 517 505 return rc; 518 506 } 519 #endif 520 507 #endif /* IOM_WITH_MOVS_SUPPORT */ 521 508 522 509 … … 565 552 } 566 553 554 /** @todo r=bird: bounds checks! */ 555 567 556 /* 568 557 * Get data size. … … 581 570 uint32_t u32Data = pRegFrame->eax; 582 571 int rc; 583 if (pRange->CTX ALLSUFF(pfnFillCallback))572 if (pRange->CTX_SUFF(pfnFillCallback)) 584 573 { 585 574 /* … … 590 579 { 591 580 /* addr++ variant. */ 592 rc = pRange->CTX ALLSUFF(pfnFillCallback)(pRange->CTXALLSUFF(pDevIns), pRange->CTXALLSUFF(pvUser), Phys, u32Data, cb, cTransfers);581 rc = pRange->CTX_SUFF(pfnFillCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), Phys, u32Data, cb, cTransfers); 593 582 if (rc == VINF_SUCCESS) 594 583 { … … 602 591 { 603 592 /* addr-- variant. */ 604 rc = pRange->CTX ALLSUFF(pfnFillCallback)(pRange->CTXALLSUFF(pDevIns), pRange->CTXALLSUFF(pvUser), (Phys - (cTransfers - 1)) << SIZE_2_SHIFT(cb), u32Data, cb, cTransfers);593 rc = pRange->CTX_SUFF(pfnFillCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), (Phys - (cTransfers - 1)) << SIZE_2_SHIFT(cb), u32Data, cb, cTransfers); 605 594 if (rc == VINF_SUCCESS) 606 595 { … … 617 606 * Use the write callback. 618 607 */ 619 Assert(pRange->CTX ALLSUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3);608 Assert(pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3); 620 609 621 610 /* fill loop. */ … … 663 652 static int iomInterpretLODS(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange) 664 653 { 665 Assert(pRange->CTX ALLSUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);654 Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3); 666 655 667 656 /* … … 711 700 static int iomInterpretCMP(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange) 712 701 { 713 Assert(pRange->CTX ALLSUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);702 Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3); 714 703 715 704 /* … … 787 776 { 788 777 /* and reg, [MMIO]. */ 789 Assert(pRange->CTX ALLSUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);778 Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3); 790 779 fAndWrite = false; 791 780 rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb); … … 795 784 /* and [MMIO], reg|imm. */ 796 785 fAndWrite = true; 797 if ( (pRange->CTX ALLSUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3)798 && (pRange->CTX ALLSUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3))786 if ( (pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3) 787 && (pRange->CTX_SUFF(pfnWriteCallback) || !pRange->pfnWriteCallbackR3)) 799 788 rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb); 800 789 else … … 835 824 } 836 825 826 837 827 /** 838 828 * TEST [MMIO], reg|imm … … 852 842 static int iomInterpretTEST(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange) 853 843 { 854 Assert(pRange->CTX ALLSUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);844 Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3); 855 845 856 846 unsigned cb = 0; … … 887 877 } 888 878 879 889 880 /** 890 881 * BT [MMIO], reg|imm … … 903 894 static int iomInterpretBT(PVM pVM, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, PDISCPUSTATE pCpu, PIOMMMIORANGE pRange) 904 895 { 905 Assert(pRange->CTX ALLSUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3);896 Assert(pRange->CTX_SUFF(pfnReadCallback) || !pRange->pfnReadCallbackR3); 906 897 907 898 uint64_t uBit = 0; … … 954 945 { 955 946 /* Check for read & write handlers since IOMMMIOHandler doesn't cover this. */ 956 if ( (!pRange->CTX ALLSUFF(pfnReadCallback) && pRange->pfnReadCallbackR3)957 || (!pRange->CTX ALLSUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3))947 if ( (!pRange->CTX_SUFF(pfnReadCallback) && pRange->pfnReadCallbackR3) 948 || (!pRange->CTX_SUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3)) 958 949 return VINF_IOM_HC_MMIO_READ_WRITE; 959 950 … … 1014 1005 /** 1015 1006 * \#PF Handler callback for MMIO ranges. 1016 * Note: we are on ring0 in Hypervisor and interrupts are disabled.1017 1007 * 1018 1008 * @returns VBox status code (appropriate for GC return). … … 1026 1016 IOMDECL(int) IOMMMIOHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser) 1027 1017 { 1028 STAM_PROFILE_START(&pVM->iom.s.Stat GCMMIOHandler, a);1018 STAM_PROFILE_START(&pVM->iom.s.StatRZMMIOHandler, a); 1029 1019 Log(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%VGv eip=%VGv\n", 1030 1020 GCPhysFault, (uint32_t)uErrorCode, pvFault, pCtxCore->rip)); … … 1044 1034 return VERR_NO_MEMORY; 1045 1035 # else 1046 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCMMIOHandler, a);1047 STAM_COUNTER_INC(&pVM->iom.s.Stat GCMMIOFailures);1036 STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a); 1037 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIOFailures); 1048 1038 return uErrorCode & X86_TRAP_PF_RW ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ; 1049 1039 # endif … … 1056 1046 */ 1057 1047 if (uErrorCode & X86_TRAP_PF_RW 1058 ? !pRange->CTX ALLSUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR31059 : !pRange->CTX ALLSUFF(pfnReadCallback) && pRange->pfnReadCallbackR3)1048 ? !pRange->CTX_SUFF(pfnWriteCallback) && pRange->pfnWriteCallbackR3 1049 : !pRange->CTX_SUFF(pfnReadCallback) && pRange->pfnReadCallbackR3) 1060 1050 { 1061 1051 # ifdef VBOX_WITH_STATISTICS 1062 1052 if (uErrorCode & X86_TRAP_PF_RW) 1063 STAM_COUNTER_INC(&pStats->CTX ALLMID(Write,ToR3));1053 STAM_COUNTER_INC(&pStats->CTX_MID_Z(Write,ToR3)); 1064 1054 else 1065 STAM_COUNTER_INC(&pStats->CTX ALLMID(Read,ToR3));1055 STAM_COUNTER_INC(&pStats->CTX_MID_Z(Read,ToR3)); 1066 1056 # endif 1067 1057 1068 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCMMIOHandler, a);1069 STAM_COUNTER_INC(&pVM->iom.s.Stat GCMMIOFailures);1058 STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a); 1059 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIOFailures); 1070 1060 return uErrorCode & X86_TRAP_PF_RW ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ; 1071 1061 } … … 1085 1075 case OP_MOVSX: 1086 1076 { 1087 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstMov, b);1077 STAM_PROFILE_START(&pVM->iom.s.StatRZInstMov, b); 1088 1078 if (uErrorCode & X86_TRAP_PF_RW) 1089 1079 rc = iomInterpretMOVxXWrite(pVM, pCtxCore, &Cpu, pRange, GCPhysFault); 1090 1080 else 1091 1081 rc = iomInterpretMOVxXRead(pVM, pCtxCore, &Cpu, pRange, GCPhysFault); 1092 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstMov, b);1082 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstMov, b); 1093 1083 break; 1094 1084 } 1095 1085 1096 1086 1097 #ifdef iom_MOVS_SUPPORT1087 #ifdef IOM_WITH_MOVS_SUPPORT 1098 1088 case OP_MOVSB: 1099 1089 case OP_MOVSWD: 1100 STAM_PROFILE_START(&pVM->iom.s.StatGCInstMovs, c); 1101 rc = iomInterpretMOVS(pVM, uErrorCode, pCtxCore, GCPhysFault, &Cpu, pRange); 1102 STAM_PROFILE_STOP(&pVM->iom.s.StatGCInstMovs, c); 1103 break; 1090 { 1091 STAM_PROFILE_ADV_START(&pVM->iom.s.StatRZInstMovs, c); 1092 PSTAMPROFILE pStat = NULL; 1093 rc = iomInterpretMOVS(pVM, uErrorCode, pCtxCore, GCPhysFault, &Cpu, pRange, &pStat); 1094 STAM_PROFILE_ADV_STOP_EX(&pVM->iom.s.StatRZInstMovs, pStat, c); 1095 break; 1096 } 1104 1097 #endif 1105 1098 … … 1107 1100 case OP_STOSWD: 1108 1101 Assert(uErrorCode & X86_TRAP_PF_RW); 1109 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstStos, d);1102 STAM_PROFILE_START(&pVM->iom.s.StatRZInstStos, d); 1110 1103 rc = iomInterpretSTOS(pVM, pCtxCore, GCPhysFault, &Cpu, pRange); 1111 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstStos, d);1104 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstStos, d); 1112 1105 break; 1113 1106 … … 1115 1108 case OP_LODSWD: 1116 1109 Assert(!(uErrorCode & X86_TRAP_PF_RW)); 1117 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstLods, e);1110 STAM_PROFILE_START(&pVM->iom.s.StatRZInstLods, e); 1118 1111 rc = iomInterpretLODS(pVM, pCtxCore, GCPhysFault, &Cpu, pRange); 1119 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstLods, e);1112 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstLods, e); 1120 1113 break; 1121 1114 1122 1115 case OP_CMP: 1123 1116 Assert(!(uErrorCode & X86_TRAP_PF_RW)); 1124 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstCmp, f);1117 STAM_PROFILE_START(&pVM->iom.s.StatRZInstCmp, f); 1125 1118 rc = iomInterpretCMP(pVM, pCtxCore, GCPhysFault, &Cpu, pRange); 1126 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstCmp, f);1119 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstCmp, f); 1127 1120 break; 1128 1121 1129 1122 case OP_AND: 1130 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstAnd, g);1123 STAM_PROFILE_START(&pVM->iom.s.StatRZInstAnd, g); 1131 1124 rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, &Cpu, pRange, EMEmulateAnd); 1132 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstAnd, g);1125 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstAnd, g); 1133 1126 break; 1134 1127 1135 1128 case OP_OR: 1136 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstOr, k);1129 STAM_PROFILE_START(&pVM->iom.s.StatRZInstOr, k); 1137 1130 rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, &Cpu, pRange, EMEmulateOr); 1138 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstOr, k);1131 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstOr, k); 1139 1132 break; 1140 1133 1141 1134 case OP_XOR: 1142 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstXor, m);1135 STAM_PROFILE_START(&pVM->iom.s.StatRZInstXor, m); 1143 1136 rc = iomInterpretOrXorAnd(pVM, pCtxCore, GCPhysFault, &Cpu, pRange, EMEmulateXor); 1144 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstXor, m);1137 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstXor, m); 1145 1138 break; 1146 1139 1147 1140 case OP_TEST: 1148 1141 Assert(!(uErrorCode & X86_TRAP_PF_RW)); 1149 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstTest, h);1142 STAM_PROFILE_START(&pVM->iom.s.StatRZInstTest, h); 1150 1143 rc = iomInterpretTEST(pVM, pCtxCore, GCPhysFault, &Cpu, pRange); 1151 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstTest, h);1144 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstTest, h); 1152 1145 break; 1153 1146 1154 1147 case OP_BT: 1155 1148 Assert(!(uErrorCode & X86_TRAP_PF_RW)); 1156 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstBt, l);1149 STAM_PROFILE_START(&pVM->iom.s.StatRZInstBt, l); 1157 1150 rc = iomInterpretBT(pVM, pCtxCore, GCPhysFault, &Cpu, pRange); 1158 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstBt, l);1151 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstBt, l); 1159 1152 break; 1160 1153 1161 1154 case OP_XCHG: 1162 STAM_PROFILE_START(&pVM->iom.s.Stat GCInstXchg, i);1155 STAM_PROFILE_START(&pVM->iom.s.StatRZInstXchg, i); 1163 1156 rc = iomInterpretXCHG(pVM, pCtxCore, GCPhysFault, &Cpu, pRange); 1164 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCInstXchg, i);1157 STAM_PROFILE_STOP(&pVM->iom.s.StatRZInstXchg, i); 1165 1158 break; 1166 1159 … … 1170 1163 */ 1171 1164 default: 1172 STAM_COUNTER_INC(&pVM->iom.s.Stat GCInstOther);1165 STAM_COUNTER_INC(&pVM->iom.s.StatRZInstOther); 1173 1166 rc = (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ; 1174 1167 break; … … 1182 1175 else 1183 1176 { 1184 STAM_COUNTER_INC(&pVM->iom.s.Stat GCMMIOFailures);1177 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIOFailures); 1185 1178 #if defined(VBOX_WITH_STATISTICS) && !defined(IN_RING3) 1186 1179 switch (rc) … … 1188 1181 case VINF_IOM_HC_MMIO_READ: 1189 1182 case VINF_IOM_HC_MMIO_READ_WRITE: 1190 STAM_COUNTER_INC(&pStats->CTX ALLMID(Read,ToR3));1183 STAM_COUNTER_INC(&pStats->CTX_MID_Z(Read,ToR3)); 1191 1184 break; 1192 1185 case VINF_IOM_HC_MMIO_WRITE: 1193 STAM_COUNTER_INC(&pStats->CTX ALLMID(Write,ToR3));1186 STAM_COUNTER_INC(&pStats->CTX_MID_Z(Write,ToR3)); 1194 1187 break; 1195 1188 } … … 1197 1190 } 1198 1191 1199 STAM_PROFILE_STOP(&pVM->iom.s.Stat GCMMIOHandler, a);1192 STAM_PROFILE_STOP(&pVM->iom.s.StatRZMMIOHandler, a); 1200 1193 return rc; 1201 1194 } … … 1220 1213 int rc; 1221 1214 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pvUser; 1215 STAM_COUNTER_INC(&pVM->iom.s.StatR3MMIOHandler); 1216 1217 AssertMsg(cbBuf == 1 || cbBuf == 2 || cbBuf == 4 || cbBuf == 8, ("%zu\n", cbBuf)); 1222 1218 1223 1219 Assert(pRange); … … 1263 1259 # endif 1264 1260 #endif /* VBOX_WITH_STATISTICS */ 1265 if (pRange->CTX ALLSUFF(pfnReadCallback))1261 if (pRange->CTX_SUFF(pfnReadCallback)) 1266 1262 { 1267 1263 /* … … 1270 1266 #ifdef VBOX_WITH_STATISTICS 1271 1267 if (pStats) 1272 STAM_PROFILE_ADV_START(&pStats->CTX ALLSUFF(ProfRead), a);1273 #endif 1274 int rc = pRange->CTX ALLSUFF(pfnReadCallback)(pRange->CTXALLSUFF(pDevIns), pRange->CTXALLSUFF(pvUser), GCPhys, pu32Value, cbValue);1268 STAM_PROFILE_ADV_START(&pStats->CTX_SUFF_Z(ProfRead), a); 1269 #endif 1270 int rc = pRange->CTX_SUFF(pfnReadCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys, pu32Value, cbValue); 1275 1271 #ifdef VBOX_WITH_STATISTICS 1276 1272 if (pStats) 1277 STAM_PROFILE_ADV_STOP(&pStats->CTX ALLSUFF(ProfRead), a);1273 STAM_PROFILE_ADV_STOP(&pStats->CTX_SUFF_Z(ProfRead), a); 1278 1274 if (pStats && rc != VINF_IOM_HC_MMIO_READ) 1279 STAM_COUNTER_INC(&pStats->CTX ALLSUFF(Read));1275 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Read)); 1280 1276 #endif 1281 1277 switch (rc) … … 1314 1310 if (pRange->pfnReadCallbackR3) 1315 1311 { 1316 STAM_COUNTER_INC(&pStats->CTX ALLMID(Read,ToR3));1312 STAM_COUNTER_INC(&pStats->CTX_MID_Z(Read,ToR3)); 1317 1313 return VINF_IOM_HC_MMIO_READ; 1318 1314 } … … 1324 1320 #ifdef VBOX_WITH_STATISTICS 1325 1321 if (pStats) 1326 STAM_COUNTER_INC(&pStats->CTX ALLSUFF(Read));1322 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Read)); 1327 1323 #endif 1328 1324 /* Unassigned memory; this is actually not supposed to happen. */ … … 1373 1369 * to defer it to ring-3. 1374 1370 */ 1375 if (pRange->CTX ALLSUFF(pfnWriteCallback))1371 if (pRange->CTX_SUFF(pfnWriteCallback)) 1376 1372 { 1377 1373 #ifdef VBOX_WITH_STATISTICS 1378 1374 if (pStats) 1379 STAM_PROFILE_ADV_START(&pStats->CTX ALLSUFF(ProfWrite), a);1380 #endif 1381 int rc = pRange->CTX ALLSUFF(pfnWriteCallback)(pRange->CTXALLSUFF(pDevIns), pRange->CTXALLSUFF(pvUser), GCPhys, &u32Value, cbValue);1375 STAM_PROFILE_ADV_START(&pStats->CTX_SUFF_Z(ProfWrite), a); 1376 #endif 1377 int rc = pRange->CTX_SUFF(pfnWriteCallback)(pRange->CTX_SUFF(pDevIns), pRange->CTX_SUFF(pvUser), GCPhys, &u32Value, cbValue); 1382 1378 #ifdef VBOX_WITH_STATISTICS 1383 1379 if (pStats) 1384 STAM_PROFILE_ADV_STOP(&pStats->CTX ALLSUFF(ProfWrite), a);1380 STAM_PROFILE_ADV_STOP(&pStats->CTX_SUFF_Z(ProfWrite), a); 1385 1381 if (pStats && rc != VINF_IOM_HC_MMIO_WRITE) 1386 STAM_COUNTER_INC(&pStats->CTX ALLSUFF(Write));1382 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Write)); 1387 1383 #endif 1388 1384 Log4(("IOMMMIOWrite: GCPhys=%RGp u32=%08RX32 cb=%d rc=%Vrc\n", GCPhys, u32Value, cbValue, rc)); … … 1392 1388 if (pRange->pfnWriteCallbackR3) 1393 1389 { 1394 STAM_COUNTER_INC(&pStats->CTX ALLMID(Write,ToR3));1390 STAM_COUNTER_INC(&pStats->CTX_MID_Z(Write,ToR3)); 1395 1391 return VINF_IOM_HC_MMIO_WRITE; 1396 1392 } … … 1402 1398 #ifdef VBOX_WITH_STATISTICS 1403 1399 if (pStats) 1404 STAM_COUNTER_INC(&pStats->CTX ALLSUFF(Write));1400 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Write)); 1405 1401 #endif 1406 1402 Log4(("IOMMMIOWrite: GCPhys=%RGp u32=%08RX32 cb=%d rc=%Vrc\n", GCPhys, u32Value, cbValue, VINF_SUCCESS)); … … 1435 1431 { 1436 1432 #ifdef VBOX_WITH_STATISTICS 1437 STAM_COUNTER_INC(&pVM->iom.s.Stat GCInstIns);1433 STAM_COUNTER_INC(&pVM->iom.s.StatInstIns); 1438 1434 #endif 1439 1435 … … 1471 1467 SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL, 1472 1468 &GCPtrDst); 1473 if ( VBOX_FAILURE(rc))1469 if (RT_FAILURE(rc)) 1474 1470 { 1475 1471 Log(("INS destination address conversion failed -> fallback, rc=%d\n", rc)); … … 1523 1519 pRegFrame->ecx = cTransfers; 1524 1520 1525 AssertMsg(rc == VINF_SUCCESS || rc == VINF_IOM_HC_IOPORT_READ || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST) || VBOX_FAILURE(rc), ("%Vrc\n", rc));1521 AssertMsg(rc == VINF_SUCCESS || rc == VINF_IOM_HC_IOPORT_READ || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST) || RT_FAILURE(rc), ("%Vrc\n", rc)); 1526 1522 return rc; 1527 1523 } … … 1563 1559 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 1564 1560 { 1565 AssertMsg(rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_TRPM_XCPT_DISPATCHED || VBOX_FAILURE(rc), ("%Vrc\n", rc));1561 AssertMsg(rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rc), ("%Vrc\n", rc)); 1566 1562 return rc; 1567 1563 } … … 1596 1592 { 1597 1593 #ifdef VBOX_WITH_STATISTICS 1598 STAM_COUNTER_INC(&pVM->iom.s.Stat GCInstOuts);1594 STAM_COUNTER_INC(&pVM->iom.s.StatInstOuts); 1599 1595 #endif 1600 1596 … … 1631 1627 SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL, 1632 1628 &GCPtrSrc); 1633 if ( VBOX_FAILURE(rc))1629 if (RT_FAILURE(rc)) 1634 1630 { 1635 1631 Log(("OUTS source address conversion failed -> fallback, rc=%Vrc\n", rc)); … … 1686 1682 pRegFrame->ecx = cTransfers; 1687 1683 1688 AssertMsg(rc == VINF_SUCCESS || rc == VINF_IOM_HC_IOPORT_WRITE || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST) || VBOX_FAILURE(rc), ("%Vrc\n", rc));1684 AssertMsg(rc == VINF_SUCCESS || rc == VINF_IOM_HC_IOPORT_WRITE || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST) || RT_FAILURE(rc), ("%Vrc\n", rc)); 1689 1685 return rc; 1690 1686 } … … 1728 1724 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 1729 1725 { 1730 AssertMsg(rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_TRPM_XCPT_DISPATCHED || VBOX_FAILURE(rc), ("%Vrc\n", rc));1726 AssertMsg(rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rc), ("%Vrc\n", rc)); 1731 1727 return rc; 1732 1728 }
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