VirtualBox

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2008-10-27 下午01:53:04 (16 年 以前)
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vboxsync
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#1865: SELM.

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  • trunk/src/VBox/VMM/VMMAll/SELMAll.cpp

    r13144 r13577  
    3939
    4040
     41#ifndef IN_RING0
     42
    4143/**
    4244 * Converts a GC selector based address to a flat address.
     
    5860    X86DESC    Desc;
    5961    if (!(Sel & X86_SEL_LDT))
    60         Desc = pVM->selm.s.CTXSUFF(paGdt)[Sel >> X86_SEL_SHIFT];
     62        Desc = pVM->selm.s.CTX_SUFF(paGdt)[Sel >> X86_SEL_SHIFT];
    6163    else
    6264    {
    6365        /** @todo handle LDT pages not present! */
    64 #ifdef IN_GC
    65         PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.GCPtrLdt + pVM->selm.s.offLdtHyper);
    66 #else
    67         PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.HCPtrLdt + pVM->selm.s.offLdtHyper);
    68 #endif
     66        PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.CTX_SUFF(pvLdt) + pVM->selm.s.offLdtHyper);
    6967        Desc = paLDT[Sel >> X86_SEL_SHIFT];
    7068    }
     
    7270    return (RTGCPTR)((RTGCUINTPTR)Addr + X86DESC_BASE(Desc));
    7371}
     72#endif /* !IN_RING0 */
    7473
    7574
     
    101100    {
    102101        RTGCUINTPTR uFlat = (RTGCUINTPTR)Addr & 0xffff;
    103 
    104102        if (CPUMAreHiddenSelRegsValid(pVM))
    105103            uFlat += pHiddenSel->u64Base;
     
    109107    }
    110108
     109#ifdef IN_RING0
     110    Assert(CPUMAreHiddenSelRegsValid(pVM));
     111#else
    111112    /** @todo when we're in 16 bits mode, we should cut off the address as well.. */
    112113    if (!CPUMAreHiddenSelRegsValid(pVM))
    113114        return SELMToFlatBySel(pVM, Sel, Addr);
     115#endif
    114116
    115117    /* 64 bits mode: CS, DS, ES and SS are treated as if each segment base is 0 (Intel® 64 and IA-32 Architectures Software Developer's Manual: 3.4.2.1). */
     
    119121        switch (SelReg)
    120122        {
    121         case DIS_SELREG_FS:
    122         case DIS_SELREG_GS:
    123             return (RTGCPTR)(pHiddenSel->u64Base + Addr);
    124 
    125         default:
    126             return Addr;    /* base 0 */
    127         }
    128     }
     123            case DIS_SELREG_FS:
     124            case DIS_SELREG_GS:
     125                return (RTGCPTR)(pHiddenSel->u64Base + Addr);
     126
     127            default:
     128                return Addr;    /* base 0 */
     129        }
     130    }
     131
    129132    /* AMD64 manual: compatibility mode ignores the high 32 bits when calculating an effective address. */
    130133    Assert(pHiddenSel->u64Base <= 0xffffffff);
     
    149152VMMDECL(int) SELMToFlatEx(PVM pVM, DIS_SELREG SelReg, PCCPUMCTXCORE pCtxCore, RTGCPTR Addr, unsigned fFlags, PRTGCPTR ppvGC)
    150153{
     154    /*
     155     * Fetch the selector first.
     156     */
    151157    PCPUMSELREGHID pHiddenSel;
    152158    RTSEL          Sel;
    153     int            rc;
    154 
    155     rc = DISFetchRegSegEx(pCtxCore, SelReg, &Sel, &pHiddenSel); AssertRC(rc);
     159    int rc = DISFetchRegSegEx(pCtxCore, SelReg, &Sel, &pHiddenSel);
     160    AssertRC(rc);
    156161
    157162    /*
     
    189194        u1DescType    = pHiddenSel->Attr.n.u1DescType;
    190195        u4Type        = pHiddenSel->Attr.n.u4Type;
    191 
    192196        u32Limit      = pHiddenSel->u32Limit;
    193197
     
    199203            switch (SelReg)
    200204            {
    201             case DIS_SELREG_FS:
    202             case DIS_SELREG_GS:
    203                 pvFlat = (pHiddenSel->u64Base + Addr);
    204                 break;
    205 
    206             default:
    207                 pvFlat = Addr;
    208                 break;
     205                case DIS_SELREG_FS:
     206                case DIS_SELREG_GS:
     207                    pvFlat = (pHiddenSel->u64Base + Addr);
     208                    break;
     209
     210                default:
     211                    pvFlat = Addr;
     212                    break;
    209213            }
    210214        }
     
    304308                && (unsigned)(Sel & X86_SEL_MASK) >= pVM->selm.s.GuestGdtr.cbGdt)
    305309                return VERR_INVALID_SELECTOR;
    306             Desc = pVM->selm.s.CTXSUFF(paGdt)[Sel >> X86_SEL_SHIFT];
     310            Desc = pVM->selm.s.CTX_SUFF(paGdt)[Sel >> X86_SEL_SHIFT];
    307311        }
    308312        else
     
    312316
    313317            /** @todo handle LDT page(s) not present! */
    314 #ifdef IN_GC
    315             PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.GCPtrLdt + pVM->selm.s.offLdtHyper);
    316 #else
    317             PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.HCPtrLdt + pVM->selm.s.offLdtHyper);
    318 #endif
     318            PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.CTX_SUFF(pvLdt) + pVM->selm.s.offLdtHyper);
    319319            Desc = paLDT[Sel >> X86_SEL_SHIFT];
    320320        }
     
    341341            * Type check.
    342342            */
    343 #define BOTH(a, b) ((a << 16) | b)
     343# define BOTH(a, b) ((a << 16) | b)
    344344            switch (BOTH(u1DescType, u4Type))
    345345            {
     
    429429
    430430            }
    431 #undef BOTH
     431# undef BOTH
    432432        }
    433433    }
     
    435435    return VERR_SELECTOR_NOT_PRESENT;
    436436}
     437
    437438
    438439#ifndef IN_RING0
     
    512513                && (unsigned)(Sel & X86_SEL_MASK) >= pVM->selm.s.GuestGdtr.cbGdt)
    513514                return VERR_INVALID_SELECTOR;
    514             Desc = pVM->selm.s.CTXSUFF(paGdt)[Sel >> X86_SEL_SHIFT];
     515            Desc = pVM->selm.s.CTX_SUFF(paGdt)[Sel >> X86_SEL_SHIFT];
    515516        }
    516517        else
     
    520521
    521522            /** @todo handle LDT page(s) not present! */
    522 #ifdef IN_GC
    523             PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.GCPtrLdt + pVM->selm.s.offLdtHyper);
    524 #else
    525             PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.HCPtrLdt + pVM->selm.s.offLdtHyper);
    526 #endif
     523            PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.CTX_SUFF(pvLdt) + pVM->selm.s.offLdtHyper);
    527524            Desc = paLDT[Sel >> X86_SEL_SHIFT];
    528525        }
     
    652649#endif /* !IN_RING0 */
    653650
     651
    654652/**
    655653 * Validates and converts a GC selector based code address to a flat
     
    675673
    676674
     675#ifndef IN_RING0
    677676/**
    678677 * Validates and converts a GC selector based code address to a flat
     
    695694    X86DESC    Desc;
    696695    if (!(SelCS & X86_SEL_LDT))
    697         Desc = pVM->selm.s.CTXSUFF(paGdt)[SelCS >> X86_SEL_SHIFT];
     696        Desc = pVM->selm.s.CTX_SUFF(paGdt)[SelCS >> X86_SEL_SHIFT];
    698697    else
    699698    {
    700699        /** @todo handle LDT page(s) not present! */
    701 #ifdef IN_GC
    702         PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.GCPtrLdt + pVM->selm.s.offLdtHyper);
    703 #else
    704         PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.HCPtrLdt + pVM->selm.s.offLdtHyper);
    705 #endif
     700        PX86DESC    paLDT = (PX86DESC)((char *)pVM->selm.s.CTX_SUFF(pvLdt) + pVM->selm.s.offLdtHyper);
    706701        Desc = paLDT[SelCS >> X86_SEL_SHIFT];
    707702    }
     
    748743    return VERR_SELECTOR_NOT_PRESENT;
    749744}
     745#endif /* !IN_RING0 */
    750746
    751747
     
    813809
    814810
     811#ifdef IN_GC
    815812/**
    816813 * Validates and converts a GC selector based code address to a flat address.
     
    840837    return selmValidateAndConvertCSAddrStd(pVM, SelCPL, SelCS, Addr, ppvFlat, pcBits);
    841838}
     839#endif /* IN_GC */
    842840
    843841
     
    861859        return selmValidateAndConvertCSAddrRealMode(pVM, SelCS, pHiddenCSSel, Addr, ppvFlat);
    862860
     861#ifdef IN_RING0
     862    Assert(CPUMAreHiddenSelRegsValid(pVM));
     863#else
    863864    /** @todo when we're in 16 bits mode, we should cut off the address as well? (like in selmValidateAndConvertCSAddrRealMode) */
    864865    if (!CPUMAreHiddenSelRegsValid(pVM))
    865866        return selmValidateAndConvertCSAddrStd(pVM, SelCPL, SelCS, Addr, ppvFlat, NULL);
     867#endif
    866868    return selmValidateAndConvertCSAddrHidden(pVM, SelCPL, SelCS, pHiddenCSSel, Addr, ppvFlat);
    867869}
    868870
    869871
     872#ifndef IN_RING0
    870873/**
    871874 * Return the cpu mode corresponding to the (CS) selector
     
    882885    X86DESC Desc;
    883886    if (!(Sel & X86_SEL_LDT))
    884         Desc = pVM->selm.s.CTXSUFF(paGdt)[Sel >> X86_SEL_SHIFT];
     887        Desc = pVM->selm.s.CTX_SUFF(paGdt)[Sel >> X86_SEL_SHIFT];
    885888    else
    886889    {
    887890        /** @todo handle LDT page(s) not present! */
    888         PX86DESC   paLDT = (PX86DESC)((char *)pVM->selm.s.CTXMID(,PtrLdt) + pVM->selm.s.offLdtHyper);
     891        PX86DESC   paLDT = (PX86DESC)((char *)pVM->selm.s.CTX_SUFF(pvLdt) + pVM->selm.s.offLdtHyper);
    889892        Desc = paLDT[Sel >> X86_SEL_SHIFT];
    890893    }
    891894    return (Desc.Gen.u1DefBig) ? CPUMODE_32BIT : CPUMODE_16BIT;
    892895}
     896#endif /* !IN_RING0 */
    893897
    894898
     
    904908VMMDECL(DISCPUMODE) SELMGetCpuModeFromSelector(PVM pVM, X86EFLAGS eflags, RTSEL Sel, CPUMSELREGHID *pHiddenSel)
    905909{
     910#ifdef IN_RING0
     911    Assert(CPUMAreHiddenSelRegsValid(pVM));
     912#else  /* !IN_RING0 */
    906913    if (!CPUMAreHiddenSelRegsValid(pVM))
    907914    {
     
    915922        return selmGetCpuModeFromSelector(pVM, Sel);
    916923    }
     924#endif /* !IN_RING0 */
    917925    if (    CPUMIsGuestInLongMode(pVM)
    918926        &&  pHiddenSel->Attr.n.u1Long)
     
    924932}
    925933
     934
    926935/**
    927936 * Returns Hypervisor's Trap 08 (\#DF) selector.
     
    960969    pVM->selm.s.Tss.esp1 = (uint32_t)esp;
    961970}
     971
    962972
    963973#ifndef IN_RING0
     
    969979 * @param   pSS     Ring1 SS register value.
    970980 * @param   pEsp    Ring1 ESP register value.
     981 *
     982 * @todo Merge in the GC version of this, eliminating it - or move this to
     983 *       SELM.cpp, making it SELMR3GetRing1Stack.
    971984 */
    972985VMMDECL(int) SELMGetRing1Stack(PVM pVM, uint32_t *pSS, PRTGCPTR32 pEsp)
     
    980993        Assert(pVM->selm.s.GCPtrGuestTss && pVM->selm.s.cbMonitoredGuestTss);
    981994
    982 #ifdef IN_GC
     995# ifdef IN_GC
    983996        bool    fTriedAlready = false;
    984997
     
    986999        rc  = MMGCRamRead(pVM, &tss.ss0,  (RCPTRTYPE(void *))(GCPtrTss + RT_OFFSETOF(VBOXTSS, ss0)), sizeof(tss.ss0));
    9871000        rc |= MMGCRamRead(pVM, &tss.esp0, (RCPTRTYPE(void *))(GCPtrTss + RT_OFFSETOF(VBOXTSS, esp0)), sizeof(tss.esp0));
    988   #ifdef DEBUG
     1001ifdef DEBUG
    9891002        rc |= MMGCRamRead(pVM, &tss.offIoBitmap, (RCPTRTYPE(void *))(GCPtrTss + RT_OFFSETOF(VBOXTSS, offIoBitmap)), sizeof(tss.offIoBitmap));
    990   #endif
     1003endif
    9911004
    9921005        if (VBOX_FAILURE(rc))
     
    10061019        }
    10071020
    1008 #else /* !IN_GC */
     1021# else /* !IN_GC */
    10091022        /* Reading too much. Could be cheaper than two seperate calls though. */
    10101023        rc = PGMPhysSimpleReadGCPtr(pVM, &tss, GCPtrTss, sizeof(VBOXTSS));
     
    10141027            return rc;
    10151028        }
    1016 #endif /* !IN_GC */
    1017 
    1018 #ifdef LOG_ENABLED
     1029# endif /* !IN_GC */
     1030
     1031# ifdef LOG_ENABLED
    10191032        uint32_t ssr0  = pVM->selm.s.Tss.ss1;
    10201033        uint32_t espr0 = pVM->selm.s.Tss.esp1;
     
    10251038
    10261039        Log(("offIoBitmap=%#x\n", tss.offIoBitmap));
    1027 #endif
     1040# endif
    10281041        /* Update our TSS structure for the guest's ring 1 stack */
    10291042        SELMSetRing1Stack(pVM, tss.ss0 | 1, (RTGCPTR32)tss.esp0);
     
    10361049    return VINF_SUCCESS;
    10371050}
    1038 #endif
     1051#endif /* !IN_RING0 */
     1052
    10391053
    10401054/**
    10411055 * Returns Guest TSS pointer
    10421056 *
     1057 * @returns Pointer to the guest TSS, RTRCPTR_MAX if not being monitored.
    10431058 * @param   pVM     VM Handle.
    10441059 */
     
    10861101
    10871102#ifndef IN_RING0
     1103
    10881104/**
    10891105 * Gets the hypervisor code selector (CS).
     
    11481164 *          switchers. Don't exploit this API!
    11491165 */
    1150 VMMDECL(RTGCPTR) SELMGetHyperGDT(PVM pVM)
     1166VMMDECL(RTRCPTR) SELMGetHyperGDT(PVM pVM)
    11511167{
    11521168    /*
    1153      * Always convert this from the HC pointer since. We're can be
     1169     * Always convert this from the HC pointer since we can be
    11541170     * called before the first relocation and have to work correctly
    11551171     * without having dependencies on the relocation order.
    11561172     */
    1157     return (RTGCPTR)MMHyperHC2GC(pVM, pVM->selm.s.paGdtHC);
    1158 }
    1159 #endif /* IN_RING0 */
     1173    return (RTRCPTR)MMHyperR3ToRC(pVM, pVM->selm.s.paGdtR3);
     1174}
     1175
     1176#endif /* !IN_RING0 */
    11601177
    11611178/**
     
    11781195         * Do we have a valid TSS?
    11791196         */
    1180         if (    pVM->selm.s.GCSelTss == (RTSEL)~0
     1197        if (    pVM->selm.s.GCSelTss == RTSEL_MAX
    11811198            || !pVM->selm.s.fGuestTss32Bit)
    11821199            return VERR_SELM_NO_TSS;
     
    12051222    return VINF_SUCCESS;
    12061223}
     1224
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