vbox的更動 13823 路徑 trunk/src/VBox/VMM/VMMAll/EMAll.cpp
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- 2008-11-5 上午01:10:20 (16 年 以前)
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trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r13822 r13823 103 103 # ifdef IN_RING0 104 104 int rc = PGMPhysSimpleReadGCPtr(pVM, pDest, pSrc, cb); 105 AssertMsgRC(rc, ("PGMPhysSimpleReadGCPtr failed for pSrc=% VGv cb=%x\n", pSrc, cb));105 AssertMsgRC(rc, ("PGMPhysSimpleReadGCPtr failed for pSrc=%RGv cb=%x\n", pSrc, cb)); 106 106 # else /* IN_RING3 */ 107 107 if (!PATMIsPatchGCAddr(pVM, pSrc)) … … 154 154 if (RT_FAILURE(rc)) 155 155 { 156 Log(("EMInterpretDisasOne: Failed to convert %RTsel:% VGv (cpl=%d) - rc=%Rrc !!\n",156 Log(("EMInterpretDisasOne: Failed to convert %RTsel:%RGv (cpl=%d) - rc=%Rrc !!\n", 157 157 pCtxCore->cs, (RTGCPTR)pCtxCore->rip, pCtxCore->ss & X86_SEL_RPL, rc)); 158 158 return rc; … … 184 184 if (RT_SUCCESS(rc)) 185 185 return VINF_SUCCESS; 186 AssertMsgFailed(("DISCoreOne failed to GCPtrInstr=% VGv rc=%Rrc\n", GCPtrInstr, rc));186 AssertMsgFailed(("DISCoreOne failed to GCPtrInstr=%RGv rc=%Rrc\n", GCPtrInstr, rc)); 187 187 return VERR_INTERNAL_ERROR; 188 188 } … … 211 211 RTGCPTR pbCode; 212 212 213 LogFlow(("EMInterpretInstruction %RGv fault % VGv\n", (RTGCPTR)pRegFrame->rip, pvFault));213 LogFlow(("EMInterpretInstruction %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault)); 214 214 int rc = SELMToFlatEx(pVM, DIS_SELREG_CS, pRegFrame, pRegFrame->rip, 0, &pbCode); 215 215 if (RT_SUCCESS(rc)) … … 457 457 if (RT_FAILURE(rc)) 458 458 { 459 AssertMsgFailed(("MMGCRamRead % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));459 AssertMsgFailed(("MMGCRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 460 460 return VERR_EM_INTERPRETER; 461 461 } … … 476 476 if (RT_FAILURE(rc)) 477 477 { 478 AssertMsgFailed(("MMGCRamRead % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));478 AssertMsgFailed(("MMGCRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 479 479 } 480 480 break; … … 510 510 if (RT_FAILURE(rc)) 511 511 { 512 AssertMsgFailed(("emRamWrite % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));512 AssertMsgFailed(("emRamWrite %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 513 513 return VERR_EM_INTERPRETER; 514 514 } … … 536 536 if (RT_FAILURE(rc)) 537 537 { 538 AssertMsgFailed(("emRamWrite % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));538 AssertMsgFailed(("emRamWrite %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 539 539 return VERR_EM_INTERPRETER; 540 540 } … … 583 583 if (RT_FAILURE(rc)) 584 584 { 585 AssertMsgFailed(("emRamRead % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));585 AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 586 586 return VERR_EM_INTERPRETER; 587 587 } … … 601 601 if (RT_FAILURE(rc)) 602 602 { 603 AssertMsgFailed(("emRamWrite % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));603 AssertMsgFailed(("emRamWrite %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 604 604 return VERR_EM_INTERPRETER; 605 605 } … … 653 653 if (RT_FAILURE(rc)) 654 654 { 655 AssertMsgFailed(("emRamRead % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));655 AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 656 656 return VERR_EM_INTERPRETER; 657 657 } … … 674 674 if (RT_FAILURE(rc)) 675 675 { 676 AssertMsgFailed(("emRamWrite % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));676 AssertMsgFailed(("emRamWrite %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 677 677 return VERR_EM_INTERPRETER; 678 678 } … … 745 745 if (RT_FAILURE(rc)) 746 746 { 747 AssertMsgFailed(("emRamRead % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));747 AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 748 748 return VERR_EM_INTERPRETER; 749 749 } … … 767 767 } 768 768 769 LogFlow(("emInterpretOrXorAnd %s % VGv %RX64 - %RX64 size %d (%d)\n", emGetMnemonic(pCpu), pParam1, valpar1, valpar2, param2.size, param1.size));769 LogFlow(("emInterpretOrXorAnd %s %RGv %RX64 - %RX64 size %d (%d)\n", emGetMnemonic(pCpu), pParam1, valpar1, valpar2, param2.size, param1.size)); 770 770 771 771 /* Data read, emulate instruction. */ … … 850 850 851 851 /* Try emulate it with a one-shot #PF handler in place. */ 852 Log2(("%s % VGv imm%d=%RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2));852 Log2(("%s %RGv imm%d=%RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2)); 853 853 854 854 RTGCUINTREG32 eflags = 0; … … 862 862 if (RT_FAILURE(rc)) 863 863 { 864 Log(("%s % VGv imm%d=%RX64-> emulation failed due to page fault!\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2));864 Log(("%s %RGv imm%d=%RX64-> emulation failed due to page fault!\n", emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2)); 865 865 return VERR_EM_INTERPRETER; 866 866 } … … 920 920 if (RT_FAILURE(rc)) 921 921 { 922 AssertMsgFailed(("emRamRead % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));922 AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 923 923 return VERR_EM_INTERPRETER; 924 924 } … … 1023 1023 } 1024 1024 1025 Log2(("emInterpret%s: pvFault=% VGv pParam1=%VGv val2=%x\n", emGetMnemonic(pCpu), pvFault, pParam1, valpar2));1025 Log2(("emInterpret%s: pvFault=%RGv pParam1=%RGv val2=%x\n", emGetMnemonic(pCpu), pvFault, pParam1, valpar2)); 1026 1026 pParam1 = (RTGCPTR)((RTGCUINTPTR)pParam1 + valpar2/8); 1027 1027 EM_ASSERT_FAULT_RETURN((RTGCPTR)((RTGCUINTPTR)pParam1 & ~3) == pvFault, VERR_EM_INTERPRETER); … … 1029 1029 if (RT_FAILURE(rc)) 1030 1030 { 1031 AssertMsgFailed(("emRamRead % VGv size=%d failed with %Rrc\n", pParam1, param1.size, rc));1031 AssertMsgFailed(("emRamRead %RGv size=%d failed with %Rrc\n", pParam1, param1.size, rc)); 1032 1032 return VERR_EM_INTERPRETER; 1033 1033 } … … 1102 1102 #endif 1103 1103 1104 Log2(("emInterpretLockBitTest %s: pvFault=% VGv GCPtrPar1=%VGv imm=%RX64\n", emGetMnemonic(pCpu), pvFault, GCPtrPar1, ValPar2));1104 Log2(("emInterpretLockBitTest %s: pvFault=%RGv GCPtrPar1=%RGv imm=%RX64\n", emGetMnemonic(pCpu), pvFault, GCPtrPar1, ValPar2)); 1105 1105 1106 1106 #ifdef IN_GC … … 1120 1120 if (RT_FAILURE(rc)) 1121 1121 { 1122 Log(("emInterpretLockBitTest %s: % VGv imm%d=%RX64 -> emulation failed due to page fault!\n",1122 Log(("emInterpretLockBitTest %s: %RGv imm%d=%RX64 -> emulation failed due to page fault!\n", 1123 1123 emGetMnemonic(pCpu), GCPtrPar1, pCpu->param2.size*8, ValPar2)); 1124 1124 return VERR_EM_INTERPRETER; 1125 1125 } 1126 1126 1127 Log2(("emInterpretLockBitTest %s: GCPtrPar1=% VGv imm=%VX64 CF=%d\n", emGetMnemonic(pCpu), GCPtrPar1, ValPar2, !!(eflags & X86_EFL_CF)));1127 Log2(("emInterpretLockBitTest %s: GCPtrPar1=%RGv imm=%VX64 CF=%d\n", emGetMnemonic(pCpu), GCPtrPar1, ValPar2, !!(eflags & X86_EFL_CF))); 1128 1128 1129 1129 /* Update guest's eflags and finish. */ … … 1192 1192 #ifdef LOG_ENABLED 1193 1193 if (pCpu->mode == CPUMODE_64BIT) 1194 LogFlow(("EMInterpretInstruction at %RGv: OP_MOV % VGv <- %RX64 (%d) &val64=%RHv\n", (RTGCPTR)pRegFrame->rip, pDest, val64, param2.size, &val64));1194 LogFlow(("EMInterpretInstruction at %RGv: OP_MOV %RGv <- %RX64 (%d) &val64=%RHv\n", (RTGCPTR)pRegFrame->rip, pDest, val64, param2.size, &val64)); 1195 1195 else 1196 LogFlow(("EMInterpretInstruction at %08RX64: OP_MOV % VGv <- %08X (%d) &val64=%RHv\n", pRegFrame->rip, pDest, (uint32_t)val64, param2.size, &val64));1196 LogFlow(("EMInterpretInstruction at %08RX64: OP_MOV %RGv <- %08X (%d) &val64=%RHv\n", pRegFrame->rip, pDest, (uint32_t)val64, param2.size, &val64)); 1197 1197 #endif 1198 1198 … … 1255 1255 #ifdef LOG_ENABLED 1256 1256 if (pCpu->mode == CPUMODE_64BIT) 1257 LogFlow(("EMInterpretInstruction: OP_MOV % VGv -> %RX64 (%d)\n", pSrc, val64, param1.size));1257 LogFlow(("EMInterpretInstruction: OP_MOV %RGv -> %RX64 (%d)\n", pSrc, val64, param1.size)); 1258 1258 else 1259 LogFlow(("EMInterpretInstruction: OP_MOV % VGv -> %08X (%d)\n", pSrc, (uint32_t)val64, param1.size));1259 LogFlow(("EMInterpretInstruction: OP_MOV %RGv -> %08X (%d)\n", pSrc, (uint32_t)val64, param1.size)); 1260 1260 #endif 1261 1261 } … … 1324 1324 if (!(pCpu->prefix & PREFIX_REP)) 1325 1325 { 1326 LogFlow(("emInterpretStosWD dest=%04X:% VGv (%VGv) cbSize=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize));1326 LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize)); 1327 1327 1328 1328 rc = PGMPhysWriteGCPtr(pVM, GCDest, &pRegFrame->rax, cbSize); … … 1354 1354 return VINF_SUCCESS; 1355 1355 1356 LogFlow(("emInterpretStosWD dest=%04X:% VGv (%VGv) cbSize=%d cTransfers=%x DF=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize, cTransfers, pRegFrame->eflags.Bits.u1DF));1356 LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d cTransfers=%x DF=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize, cTransfers, pRegFrame->eflags.Bits.u1DF)); 1357 1357 1358 1358 /* Access verification first; we currently can't recover properly from traps inside this instruction */ … … 1457 1457 } 1458 1458 1459 LogFlow(("%s % VGv rax=%RX64 %RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pRegFrame->rax, valpar));1459 LogFlow(("%s %RGv rax=%RX64 %RX64\n", emGetMnemonic(pCpu), GCPtrPar1, pRegFrame->rax, valpar)); 1460 1460 1461 1461 if (pCpu->prefix & PREFIX_LOCK) … … 1464 1464 eflags = EMEmulateCmpXchg(pvParam1, &pRegFrame->rax, valpar, pCpu->param2.size); 1465 1465 1466 LogFlow(("%s % VGv rax=%RX64 %RX64 ZF=%d\n", emGetMnemonic(pCpu), GCPtrPar1, pRegFrame->rax, valpar, !!(eflags & X86_EFL_ZF)));1466 LogFlow(("%s %RGv rax=%RX64 %RX64 ZF=%d\n", emGetMnemonic(pCpu), GCPtrPar1, pRegFrame->rax, valpar, !!(eflags & X86_EFL_ZF))); 1467 1467 1468 1468 /* Update guest's eflags and finish. */ … … 1511 1511 } 1512 1512 1513 LogFlow(("%s % VGv=%08x eax=%08x\n", emGetMnemonic(pCpu), pvParam1, pRegFrame->eax));1513 LogFlow(("%s %RGv=%08x eax=%08x\n", emGetMnemonic(pCpu), pvParam1, pRegFrame->eax)); 1514 1514 1515 1515 if (pCpu->prefix & PREFIX_LOCK) … … 1518 1518 eflags = EMEmulateCmpXchg8b(pvParam1, &pRegFrame->eax, &pRegFrame->edx, pRegFrame->ebx, pRegFrame->ecx); 1519 1519 1520 LogFlow(("%s % VGv=%08x eax=%08x ZF=%d\n", emGetMnemonic(pCpu), pvParam1, pRegFrame->eax, !!(eflags & X86_EFL_ZF)));1520 LogFlow(("%s %RGv=%08x eax=%08x ZF=%d\n", emGetMnemonic(pCpu), pvParam1, pRegFrame->eax, !!(eflags & X86_EFL_ZF))); 1521 1521 1522 1522 /* Update guest's eflags and finish; note that *only* ZF is affected. */ … … 1588 1588 if (RT_FAILURE(rc)) 1589 1589 { 1590 Log(("%s % VGv eax=%08x %08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar));1590 Log(("%s %RGv eax=%08x %08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, valpar)); 1591 1591 return VERR_EM_INTERPRETER; 1592 1592 } … … 1650 1650 if (RT_FAILURE(rc)) 1651 1651 { 1652 Log(("%s % VGv=%08x eax=%08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax));1652 Log(("%s %RGv=%08x eax=%08x -> emulation failed due to page fault!\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax)); 1653 1653 return VERR_EM_INTERPRETER; 1654 1654 } 1655 1655 1656 LogFlow(("%s % VGv=%08x eax=%08x ZF=%d\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, !!(eflags & X86_EFL_ZF)));1656 LogFlow(("%s %RGv=%08x eax=%08x ZF=%d\n", emGetMnemonic(pCpu), pParam1, pRegFrame->eax, !!(eflags & X86_EFL_ZF))); 1657 1657 1658 1658 /* Update guest's eflags and finish; note that *only* ZF is affected. */ … … 1721 1721 if (RT_FAILURE(rc)) 1722 1722 { 1723 Log(("XAdd % VGv reg=%08x -> emulation failed due to page fault!\n", pParam1, *pParamReg2));1723 Log(("XAdd %RGv reg=%08x -> emulation failed due to page fault!\n", pParam1, *pParamReg2)); 1724 1724 return VERR_EM_INTERPRETER; 1725 1725 } 1726 1726 1727 LogFlow(("XAdd % VGv reg=%08x ZF=%d\n", pParam1, *pParamReg2, !!(eflags & X86_EFL_ZF)));1727 LogFlow(("XAdd %RGv reg=%08x ZF=%d\n", pParam1, *pParamReg2, !!(eflags & X86_EFL_ZF))); 1728 1728 1729 1729 /* Update guest's eflags and finish. */
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