vbox的更動 18927 路徑 trunk/src/VBox/VMM/TRPM.cpp

時間撮記:

2009-4-16 上午11:41:38 (16 年 以前)

作者:

vboxsync

訊息:

Big step to separate VMM data structures for guest SMP. (pgm, em)

檔案:

• trunk/src/VBox/VMM/TRPM.cpp (修改) (17 筆差異)

trunk/src/VBox/VMM/TRPM.cpp

@@ -570 +570 @@
 VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
 {
+    /* Only applies to raw mode which supports only 1 VCPU. */
+    PVMCPU pVCpu = &pVM->aCpus[0];
+
     LogFlow(("TRPMR3Relocate\n"));
     /*
@@ -592 +595 @@
     AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap12 in VMMGC.gc!\n"));
 
-    RTSEL SelCS = CPUMGetHyperCS(pVM);
+    RTSEL SelCS = CPUMGetHyperCS(pVCpu);
 
     /*
@@ -639 +642 @@
      * Update IDTR (limit is including!).
      */
-    CPUMSetHyperIDTR(pVM, VM_RC_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1);
+    CPUMSetHyperIDTR(pVCpu, VM_RC_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1);
 
     if (!pVM->trpm.s.fDisableMonitoring)
@@ -903 +906 @@
  * @returns VBox status code.
  * @param   pVM         The VM handle.
- */
-VMMR3DECL(int) TRPMR3SyncIDT(PVM pVM)
+ * @param   pVCpu       The VMCPU handle.
+ */
+VMMR3DECL(int) TRPMR3SyncIDT(PVM pVM, PVMCPU pVCpu)
 {
     STAM_PROFILE_START(&pVM->trpm.s.StatSyncIDT, a);
@@ -932 +936 @@
      */
     VBOXIDTR IDTR;
-    IDTR.pIdt = CPUMGetGuestIDTR(pVM, &IDTR.cbIdt);
+    IDTR.pIdt = CPUMGetGuestIDTR(pVCpu, &IDTR.cbIdt);
     if (!IDTR.cbIdt)
     {
@@ -985 +989 @@
      */
     X86DESC  Idte3;
-    rc = PGMPhysSimpleReadGCPtr(pVM, &Idte3, IDTR.pIdt + sizeof(Idte3) * 3,  sizeof(Idte3));
+    rc = PGMPhysSimpleReadGCPtr(pVCpu, &Idte3, IDTR.pIdt + sizeof(Idte3) * 3,  sizeof(Idte3));
     if (RT_FAILURE(rc))
     {
@@ -1078 +1082 @@
 VMMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap)
 {
+    /* Only applies to raw mode which supports only 1 VCPU. */
+    PVMCPU pVCpu = &pVM->aCpus[0];
+
     /** @todo cleanup trpmR3ClearPassThroughHandler()! */
     RTRCPTR aGCPtrs[TRPM_HANDLER_MAX];
@@ -1098 +1105 @@
     ASMBitClear(&pVM->trpm.s.au32IdtPatched[0], iTrap);
 
-    RTSEL               SelCS         = CPUMGetHyperCS(pVM);
+    RTSEL               SelCS         = CPUMGetHyperCS(pVCpu);
     PVBOXIDTE           pIdte         = &pVM->trpm.s.aIdt[iTrap];
     PVBOXIDTE_GENERIC   pIdteTemplate = &g_aIdt[iTrap];
@@ -1182 +1189 @@
 VMMR3DECL(int) TRPMR3SetGuestTrapHandler(PVM pVM, unsigned iTrap, RTRCPTR pHandler)
 {
+    /* Only valid in raw mode which implies 1 VCPU */
+    Assert(PATMIsEnabled(pVM) && pVM->cCPUs == 1);
+    PVMCPU pVCpu = &pVM->aCpus[0];
+
     /*
      * Validate.
@@ -1194 +1205 @@
 
     uint16_t    cbIDT;
-    RTGCPTR     GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
+    RTGCPTR     GCPtrIDT = CPUMGetGuestIDTR(pVCpu, &cbIDT);
     if (iTrap * sizeof(VBOXIDTE) >= cbIDT)
         return VERR_INVALID_PARAMETER;  /* Silently ignore out of range requests. */
@@ -1209 +1220 @@
      */
     VBOXIDTE GuestIdte;
-    int rc = PGMPhysSimpleReadGCPtr(pVM, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte),  sizeof(GuestIdte));
+    int rc = PGMPhysSimpleReadGCPtr(pVCpu, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte),  sizeof(GuestIdte));
     if (RT_FAILURE(rc))
     {
@@ -1301 +1312 @@
 VMMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTRCPTR GCPtr)
 {
+    /* Only valid in raw mode which implies 1 VCPU */
+    Assert(PATMIsEnabled(pVM) && pVM->cCPUs == 1);
+    PVMCPU pVCpu = &pVM->aCpus[0];
+
     /*
      * Read IDTR and calc last entry.
      */
     uint16_t    cbIDT;
-    RTGCPTR     GCPtrIDTE = CPUMGetGuestIDTR(pVM, &cbIDT);
+    RTGCPTR     GCPtrIDTE = CPUMGetGuestIDTR(pVCpu, &cbIDT);
     unsigned    cEntries = (cbIDT + 1) / sizeof(VBOXIDTE);
     if (!cEntries)
@@ -1322 +1337 @@
         PCVBOXIDTE      pIDTE;
         PGMPAGEMAPLOCK  Lock;
-        int rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrIDTE, (const void **)&pIDTE, &Lock);
+        int rc = PGMPhysGCPtr2CCPtrReadOnly(pVCpu, GCPtrIDTE, (const void **)&pIDTE, &Lock);
         if (RT_SUCCESS(rc))
         {
@@ -1371 +1386 @@
  * @returns VBox status code.
  * @param   pVM         The VM to operate on.
+ * @param   pVCpu       The VMCPU to operate on.
  * @param   enmEvent    Trpm event type
  */
-VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent)
+VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent)
 {
     PCPUMCTX pCtx;
     int      rc;
 
-    pCtx = CPUMQueryGuestCtxPtr(pVM);
+    pCtx = CPUMQueryGuestCtxPtr(pVCpu);
     Assert(!PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
     Assert(!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
@@ -1385 +1401 @@
     Assert(enmEvent == TRPM_HARDWARE_INT);
 
-    if (REMR3QueryPendingInterrupt(pVM) == REM_NO_PENDING_IRQ)
+    if (REMR3QueryPendingInterrupt(pVM, pVCpu) == REM_NO_PENDING_IRQ)
     {
 #ifdef TRPM_FORWARD_TRAPS_IN_GC
@@ -1416 +1432 @@
             {
                 /* Must check pending forced actions as our IDT or GDT might be out of sync */
-                rc = EMR3CheckRawForcedActions(pVM);
+                rc = EMR3CheckRawForcedActions(pVM, pVCpu);
                 if (rc == VINF_SUCCESS)
                 {
@@ -1432 +1448 @@
             else
                 STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailNoHandler);
-            REMR3NotifyPendingInterrupt(pVM, u8Interrupt);
+            REMR3NotifyPendingInterrupt(pVM, pVCpu, u8Interrupt);
         }
         else