VirtualBox

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時間撮記:
2013-1-27 下午09:12:53 (12 年 以前)
作者:
vboxsync
訊息:

DBGF,DBGC,++: PVM -> PUVM. Some refactoring and cleanup as well.

檔案:
修改 1 筆資料

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  • trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp

    r42420 r44399  
    3030#include <VBox/param.h>
    3131#include <VBox/vmm/vm.h>
     32#include <VBox/vmm/uvm.h>
    3233#include "internal/pgm.h"
    3334
     
    296297        :  pSelInfo->Sel == DIS_FMT_SEL_GET_VALUE(u32Sel))
    297298    {
    298         rc = DBGFR3AddrFromSelInfoOff(pState->pVM, &Addr, pSelInfo, uAddress);
     299        rc = DBGFR3AddrFromSelInfoOff(pState->pVM->pUVM, &Addr, pSelInfo, uAddress);
    299300        if (RT_SUCCESS(rc))
    300             rc = DBGFR3AsSymbolByAddr(pState->pVM, pState->hAs, &Addr, &off, &Sym, NULL /*phMod*/);
     301            rc = DBGFR3AsSymbolByAddr(pState->pVM->pUVM, pState->hAs, &Addr, &off, &Sym, NULL /*phMod*/);
    301302    }
    302303    else
     
    576577 *
    577578 * @returns VBox status code.
    578  * @param   pVM             Pointer to the VM.
     579 * @param   pUVM            The user mode VM handle.
    579580 * @param   idCpu           The ID of virtual CPU.
    580581 * @param   Sel             The code selector. This used to determine the 32/16 bit ness and
     
    591592 *          address conversion.
    592593 */
    593 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, uint32_t fFlags,
     594VMMR3DECL(int) DBGFR3DisasInstrEx(PUVM pUVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, uint32_t fFlags,
    594595                                  char *pszOutput, uint32_t cbOutput, uint32_t *pcbInstr)
    595596{
    596597    AssertReturn(cbOutput > 0, VERR_INVALID_PARAMETER);
    597598    *pszOutput = '\0';
     599    UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
     600    PVM pVM = pUVM->pVM;
    598601    VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
    599     AssertReturn(idCpu < pVM->cCpus, VERR_INVALID_CPU_ID);
     602    AssertReturn(idCpu < pUVM->cCpus, VERR_INVALID_CPU_ID);
    600603    AssertReturn(!(fFlags & ~DBGF_DISAS_FLAGS_VALID_MASK), VERR_INVALID_PARAMETER);
    601604    AssertReturn((fFlags & DBGF_DISAS_FLAGS_MODE_MASK) <= DBGF_DISAS_FLAGS_64BIT_MODE, VERR_INVALID_PARAMETER);
     
    626629 *                          terminated if @a cbOutput is greater than zero.
    627630 * @param   cbOutput        Size of the output buffer.
    628  */
    629 VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVMCPU pVCpu, char *pszOutput, uint32_t cbOutput)
     631 * @thread  EMT(pVCpu)
     632 */
     633VMMR3_INT_DECL(int) DBGFR3DisasInstrCurrent(PVMCPU pVCpu, char *pszOutput, uint32_t cbOutput)
    630634{
    631635    AssertReturn(cbOutput > 0, VERR_INVALID_PARAMETER);
    632636    *pszOutput = '\0';
    633     AssertReturn(pVCpu, VERR_INVALID_CONTEXT);
    634     return DBGFR3DisasInstrEx(pVCpu->pVMR3, pVCpu->idCpu, 0, 0,
    635                               DBGF_DISAS_FLAGS_CURRENT_GUEST | DBGF_DISAS_FLAGS_DEFAULT_MODE,
    636                               pszOutput, cbOutput, NULL);
     637    Assert(VMCPU_IS_EMT(pVCpu));
     638
     639    RTGCPTR GCPtr = 0;
     640    return dbgfR3DisasInstrExOnVCpu(pVCpu->pVMR3, pVCpu, 0, &GCPtr,
     641                                    DBGF_DISAS_FLAGS_CURRENT_GUEST | DBGF_DISAS_FLAGS_DEFAULT_MODE,
     642                                    pszOutput, cbOutput, NULL);
    637643}
    638644
     
    645651 * @param   pVCpu           Pointer to the VMCPU.
    646652 * @param   pszPrefix       Short prefix string to the disassembly string. (optional)
     653 * @thread  EMT(pVCpu)
    647654 */
    648655VMMR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVMCPU pVCpu, const char *pszPrefix)
     
    667674 *
    668675 * @returns VBox status code.
    669  * @param   pVM             Pointer to the VM.
    670676 * @param   pVCpu           Pointer to the VMCPU, defaults to CPU 0 if NULL.
    671677 * @param   Sel             The code selector. This used to determine the 32/16 bit-ness and
     
    673679 * @param   GCPtr           The code address relative to the base of Sel.
    674680 * @param   pszPrefix       Short prefix string to the disassembly string. (optional)
     681 * @thread  EMT(pVCpu)
    675682 */
    676683VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVMCPU pVCpu, RTSEL Sel, RTGCPTR GCPtr, const char *pszPrefix)
    677684{
     685    Assert(VMCPU_IS_EMT(pVCpu));
     686
    678687    char szBuf[256];
    679     int rc = DBGFR3DisasInstrEx(pVCpu->pVMR3, pVCpu->idCpu, Sel, GCPtr, DBGF_DISAS_FLAGS_DEFAULT_MODE,
    680                                 &szBuf[0], sizeof(szBuf), NULL);
     688    RTGCPTR GCPtrTmp = GCPtr;
     689    int rc = dbgfR3DisasInstrExOnVCpu(pVCpu->pVMR3, pVCpu, Sel, &GCPtrTmp, DBGF_DISAS_FLAGS_DEFAULT_MODE,
     690                                      &szBuf[0], sizeof(szBuf), NULL);
    681691    if (RT_FAILURE(rc))
    682692        RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Rrc\n", Sel, GCPtr, rc);
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